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https://bitbucket.org/librepilot/librepilot.git
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OP-378: Got BMA180 working.
This commit is contained in:
parent
3093d26cf4
commit
5d78a68bee
@ -86,7 +86,7 @@ OPUAVSYNTHDIR = $(OUTDIR)/../uavobject-synthetics/flight
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# use file-extension c for "c-only"-files
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# use file-extension c for "c-only"-files
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## INS:
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## INS:
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SRC = ins.c
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SRC = test.c
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SRC += pios_board.c
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SRC += pios_board.c
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SRC += ahrs_timer.c
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SRC += ahrs_timer.c
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SRC += insgps13state.c
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SRC += insgps13state.c
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@ -167,8 +167,8 @@ static const struct pios_spi_cfg pios_spi_accel_cfg = {
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.SPI_FirstBit = SPI_FirstBit_MSB,
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.SPI_FirstBit = SPI_FirstBit_MSB,
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.SPI_CRCPolynomial = 7,
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.SPI_CRCPolynomial = 7,
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.SPI_CPOL = SPI_CPOL_High,
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.SPI_CPOL = SPI_CPOL_High,
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.SPI_CPHA = SPI_CPHA_1Edge,
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.SPI_CPHA = SPI_CPHA_2Edge,
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.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2,
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.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_128,
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},
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},
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.use_crc = FALSE,
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.use_crc = FALSE,
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.dma = {
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.dma = {
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@ -38,52 +38,64 @@ static uint8_t EEPROM_WRITEABLE=0;
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/**
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/**
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* @brief Claim the SPI bus for the accel communications and select this chip
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* @brief Claim the SPI bus for the accel communications and select this chip
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* @return 0 if successful, -1 if unable to claim bus
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*/
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*/
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void PIOS_BMA180_ClaimBus()
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int32_t PIOS_BMA180_ClaimBus()
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{
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{
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PIOS_SPI_ClaimBus(PIOS_SPI_ACCEL);
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if(PIOS_SPI_ClaimBus(PIOS_SPI_ACCEL) != 0)
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return -1;
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PIOS_BMA_ENABLE;
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PIOS_BMA_ENABLE;
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return 0;
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}
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}
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/**
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/**
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* @brief Release the SPI bus for the accel communications and end the transaction
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* @brief Release the SPI bus for the accel communications and end the transaction
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* @return 0 if successful
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*/
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*/
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void PIOS_BMA180_ReleaseBus()
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int32_t PIOS_BMA180_ReleaseBus()
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{
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{
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PIOS_BMA_DISABLE;
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PIOS_BMA_DISABLE;
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PIOS_SPI_ReleaseBus(PIOS_SPI_ACCEL);
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return PIOS_SPI_ReleaseBus(PIOS_SPI_ACCEL);
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}
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}
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/**
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/**
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* @brief Set the EEPROM write-enable bit. Must be set to 1 (unlocked) before writing control registers.
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* @brief Set the EEPROM write-enable bit. Must be set to 1 (unlocked) before writing control registers.
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* @return none
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* @return returns 0 if successful or < 0 if failure
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* @param _we[in] bit to set, 1 to enable writes or 0 to disable writes
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* @param _we[in] bit to set, 1 to enable writes or 0 to disable writes
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*/
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*/
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void PIOS_BMA180_WriteEnable(uint8_t _we)
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int32_t PIOS_BMA180_WriteEnable(uint8_t _we)
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{
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{
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uint8_t addr_reg[2] = {BMA_WE_ADDR,0};
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uint8_t addr_reg[2] = {BMA_WE_ADDR,0};
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PIOS_BMA180_ClaimBus();
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if(PIOS_BMA180_ClaimBus() != 0)
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return -1;
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addr_reg[1] = PIOS_SPI_TransferByte(PIOS_SPI_ACCEL,(0x80 | BMA_WE_ADDR) );
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addr_reg[1] = PIOS_SPI_TransferByte(PIOS_SPI_ACCEL,(0x80 | BMA_WE_ADDR) );
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addr_reg[1] &= 0xEF;
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addr_reg[1] &= 0xEF;
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addr_reg[1] |= ( (0x01 & _we) << 4);
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addr_reg[1] |= ( (0x01 & _we) << 4);
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PIOS_SPI_TransferBlock(PIOS_SPI_ACCEL,addr_reg,NULL,sizeof(addr_reg),NULL);
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PIOS_SPI_TransferBlock(PIOS_SPI_ACCEL,addr_reg,NULL,sizeof(addr_reg),NULL);
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PIOS_BMA180_ReleaseBus();
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PIOS_BMA180_ReleaseBus();
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EEPROM_WRITEABLE=_we;
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EEPROM_WRITEABLE=_we;
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return 0;
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}
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}
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/**
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/**
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* @brief Read a register from BMA180
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* @brief Read a register from BMA180
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* @returns The register value
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* @returns The register value or -1 if failure to get bus
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* @param reg[in] Register address to be read
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* @param reg[in] Register address to be read
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*/
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*/
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uint8_t PIOS_BMA180_GetReg(uint8_t reg)
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int32_t PIOS_BMA180_GetReg(uint8_t reg)
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{
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{
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uint8_t data;
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uint8_t data;
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PIOS_BMA180_ClaimBus();
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data = PIOS_SPI_TransferByte(PIOS_SPI_ACCEL,(0x80 | reg) );
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if(PIOS_BMA180_ClaimBus() != 0)
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return -1;
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PIOS_SPI_TransferByte(PIOS_SPI_ACCEL,(0x80 | reg) ); // request byte
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data = PIOS_SPI_TransferByte(PIOS_SPI_ACCEL,0 ); // receive response
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PIOS_BMA180_ReleaseBus();
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PIOS_BMA180_ReleaseBus();
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return(data);
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return data;
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}
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}
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/**
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/**
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@ -163,9 +175,11 @@ void PIOS_BMA180_Init()
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/**
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/**
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* @brief Read a single set of values from the x y z channels
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* @brief Read a single set of values from the x y z channels
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* @returns The number of samples remaining in the fifo
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* @returns The number of samples remaining in the fifo or < 0 if failure
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* @retval -1 unable to claim bus
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* @retval -2 unable to transfer data
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*/
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*/
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uint8_t PIOS_BMA180_Read(struct pios_bma180_data * data)
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int32_t PIOS_BMA180_Read(struct pios_bma180_data * data)
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{
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{
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// To save memory use same buffer for in and out but offset by
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// To save memory use same buffer for in and out but offset by
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// a byte
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// a byte
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@ -173,8 +187,10 @@ uint8_t PIOS_BMA180_Read(struct pios_bma180_data * data)
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uint8_t rec[7] = {0,0,0,0,0,0};
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uint8_t rec[7] = {0,0,0,0,0,0};
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buf[0] = BMA_X_LSB_ADDR | 0x80 ; // Multibyte read starting at X LSB
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buf[0] = BMA_X_LSB_ADDR | 0x80 ; // Multibyte read starting at X LSB
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PIOS_BMA180_ClaimBus();
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if(PIOS_BMA180_ClaimBus() != 0)
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PIOS_SPI_TransferBlock(PIOS_SPI_ACCEL,&buf[0],&rec[0],7,NULL);
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return -1;
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if(PIOS_SPI_TransferBlock(PIOS_SPI_ACCEL,&buf[0],&rec[0],7,NULL) != 0)
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return -2;
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PIOS_BMA180_ReleaseBus();
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PIOS_BMA180_ReleaseBus();
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// | MSB | LSB | 0 | new_data |
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// | MSB | LSB | 0 | new_data |
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@ -190,21 +206,23 @@ uint8_t PIOS_BMA180_Read(struct pios_bma180_data * data)
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* @return 0 if success, -1 if failure.
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* @return 0 if success, -1 if failure.
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*
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*
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*/
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*/
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uint8_t PIOS_BMA180_Test()
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int32_t PIOS_BMA180_Test()
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{
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{
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// Read chip ID then version ID
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// Read chip ID then version ID
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uint8_t buf[3] = {0x80 | BMA_CHIPID_ADDR, 0, 0};
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uint8_t buf[3] = {0x80 | BMA_CHIPID_ADDR, 0, 0};
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uint8_t rec[3] = {0,0, 0};
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uint8_t rec[3] = {0,0, 0};
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PIOS_BMA180_ClaimBus();
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if(PIOS_BMA180_ClaimBus() != 0)
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PIOS_SPI_TransferBlock(PIOS_SPI_ACCEL,&buf[0],&rec[0],sizeof(buf),NULL);
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return -1;
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if(PIOS_SPI_TransferBlock(PIOS_SPI_ACCEL,&buf[0],&rec[0],sizeof(buf),NULL) != 0)
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return -2;
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PIOS_BMA180_ReleaseBus();
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PIOS_BMA180_ReleaseBus();
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if((rec[1] & 0x07) != 0x3)
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if(rec[1] != 0x3)
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return -1;
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return -3;
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if(rec[2] != 0x12)
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if(rec[2] < 0x12)
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return -1;
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return -4;
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return 0;
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return 0;
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}
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}
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@ -332,6 +332,7 @@ int32_t PIOS_HMC5883_Test(void)
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if(strncmp("H43\0",id,4) != 0) // match H43
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if(strncmp("H43\0",id,4) != 0) // match H43
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return -1;
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return -1;
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return 0;
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int32_t passed = 1;
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int32_t passed = 1;
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uint8_t registers[3] = {0,0,0};
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uint8_t registers[3] = {0,0,0};
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@ -71,13 +71,13 @@ struct pios_bma180_data {
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};
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};
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/* Public Functions */
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/* Public Functions */
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void PIOS_BMA180_WriteEnable(uint8_t _we);
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int32_t PIOS_BMA180_WriteEnable(uint8_t _we);
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uint8_t PIOS_BMA180_GetReg(uint8_t reg);
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int32_t PIOS_BMA180_GetReg(uint8_t reg);
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void PIOS_BMA180_SetReg(uint8_t reg, uint8_t data);
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void PIOS_BMA180_SetReg(uint8_t reg, uint8_t data);
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void PIOS_BMA180_Attach(uint32_t spi_id);
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void PIOS_BMA180_Attach(uint32_t spi_id);
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void PIOS_BMA180_Init();
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void PIOS_BMA180_Init();
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uint8_t PIOS_BMA180_Read(struct pios_bma180_data * data);
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int32_t PIOS_BMA180_Read(struct pios_bma180_data * data);
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uint8_t PIOS_BMA180_Test();
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int32_t PIOS_BMA180_Test();
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#endif /* PIOS_BMA180_H */
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#endif /* PIOS_BMA180_H */
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