Update the Makefile with new OpenOCD 3 commands. Add config files for OpenOCD in to project folder. This will change as we are moving to the H series tiny as soon as someone gets them in stock.

git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@83 ebee16cc-31ac-478f-84a7-5cbb03baadba

flight/Makefile

@@ -315,21 +315,22 @@ OOCD_LOADFILE+=$(OUTDIR)/$(TARGET).elf
 OOCD_EXE=openocd
 # debug level
 OOCD_CL=-d0
-#OOCD_CL=-d3
 # interface and board/target settings (using the OOCD target-library here)
-OOCD_CL+=-f interface/olimex-arm-usb-ocd.cfg -f target/stm32.cfg
+OOCD_CL+=-f project/OpenOCD/olimex-arm-usb-ocd.cfg -f project/OpenOCD/stm32.cfg
 # initialize
 OOCD_CL+=-c init
-# enable "fast mode" - can be disabled for tests
-OOCD_CL+=-c "fast enable"
 # show the targets
 OOCD_CL+=-c targets
 # commands to prepare flash-write
 OOCD_CL+= -c "reset halt"
 # Try to enable rclk for adaptive speed, fallback to 1Mhz
-# OOCD_CL+= -c "jtag_rclk 1000"
+OOCD_CL+= -c "jtag_rclk 1200"
-# flash-write and -verify
+# flash erase 
-OOCD_CL+=-c "flash write_image erase $(OOCD_LOADFILE)" -c "verify_image $(OOCD_LOADFILE)"
+OOCD_CL+=-c "stm32x mass_erase 0"
+# flash-write
+OOCD_CL+=-c "flash write_image $(OOCD_LOADFILE)" 
+# Verify
+OOCD_CL+=-c "verify_image $(OOCD_LOADFILE)"
 # reset target
 OOCD_CL+=-c "reset run"
 # terminate OOCD after programming

flight/Project/OpenOCD/olimex-arm-usb-ocd.cfg

@@ -0,0 +1,11 @@
+#
+# Olimex ARM-USB-OCD
+#
+# http://www.olimex.com/dev/arm-usb-ocd.html
+#
+
+interface ft2232
+ft2232_device_desc "Olimex OpenOCD JTAG"
+ft2232_layout olimex-jtag
+ft2232_vid_pid 0x15ba 0x0003
+

flight/Project/OpenOCD/stm32.cfg

@@ -0,0 +1,69 @@
+# script for stm32
+
+if { [info exists CHIPNAME] } {
+   set  _CHIPNAME $CHIPNAME
+} else {
+   set  _CHIPNAME stm32
+}
+
+if { [info exists ENDIAN] } {
+   set  _ENDIAN $ENDIAN
+} else {
+   set  _ENDIAN little
+}
+
+# Work-area is a space in RAM used for flash programming
+# By default use 16kB
+if { [info exists WORKAREASIZE] } {
+   set  _WORKAREASIZE $WORKAREASIZE
+} else {
+   set  _WORKAREASIZE 0x4000
+}
+
+# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
+jtag_khz 1000
+
+jtag_nsrst_delay 100
+jtag_ntrst_delay 100
+
+#jtag scan chain
+if { [info exists CPUTAPID ] } {
+   set _CPUTAPID $CPUTAPID
+} else {
+  # See STM Document RM0008
+  # Section 26.6.3
+   set _CPUTAPID 0x3ba00477
+}
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+if { [info exists BSTAPID ] } {
+   # FIXME this never gets used to override defaults...
+   set _BSTAPID $BSTAPID
+} else {
+  # See STM Document RM0008
+  # Section 29.6.2
+  # Low density devices, Rev A
+  set _BSTAPID1 0x06412041
+  # Medium density devices, Rev A
+  set _BSTAPID2 0x06410041
+  # Medium density devices, Rev B and Rev Z
+  set _BSTAPID3 0x16410041
+  # High density devices, Rev A
+  set _BSTAPID4 0x06414041
+  # Connectivity line devices, Rev A and Rev Z
+  set _BSTAPID5 0x06418041
+}
+jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \
+	-expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \
+	-expected-id $_BSTAPID4 -expected-id $_BSTAPID5
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME
+
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
+
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME stm32x 0 0 0 0 $_TARGETNAME
+
+# For more information about the configuration files, take a look at:
+# openocd.texi