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Code Issues Releases Activity

Added configuration for F1+ SWD/StlinkV2

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use it with ./tools/openocd/bin/openocd -f ./flight/Project/OpenOCD/stlink-v2.cfg -f ./flight/Project/OpenOCD/stm32f1x.stlink.cfg
This commit is contained in:
Alessio Morale 2013-03-23 10:58:57 +01:00
parent eff2cf20fd
commit 643f62e175
1 changed files with 34 additions and 0 deletions
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34
flight/Project/OpenOCD/stm32f1x.stlink.cfg Normal file
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# script for stm32
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME stm32
}
# Work-area is a space in RAM used for flash programming
# By default use 16kB
if { [info exists WORKAREASIZE] } {
set _WORKAREASIZE $WORKAREASIZE
} else {
set _WORKAREASIZE 0x4000
}
if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x1ba01477
}
transport select stlink_swd
stlink newtap $_CHIPNAME cpu -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME stm32_stlink -chain-position $_TARGETNAME -rtos auto
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
# flash size will be probed
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME stm32f1x 0x08000000 0 0 0 $_TARGETNAME