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Code Issues Releases Activity

Merge branch 'overo_control' into revo

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This commit is contained in:
James Cotton 2012-07-19 08:35:39 -05:00
commit 7492d34d25
12 changed files with 449 additions and 146 deletions
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173
flight/Modules/OveroSync/overosync.c
View File

@ -31,6 +31,7 @@
*/
#include "openpilot.h"
#include "hwsettings.h"
#include "overosync.h"
#include "overosyncstats.h"
#include "systemstats.h"
@ -49,17 +50,14 @@ static UAVTalkConnection uavTalkCon;
static xTaskHandle overoSyncTaskHandle;
volatile bool buffer_swap_failed;
volatile uint32_t buffer_swap_timeval;
static bool overoEnabled;
// Private functions
static void overoSyncTask(void *parameters);
static int32_t packData(uint8_t * data, int32_t length);
static int32_t transmitData();
static void transmitDataDone(bool crc_ok, uint8_t crc_val);
static void transmitDataDone(uint32_t error_counter);
static void registerObject(UAVObjHandle obj);
// External variables
extern int32_t pios_spi_overo_id;
struct dma_transaction {
uint8_t tx_buffer[OVEROSYNC_PACKET_SIZE] __attribute__ ((aligned(4)));
uint8_t rx_buffer[OVEROSYNC_PACKET_SIZE] __attribute__ ((aligned(4)));
@ -69,68 +67,19 @@ struct overosync {
struct dma_transaction transactions[2];
uint32_t active_transaction_id;
uint32_t loading_transaction_id;
xSemaphoreHandle transaction_lock;
xSemaphoreHandle buffer_lock;
volatile bool transaction_done;
uint32_t packets;
uint32_t sent_bytes;
uint32_t write_pointer;
uint32_t sent_objects;
uint32_t failed_objects;
uint32_t received_objects;
uint32_t framesync_error;
uint32_t underrun_error;
};
struct overosync *overosync;
static void PIOS_OVERO_IRQHandler();
static const struct pios_exti_cfg pios_exti_overo_cfg __exti_config = {
.vector = PIOS_OVERO_IRQHandler,
.line = EXTI_Line15,
.pin = {
.gpio = GPIOA,
.init = {
.GPIO_Pin = GPIO_Pin_15,
.GPIO_Speed = GPIO_Speed_100MHz,
.GPIO_Mode = GPIO_Mode_IN,
.GPIO_OType = GPIO_OType_OD,
.GPIO_PuPd = GPIO_PuPd_NOPULL,
},
},
.irq = {
.init = {
.NVIC_IRQChannel = EXTI15_10_IRQn,
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_MID,
.NVIC_IRQChannelSubPriority = 0,
.NVIC_IRQChannelCmd = ENABLE,
},
},
.exti = {
.init = {
.EXTI_Line = EXTI_Line15, // matches above GPIO pin
.EXTI_Mode = EXTI_Mode_Interrupt,
.EXTI_Trigger = EXTI_Trigger_Rising,
.EXTI_LineCmd = ENABLE,
},
},
};
/**
* On the rising edge of NSS schedule a new transaction. This cannot be
* done by the DMA complete because there is 150 us between that and the
* Overo deasserting the CS line. We don't want to spin that long in an
* isr
*/
void PIOS_OVERO_IRQHandler()
{
// transmitData must not block to get semaphore for when we get out of
// frame and transaction is still running here. -1 indicates the transaction
// semaphore is blocked and we are still in a transaction, thus a framesync
// error occurred. This shouldn't happen. Race condition?
if(transmitData() == -1)
overosync->framesync_error++;
}
/**
* Initialise the telemetry module
* \return -1 if initialisation failed
@ -138,12 +87,26 @@ void PIOS_OVERO_IRQHandler()
*/
int32_t OveroSyncInitialize(void)
{
if(pios_spi_overo_id == 0)
#ifdef MODULE_OVERO_BUILTIN
overoEnabled = true;
#else
HwSettingsInitialize();
uint8_t optionalModules[HWSETTINGS_OPTIONALMODULES_NUMELEM];
HwSettingsOptionalModulesGet(optionalModules);
if (optionalModules[HWSETTINGS_OPTIONALMODULES_OVERO] == HWSETTINGS_OPTIONALMODULES_ENABLED) {
overoEnabled = true;
} else {
overoEnabled = false;
return -1;
}
#endif
OveroSyncStatsInitialize();
PIOS_EXTI_Init(&pios_exti_overo_cfg);
// Create object queues
queue = xQueueCreate(MAX_QUEUE_SIZE, sizeof(UAVObjEvent));
@ -160,18 +123,16 @@ int32_t OveroSyncInitialize(void)
*/
int32_t OveroSyncStart(void)
{
if(pios_spi_overo_id == 0)
//Check if module is enabled or not
if (overoEnabled == false) {
return -1;
}
overosync = (struct overosync *) pvPortMalloc(sizeof(*overosync));
if(overosync == NULL)
return -1;
overosync->transaction_lock = xSemaphoreCreateMutex();
if(overosync->transaction_lock == NULL)
return -1;
overosync->buffer_lock = xSemaphoreCreateMutex();
overosync->buffer_lock = xSemaphoreCreateMutex();
if(overosync->buffer_lock == NULL)
return -1;
@ -180,6 +141,7 @@ int32_t OveroSyncStart(void)
overosync->write_pointer = 0;
overosync->sent_bytes = 0;
overosync->framesync_error = 0;
overosync->packets = 0;
// Process all registered objects and connect queue for updates
UAVObjIterate(&registerObject);
@ -223,14 +185,16 @@ static void overoSyncTask(void *parameters)
UAVObjEvent ev;
// Kick off SPI transfers (once one is completed another will automatically transmit)
overosync->transaction_done = true;
overosync->sent_objects = 0;
overosync->failed_objects = 0;
overosync->received_objects = 0;
portTickType lastUpdateTime = xTaskGetTickCount();
portTickType updateTime;
// Set the comms callback
PIOS_Overo_SetCallback(transmitDataDone);
// Loop forever
while (1) {
// Wait for queue message
@ -253,6 +217,9 @@ static void overoSyncTask(void *parameters)
syncStats.Received = 0;
syncStats.Connected = syncStats.Send > 500 ? OVEROSYNCSTATS_CONNECTED_TRUE : OVEROSYNCSTATS_CONNECTED_FALSE;
syncStats.DroppedUpdates = overosync->failed_objects;
syncStats.FramesyncErrors = overosync->framesync_error;
syncStats.Packets = overosync->packets;
syncStats.UnderrunErrors = overosync->underrun_error;
OveroSyncStatsSet(&syncStats);
overosync->failed_objects = 0;
overosync->sent_bytes = 0;
@ -262,26 +229,6 @@ static void overoSyncTask(void *parameters)
}
}
static void transmitDataDone(bool crc_ok, uint8_t crc_val)
{
uint8_t *rx_buffer;
static signed portBASE_TYPE xHigherPriorityTaskWoken;
rx_buffer = overosync->transactions[overosync->active_transaction_id].rx_buffer;
// Release the semaphore and start another transaction (which grabs semaphore again but then
// returns instantly). Because this is called by the DMA ISR we need to be aware of context
// switches.
xSemaphoreGiveFromISR(overosync->transaction_lock, &xHigherPriorityTaskWoken);
portEND_SWITCHING_ISR(xHigherPriorityTaskWoken);
overosync->transaction_done = true;
// Parse the data from overo
for (uint32_t i = 0; rx_buffer[0] != 0 && i < sizeof(rx_buffer) ; i++)
UAVTalkProcessInputStream(uavTalkCon, rx_buffer[i]);
}
/**
* Transmit data buffer to the modem or USB port.
* \param[in] data Data buffer to send
@ -289,7 +236,6 @@ static void transmitDataDone(bool crc_ok, uint8_t crc_val)
* \return -1 on failure
* \return number of bytes transmitted on success
*/
uint32_t too_long = 0;
static int32_t packData(uint8_t * data, int32_t length)
{
uint8_t *tx_buffer;
@ -306,70 +252,55 @@ static int32_t packData(uint8_t * data, int32_t length)
xSemaphoreGive(overosync->buffer_lock);
return -1;
}
// Get offset into buffer and copy contents
tx_buffer = overosync->transactions[overosync->loading_transaction_id].tx_buffer +
overosync->write_pointer;
overosync->write_pointer;
memcpy(tx_buffer, &tickTime, sizeof(tickTime));
memcpy(tx_buffer + sizeof(tickTime),data,length);
overosync->write_pointer += length + sizeof(tickTime);
overosync->sent_bytes += length;
overosync->sent_objects++;
xSemaphoreGive(overosync->buffer_lock);
// When the NSS line rises while we are packing data then a transaction doesn't start
// because that means we will be here very shortly afterwards (priority of task making that
// not always perfectly true) schedule the transaction here.
if (buffer_swap_failed && (PIOS_DELAY_DiffuS(buffer_swap_timeval) < 50)) {
buffer_swap_failed = false;
transmitData();
} else if (buffer_swap_failed) {
buffer_swap_failed = false;
too_long++;
}
return length;
}
static int32_t transmitData()
/**
* Callback from the overo spi driver at the end of each packet
*/
static void transmitDataDone(uint32_t error_counter)
{
uint8_t *tx_buffer, *rx_buffer;
static signed portBASE_TYPE xHigherPriorityTaskWoken;
// Get this lock first so we don't swap buffers and then fail
// to start
if (xSemaphoreTake(overosync->transaction_lock, 0) == pdFALSE)
return -1;
// Get lock to manipulate buffers
if(xSemaphoreTake(overosync->buffer_lock, 0) == pdFALSE) {
xSemaphoreGiveFromISR(overosync->transaction_lock, &xHigherPriorityTaskWoken);
portEND_SWITCHING_ISR(xHigherPriorityTaskWoken);
buffer_swap_failed = true;
buffer_swap_timeval = PIOS_DELAY_GetRaw();
return -2;
return;
}
overosync->transaction_done = false;
overosync->packets++;
// Swap buffers
overosync->active_transaction_id = overosync->loading_transaction_id;
overosync->loading_transaction_id = (overosync->loading_transaction_id + 1) %
NELEMENTS(overosync->transactions);
// Release the buffer lock
xSemaphoreGive(overosync->buffer_lock);
// Get the new buffers and configure the overo driver
tx_buffer = overosync->transactions[overosync->active_transaction_id].tx_buffer;
rx_buffer = overosync->transactions[overosync->active_transaction_id].rx_buffer;
PIOS_Overo_SetNewBuffer((uint8_t *) tx_buffer, (uint8_t *) rx_buffer,
sizeof(overosync->transactions[overosync->active_transaction_id].tx_buffer));
// Prepare the new loading buffer
memset(overosync->transactions[overosync->loading_transaction_id].tx_buffer, 0xff,
sizeof(overosync->transactions[overosync->loading_transaction_id].tx_buffer));
overosync->write_pointer = 0;
xSemaphoreGiveFromISR(overosync->buffer_lock, &xHigherPriorityTaskWoken);
portEND_SWITCHING_ISR(xHigherPriorityTaskWoken);
return PIOS_SPI_TransferBlock(pios_spi_overo_id, (uint8_t *) tx_buffer, (uint8_t *) rx_buffer, sizeof(overosync->transactions[overosync->active_transaction_id].tx_buffer), &transmitDataDone) == 0 ? 0 : -3;
overosync->underrun_error = error_counter;
}
/**

310
flight/PiOS/STM32F4xx/pios_overo.c Normal file
View File

@ -0,0 +1,310 @@
/**
******************************************************************************
* @addtogroup PIOS PIOS Core hardware abstraction layer
* @{
* @addtogroup PIOS_OVERO OVERO Functions
* @brief PIOS interface to read and write to overo
* @{
*
* @file pios_overo.c
* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2012.
* @brief Hardware Abstraction Layer for Overo communications
* @see The GNU Public License (GPL) Version 3
* @notes
*
*****************************************************************************/
/*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <pios.h>
/**
* Configures the SPI device to use a double buffered DMA for transferring
* data. At the end of each transfer (NSS goes high) it makes sure to reset
* the DMA counter to the beginning of each packet and swap to the next
* buffer
*/
#if defined(PIOS_INCLUDE_SPI)
#include <pios_overo.h>
#define PACKET_SIZE 1024
static void PIOS_OVERO_NSS_IRQHandler();
static const struct pios_exti_cfg pios_exti_overo_cfg __exti_config = {
.vector = PIOS_OVERO_NSS_IRQHandler,
.line = EXTI_Line15,
.pin = {
.gpio = GPIOA,
.init = {
.GPIO_Pin = GPIO_Pin_15,
.GPIO_Speed = GPIO_Speed_100MHz,
.GPIO_Mode = GPIO_Mode_IN,
.GPIO_OType = GPIO_OType_OD,
.GPIO_PuPd = GPIO_PuPd_NOPULL,
},
},
.irq = {
.init = {
.NVIC_IRQChannel = EXTI15_10_IRQn,
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_MID,
.NVIC_IRQChannelSubPriority = 0,
.NVIC_IRQChannelCmd = ENABLE,
},
},
.exti = {
.init = {
.EXTI_Line = EXTI_Line15, // matches above GPIO pin
.EXTI_Mode = EXTI_Mode_Interrupt,
.EXTI_Trigger = EXTI_Trigger_Rising,
.EXTI_LineCmd = ENABLE,
},
},
};
static bool PIOS_OVERO_validate(struct pios_overo_dev * com_dev)
{
/* Should check device magic here */
return(true);
}
#if defined(PIOS_INCLUDE_FREERTOS)
static struct pios_overo_dev * PIOS_OVERO_alloc(void)
{
return (malloc(sizeof(struct pios_overo_dev)));
}
#else
#error Unsupported
#endif
//! Global variable
struct pios_overo_dev * overo_dev;
/**
* Initialises Overo pins
* \param[in] mode currently only mode 0 supported
* \return < 0 if initialisation failed
*/
int32_t PIOS_Overo_Init(const struct pios_overo_cfg * cfg)
{
PIOS_Assert(cfg);
overo_dev = (struct pios_overo_dev *) PIOS_OVERO_alloc();
if (!overo_dev) goto out_fail;
/* Bind the configuration to the device instance */
overo_dev->cfg = cfg;
/* Disable callback function */
overo_dev->callback = NULL;
/* Set a null buffer initially */
overo_dev->new_tx_buffer = 0;
overo_dev->new_rx_buffer = 0;
/* only legal for single-slave config */
PIOS_Assert(overo_dev->cfg->slave_count == 1);
SPI_SSOutputCmd(overo_dev->cfg->regs, (overo_dev->cfg->init.SPI_Mode == SPI_Mode_Master) ? ENABLE : DISABLE);
/* Initialize the GPIO pins */
/* note __builtin_ctz() due to the difference between GPIO_PinX and GPIO_PinSourceX */
GPIO_PinAFConfig(overo_dev->cfg->sclk.gpio,
__builtin_ctz(overo_dev->cfg->sclk.init.GPIO_Pin),
overo_dev->cfg->remap);
GPIO_PinAFConfig(overo_dev->cfg->mosi.gpio,
__builtin_ctz(overo_dev->cfg->mosi.init.GPIO_Pin),
overo_dev->cfg->remap);
GPIO_PinAFConfig(overo_dev->cfg->miso.gpio,
__builtin_ctz(overo_dev->cfg->miso.init.GPIO_Pin),
overo_dev->cfg->remap);
GPIO_PinAFConfig(overo_dev->cfg->ssel[0].gpio,
__builtin_ctz(overo_dev->cfg->ssel[0].init.GPIO_Pin),
overo_dev->cfg->remap);
GPIO_Init(overo_dev->cfg->sclk.gpio, (GPIO_InitTypeDef*)&(overo_dev->cfg->sclk.init));
GPIO_Init(overo_dev->cfg->mosi.gpio, (GPIO_InitTypeDef*)&(overo_dev->cfg->mosi.init));
GPIO_Init(overo_dev->cfg->miso.gpio, (GPIO_InitTypeDef*)&(overo_dev->cfg->miso.init));
/* Configure DMA for SPI Rx */
DMA_DeInit(overo_dev->cfg->dma.rx.channel);
DMA_Cmd(overo_dev->cfg->dma.rx.channel, DISABLE);
DMA_Init(overo_dev->cfg->dma.rx.channel, (DMA_InitTypeDef*)&(overo_dev->cfg->dma.rx.init));
/* Configure DMA for SPI Tx */
DMA_DeInit(overo_dev->cfg->dma.tx.channel);
DMA_Cmd(overo_dev->cfg->dma.tx.channel, DISABLE);
DMA_Init(overo_dev->cfg->dma.tx.channel, (DMA_InitTypeDef*)&(overo_dev->cfg->dma.tx.init));
/* Initialize the SPI block */
SPI_DeInit(overo_dev->cfg->regs);
SPI_Init(overo_dev->cfg->regs, (SPI_InitTypeDef*)&(overo_dev->cfg->init));
/* Configure CRC calculation */
if (overo_dev->cfg->use_crc) {
SPI_CalculateCRC(overo_dev->cfg->regs, ENABLE);
} else {
SPI_CalculateCRC(overo_dev->cfg->regs, DISABLE);
}
/* Enable SPI */
SPI_Cmd(overo_dev->cfg->regs, ENABLE);
/* Enable SPI interrupts to DMA */
SPI_I2S_DMACmd(overo_dev->cfg->regs, SPI_I2S_DMAReq_Tx | SPI_I2S_DMAReq_Rx, ENABLE);
/* Configure DMA interrupt */
NVIC_Init((NVIC_InitTypeDef*)&(overo_dev->cfg->dma.irq.init));
/* Configure the interrupt for rising edge of NSS */
PIOS_EXTI_Init(&pios_exti_overo_cfg);
return(0);
out_fail:
return(-1);
}
/**
* Transfers a block of bytes via DMA.
* \param[in] overo_id SPI device handle
* \param[in] send_buffer pointer to buffer which should be sent.<BR>
* If NULL, 0xff (all-one) will be sent.
* \param[in] receive_buffer pointer to buffer which should get the received values.<BR>
* If NULL, received bytes will be discarded.
* \param[in] len number of bytes which should be transfered
* \param[in] callback pointer to callback function which will be executed
* from DMA channel interrupt once the transfer is finished.
* If NULL, no callback function will be used, and PIOS_SPI_TransferBlock() will
* block until the transfer is finished.
* \return >= 0 if no error during transfer
* \return -1 if disabled SPI port selected
* \return -3 if function has been called during an ongoing DMA transfer
*/
int32_t PIOS_Overo_SetNewBuffer(const uint8_t *send_buffer, uint8_t *receive_buffer, uint16_t len)
{
bool valid = PIOS_OVERO_validate(overo_dev);
PIOS_Assert(valid)
bool overrun = overo_dev->new_tx_buffer || overo_dev->new_rx_buffer;
/* Cache next buffer */
overo_dev->new_tx_buffer = (uint32_t) send_buffer;
overo_dev->new_rx_buffer = (uint32_t) receive_buffer;
/* No error */
return overrun ? -1 : 0;
}
/**
* Set the callback function
*/
int32_t PIOS_Overo_SetCallback(void *callback)
{
overo_dev->callback = callback;
return 0;
}
/**
* On the rising edge of NSS schedule a new transaction. This cannot be
* done by the DMA complete because there is 150 us between that and the
* Overo deasserting the CS line. We don't want to spin that long in an
* isr.
*
* 1. Disable the DMA channel
* 2. Check that the DMA counter is at the end of the buffer (increase an
* error counter if not)
* 3. Reset the DMA counter to the end of the beginning of the buffer
* 4. Swap the buffer
* 5. Enable the DMA channel
*/
void PIOS_OVERO_NSS_IRQHandler()
{
static uint32_t error_counter = 0;
bool valid = PIOS_OVERO_validate(overo_dev);
PIOS_Assert(valid)
/* Disable the SPI peripheral */
SPI_Cmd(overo_dev->cfg->regs, DISABLE);
/* Disable the DMA commands */
DMA_Cmd(overo_dev->cfg->dma.tx.channel, DISABLE);
DMA_Cmd(overo_dev->cfg->dma.rx.channel, DISABLE);
/* Check that the previous DMA transfer completed */
if(DMA_GetCurrDataCounter(overo_dev->cfg->dma.tx.channel) ||
DMA_GetCurrDataCounter(overo_dev->cfg->dma.rx.channel))
error_counter++;
/* Disable and initialize the SPI peripheral */
SPI_DeInit(overo_dev->cfg->regs);
SPI_Init(overo_dev->cfg->regs, (SPI_InitTypeDef*)&(overo_dev->cfg->init));
SPI_Cmd(overo_dev->cfg->regs, DISABLE);
/* Enable SPI interrupts to DMA */
SPI_I2S_DMACmd(overo_dev->cfg->regs, SPI_I2S_DMAReq_Tx | SPI_I2S_DMAReq_Rx, ENABLE);
/* Reinit the DMA channels */
DMA_InitTypeDef dma_init;
DMA_DeInit(overo_dev->cfg->dma.rx.channel);
dma_init = overo_dev->cfg->dma.rx.init;
if (overo_dev->new_rx_buffer) {
/* Enable memory addr. increment - bytes written into receive buffer */
dma_init.DMA_Memory0BaseAddr = (uint32_t) overo_dev->new_rx_buffer;
dma_init.DMA_MemoryInc = DMA_MemoryInc_Enable;
dma_init.DMA_BufferSize = PACKET_SIZE;
}
DMA_Init(overo_dev->cfg->dma.rx.channel, &(dma_init));
DMA_DeInit(overo_dev->cfg->dma.tx.channel);
dma_init = overo_dev->cfg->dma.tx.init;
if (overo_dev->new_tx_buffer) {
/* Enable memory addr. increment - bytes written into receive buffer */
dma_init.DMA_Memory0BaseAddr = (uint32_t) overo_dev->new_tx_buffer;
dma_init.DMA_MemoryInc = DMA_MemoryInc_Enable;
dma_init.DMA_BufferSize = PACKET_SIZE;
}
DMA_Init(overo_dev->cfg->dma.tx.channel, &(dma_init));
/* Make sure to flush out the receive buffer */
(void)SPI_I2S_ReceiveData(overo_dev->cfg->regs);
/* Enable the DMA endpoints for valid buffers */
if(overo_dev->new_rx_buffer)
DMA_Cmd(overo_dev->cfg->dma.rx.channel, ENABLE);
if(overo_dev->new_tx_buffer)
DMA_Cmd(overo_dev->cfg->dma.tx.channel, ENABLE);
/* Reenable the SPI peripheral */
SPI_Cmd(overo_dev->cfg->regs, ENABLE);
/* Indicate these buffers have been used */
overo_dev->new_tx_buffer = 0;
overo_dev->new_rx_buffer = 0;
if (overo_dev->callback != NULL)
overo_dev->callback(error_counter);
}
#endif
/**
* @}
* @}
*/

65
flight/PiOS/inc/pios_overo.h Normal file
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@ -0,0 +1,65 @@
/**
******************************************************************************
* @addtogroup PIOS PIOS Core hardware abstraction layer
* @{
* @addtogroup PIOS_OVERO Overo Functions
* @{
*
* @file pios_overo.h
* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2012.
* @brief Overo functions header.
* @see The GNU Public License (GPL) Version 3
*
*****************************************************************************/
/*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef PIOS_OVERO_H
#define PIOS_OVERO_H
#include <pios.h>
#include <pios_stm32.h>
struct pios_overo_cfg {
SPI_TypeDef *regs;
uint32_t remap; /* GPIO_Remap_* or GPIO_AF_* */
SPI_InitTypeDef init;
bool use_crc;
struct stm32_dma dma;
struct stm32_gpio sclk;
struct stm32_gpio miso;
struct stm32_gpio mosi;
uint32_t slave_count;
struct stm32_gpio ssel[];
};
struct pios_overo_dev {
const struct pios_overo_cfg * cfg;
void (*callback) (uint32_t);
uint32_t new_tx_buffer;
uint32_t new_rx_buffer;
};
extern int32_t PIOS_Overo_Init(const struct pios_overo_cfg * cfg);
extern int32_t PIOS_Overo_SetCallback(void *callback);
extern int32_t PIOS_Overo_SetNewBuffer(const uint8_t *send_buffer, uint8_t *receive_buffer, uint16_t len);
#endif /* PIOS_OVERO_H */
/**
* @}
* @}
*/

1
flight/PiOS/pios.h
View File

@ -86,6 +86,7 @@
#include <pios_rtc.h>
#include <pios_i2c.h>
#include <pios_spi.h>
#include <pios_overo.h>
#include <pios_ppm.h>
#include <pios_pwm.h>
#include <pios_rcvr.h>

2
flight/Revolution/System/pios_board.c
View File

@ -404,7 +404,7 @@ void PIOS_Board_Init(void) {
#if defined(PIOS_OVERO_SPI)
/* Set up the SPI interface to the gyro */
if (PIOS_SPI_Init(&pios_spi_overo_id, &pios_spi_overo_cfg)) {
if (PIOS_Overo_Init(&pios_overo_cfg)) {
PIOS_DEBUG_Assert(0);
}
#endif

1
flight/Revolution/UAVObjects.inc
View File

@ -63,6 +63,7 @@ UAVOBJSRCFILENAMES += nedaccel
UAVOBJSRCFILENAMES += nedposition
UAVOBJSRCFILENAMES += objectpersistence
UAVOBJSRCFILENAMES += overosyncstats
UAVOBJSRCFILENAMES += overosyncsettings
UAVOBJSRCFILENAMES += pathplannersettings
UAVOBJSRCFILENAMES += pathdesired
UAVOBJSRCFILENAMES += positionactual

24
flight/board_hw_defs/revolution/board_hw_defs.c
View File

@ -451,10 +451,7 @@ void PIOS_SPI_flash_irq_handler(void)
/* SPI3 Interface
* - Used for flash communications
*/
void PIOS_SPI_overo_irq_handler(void);
void DMA1_Stream0_IRQHandler(void) __attribute__((alias("PIOS_SPI_overo_irq_handler")));
void DMA1_Stream7_IRQHandler(void) __attribute__((alias("PIOS_SPI_overo_irq_handler")));
static const struct pios_spi_cfg pios_spi_overo_cfg = {
static const struct pios_overo_cfg pios_overo_cfg = {
.regs = SPI3,
.remap = GPIO_AF_SPI3,
.init = {
@ -469,18 +466,7 @@ static const struct pios_spi_cfg pios_spi_overo_cfg = {
.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2,
},
.use_crc = false,
.dma = {
.irq = {
// Note this is the stream ID that triggers interrupts (in this case RX)
.flags = (DMA_IT_TCIF0 | DMA_IT_TEIF0 | DMA_IT_HTIF0),
.init = {
.NVIC_IRQChannel = DMA1_Stream0_IRQn,
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGH,
.NVIC_IRQChannelSubPriority = 0,
.NVIC_IRQChannelCmd = ENABLE,
},
},
.dma = {
.rx = {
.channel = DMA1_Stream0,
.init = {
@ -562,12 +548,6 @@ static const struct pios_spi_cfg pios_spi_overo_cfg = {
} },
};
uint32_t pios_spi_overo_id;
void PIOS_SPI_overo_irq_handler(void)
{
/* Call into the generic code to handle the IRQ for this specific device */
PIOS_SPI_IRQ_Handler(pios_spi_overo_id);
}
#else
uint32_t pios_spi_overo_id = 0;
#endif /* PIOS_OVERO_SPI */

2
ground/openpilotgcs/src/plugins/uavobjects/uavobjects.pro
View File

@ -46,6 +46,7 @@ HEADERS += $$UAVOBJECT_SYNTHETICS/accessorydesired.h \
$$UAVOBJECT_SYNTHETICS/systemalarms.h \
$$UAVOBJECT_SYNTHETICS/objectpersistence.h \
$$UAVOBJECT_SYNTHETICS/overosyncstats.h \
$$UAVOBJECT_SYNTHETICS/overosyncsettings.h \
$$UAVOBJECT_SYNTHETICS/systemsettings.h \
$$UAVOBJECT_SYNTHETICS/stabilizationsettings.h \
$$UAVOBJECT_SYNTHETICS/manualcontrolsettings.h \
@ -114,6 +115,7 @@ SOURCES += $$UAVOBJECT_SYNTHETICS/accessorydesired.cpp \
$$UAVOBJECT_SYNTHETICS/systemalarms.cpp \
$$UAVOBJECT_SYNTHETICS/objectpersistence.cpp \
$$UAVOBJECT_SYNTHETICS/overosyncstats.cpp \
$$UAVOBJECT_SYNTHETICS/overosyncsettings.cpp \
$$UAVOBJECT_SYNTHETICS/systemsettings.cpp \
$$UAVOBJECT_SYNTHETICS/stabilizationsettings.cpp \
$$UAVOBJECT_SYNTHETICS/manualcontrolsettings.cpp \

2
overo

@ -1 +1 @@
Subproject commit 335a3486dd41e48345209d0a65d49a8cc8b442a1
Subproject commit 5ceb2258737dbd30e5f82f0d5a84a7b6ae861495

2
shared/uavobjectdefinition/hwsettings.xml
View File

@ -18,7 +18,7 @@
<field name="USB_HIDPort" units="function" type="enum" elements="1" options="USBTelemetry,Disabled" defaultvalue="USBTelemetry"/>
<field name="USB_VCPPort" units="function" type="enum" elements="1" options="USBTelemetry,ComBridge,Disabled" defaultvalue="Disabled"/>
<field name="OptionalModules" units="" type="enum" elementnames="CameraStab,GPS,ComUsbBridge,Fault,Altitude,Airspeed,TxPID,Battery,VtolPathFollower,FixedWingPathFollower" options="Disabled,Enabled" defaultvalue="Disabled"/>
<field name="OptionalModules" units="" type="enum" elementnames="CameraStab,GPS,ComUsbBridge,Fault,Altitude,Airspeed,TxPID,VtolPathFollower,FixedWingPathFollower,Battery,Overo" options="Disabled,Enabled" defaultvalue="Disabled"/>
<field name="DSMxBind" units="" type="uint8" elements="1" defaultvalue="0"/>
<access gcs="readwrite" flight="readwrite"/>

10
shared/uavobjectdefinition/overosyncsettings.xml Normal file
View File

@ -0,0 +1,10 @@
<xml>
<object name="OveroSyncSettings" singleinstance="true" settings="true">
<description>Settings to control the behavior of the overo sync module</description>
<field name="LogOn" units="" type="enum" options="Never,Always,Armed" elements="1" defaultvalue="Armed"/>
<access gcs="readwrite" flight="readwrite"/>
<telemetrygcs acked="false" updatemode="manual" period="0"/>
<telemetryflight acked="false" updatemode="onchange" period="0"/>
<logging updatemode="periodic" period="1000"/>
</object>
</xml>

3
shared/uavobjectdefinition/overosyncstats.xml
View File

@ -4,7 +4,10 @@
<field name="Connected" units="" type="enum" options="False,True" elements="1" default="False"/>
<field name="Send" units="B/s" type="uint32" elements="1"/>
<field name="Received" units="B/s" type="uint32" elements="1"/>
<field name="FramesyncErrors" units="count" type="uint32" elements="1"/>
<field name="UnderrunErrors" units="count" type="uint32" elements="1"/>
<field name="DroppedUpdates" units="" type="uint32" elements="1"/>
<field name="Packets" units="" type="uint32" elements="1"/>
<access gcs="readwrite" flight="readwrite"/>
<telemetrygcs acked="false" updatemode="manual" period="0"/>
<telemetryflight acked="false" updatemode="periodic" period="1000"/>