diff --git a/flight/PiOS/STM32F4xx/pios_spi.c b/flight/PiOS/STM32F4xx/pios_spi.c
index e89253d23..4ca4d07f6 100644
--- a/flight/PiOS/STM32F4xx/pios_spi.c
+++ b/flight/PiOS/STM32F4xx/pios_spi.c
@@ -184,7 +184,6 @@ int32_t PIOS_SPI_Init(uint32_t * spi_id, const struct pios_spi_cfg * cfg)
 
 	/* Configure DMA interrupt */
 	NVIC_Init((NVIC_InitTypeDef*)&(spi_dev->cfg->dma.irq.init));
-//	DMA_ITConfig(spi_dev->cfg->dma.tx.channel, spi_dev->cfg->dma.irq.flags, ENABLE);	/* XXX is this correct? */
 
 	return(0);
 
@@ -630,12 +629,6 @@ void PIOS_SPI_IRQ_Handler(uint32_t spi_id)
 		/* Wait for the final bytes of the transfer to complete, including CRC byte(s). */
 		while (!(SPI_I2S_GetFlagStatus(spi_dev->cfg->regs, SPI_I2S_FLAG_TXE))) ;
 
-		/* Wait for the final bytes of the transfer to complete, including CRC byte(s). */
-		while (SPI_I2S_GetFlagStatus(spi_dev->cfg->regs, SPI_I2S_FLAG_BSY)) ;
-	} else {
-		/* Wait for the final bytes of the transfer to complete, including CRC byte(s). */
-		while (!(SPI_I2S_GetFlagStatus(spi_dev->cfg->regs, SPI_I2S_FLAG_TXE))) ;
-		
 		/* Wait for the final bytes of the transfer to complete, including CRC byte(s). */
 		while (SPI_I2S_GetFlagStatus(spi_dev->cfg->regs, SPI_I2S_FLAG_BSY)) ;
 	}