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Code Issues Releases Activity

Added watchdog to radio com bridge in PipXtreme.

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This commit is contained in:
Brian Webb 2012-04-07 19:12:49 -07:00
parent f4d886de75
commit 7b49a6b820
5 changed files with 26 additions and 49 deletions
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20
flight/Modules/RadioComBridge/RadioComBridge.c
View File

@ -39,7 +39,7 @@
#include <stdbool.h>
#undef PIOS_INCLUDE_USB
//#undef PIOS_INCLUDE_USB
// ****************
// Private functions
@ -117,6 +117,10 @@ static int32_t RadioComBridgeStart(void)
// Start the tasks
xTaskCreate(radio2ComBridgeTask, (signed char *)"Radio2ComBridge", STACK_SIZE_BYTES/2, NULL, TASK_PRIORITY, &(data->radio2ComBridgeTaskHandle));
xTaskCreate(com2RadioBridgeTask, (signed char *)"Com2RadioBridge", STACK_SIZE_BYTES/2, NULL, TASK_PRIORITY, &(data->com2RadioBridgeTaskHandle));
#ifdef PIOS_INCLUDE_WDG
PIOS_WDG_RegisterFlag(PIOS_WDG_RADIOCOM);
PIOS_WDG_RegisterFlag(PIOS_WDG_COMRADIO);
#endif
return 0;
}
@ -186,10 +190,16 @@ static void radio2ComBridgeTask(void *parameters)
while (1) {
uint32_t rx_bytes;
#ifdef PIOS_INCLUDE_WDG
// Update the watchdog timer.
PIOS_WDG_UpdateFlag(PIOS_WDG_RADIOCOM);
#endif /* PIOS_INCLUDE_WDG */
// Receive data from the radio port
rx_bytes = PIOS_COM_ReceiveBuffer(data->radio_port, data->radio2com_buf, BRIDGE_BUF_LEN, 500);
rx_bytes = PIOS_COM_ReceiveBuffer(data->radio_port, data->radio2com_buf, BRIDGE_BUF_LEN, 200);
if (rx_bytes > 0)
PHReceivePacket(pios_packet_handler, (PHPacketHandle)data->radio2com_buf);
}
}
@ -205,6 +215,7 @@ static void com2RadioBridgeTask(void * parameters)
/* Handle usart/usb -> radio direction */
while (1) {
#if defined(PIOS_INCLUDE_USB)
// Determine input port (USB takes priority over telemetry port)
if (PIOS_USB_CheckAvailable(0) && PIOS_COM_TELEM_USB)
@ -213,6 +224,11 @@ static void com2RadioBridgeTask(void * parameters)
#endif /* PIOS_INCLUDE_USB */
inputPort = data->com_port;
#ifdef PIOS_INCLUDE_WDG
// Update the watchdog timer.
PIOS_WDG_UpdateFlag(PIOS_WDG_COMRADIO);
#endif /* PIOS_INCLUDE_WDG */
// Receive data from the com port
uint32_t cur_rx_bytes = PIOS_COM_ReceiveBuffer(inputPort, data->com2radio_buf +
rx_bytes, BRIDGE_BUF_LEN - rx_bytes, timeout);

6
flight/PiOS/Boards/STM32103CB_PIPXTREME_Rev1.h
View File

@ -71,10 +71,8 @@ TIM4 | RC In 1 | Servo 3 | Servo 2 | Servo 1
//------------------------
#define PIOS_WATCHDOG_TIMEOUT 250
#define PIOS_WDG_REGISTER BKP_DR4
#define PIOS_WDG_ACTUATOR 0x0001
#define PIOS_WDG_STABILIZATION 0x0002
#define PIOS_WDG_ATTITUDE 0x0004
#define PIOS_WDG_MANUAL 0x0008
#define PIOS_WDG_RADIOCOM 0x0001
#define PIOS_WDG_COMRADIO 0x0002
//------------------------
// TELEMETRY

4
flight/PiOS/Common/pios_rfm22b.c
View File

@ -474,10 +474,6 @@ int32_t PIOS_RFM22B_Init(uint32_t *rfm22b_id, const struct pios_rfm22b_cfg *cfg)
TX_LED_ON;
PIOS_DELAY_WaitmS(200);
#if defined(PIOS_INCLUDE_WDG)
processWatchdog();
#endif
}
PIOS_DELAY_WaitmS(1000);

2
flight/PipXtreme/System/inc/pios_config.h
View File

@ -66,7 +66,7 @@
#define PIOS_INCLUDE_GPIO
#define PIOS_INCLUDE_EXTI
#define PIOS_INCLUDE_RTC
//#define PIOS_INCLUDE_WDG
#define PIOS_INCLUDE_WDG
#define PIOS_INCLUDE_BL_HELPER
/* A really shitty setting saving implementation */

43
make/firmware-defs.mk
View File

@ -49,8 +49,6 @@ MSG_OPFIRMWARE := ${quote} OPFW ${quote}
MSG_FWINFO := ${quote} FWINFO ${quote}
MSG_JTAG_PROGRAM := ${quote} JTAG-PGM ${quote}
MSG_JTAG_WIPE := ${quote} JTAG-WIPE ${quote}
MSG_JTAG_RESET := ${quote} JTAG-RST ${quote}
MSG_JTAG_SAFEBOOT := ${quote} JTAG-SAFE ${quote}
toprel = $(subst $(realpath $(TOP))/,,$(abspath $(1)))
@ -118,7 +116,7 @@ FORCE:
$(1).firmwareinfo.c: $(1) $(TOP)/make/templates/firmwareinfotemplate.c FORCE
@echo $(MSG_FWINFO) $$(call toprel, $$@)
$(V1) python $(TOP)/make/scripts/version-info.py \
python $(TOP)/make/scripts/version-info.py \
--path=$(TOP) \
--template=$(TOP)/make/templates/firmwareinfotemplate.c \
--outfile=$$@ \
@ -203,7 +201,6 @@ endef
# $(1) = Name of binary image to write
# $(2) = Base of flash region to write/wipe
# $(3) = Size of flash region to write/wipe
# $(4) = OpenOCD configuration file to use
define JTAG_TEMPLATE
# ---------------------------------------------------------------------------
# Options for OpenOCD flash-programming
@ -216,7 +213,7 @@ OOCD_EXE ?= openocd
OOCD_JTAG_SETUP = -d0
# interface and board/target settings (using the OOCD target-library here)
OOCD_JTAG_SETUP += -s $(TOP)/flight/Project/OpenOCD
OOCD_JTAG_SETUP += -f foss-jtag.revb.cfg -f $(4)
OOCD_JTAG_SETUP += -f flyswatter.cfg -f stm32f1x.cfg
# initialize
OOCD_BOARD_RESET = -c init
@ -231,8 +228,8 @@ program: $(1)
$(V1) $(OOCD_EXE) \
$$(OOCD_JTAG_SETUP) \
$$(OOCD_BOARD_RESET) \
-c "flash write_image erase $$< $(2) bin" \
-c "verify_image $$< $(2) bin" \
-c "flash write_image erase $(subst c:,,$(1)) $(2) bin" \
-c "verify_image $(subst c:,,$(1)) $(2) bin" \
-c "reset run" \
-c "shutdown"
@ -245,34 +242,4 @@ wipe:
-c "flash erase_address pad $(2) $(3)" \
-c "reset run" \
-c "shutdown"
reset:
@echo $(MSG_JTAG_RESET) resetting device
$(V1) $(OOCD_EXE) \
$$(OOCD_JTAG_SETUP) \
$$(OOCD_BOARD_RESET) \
-c "reset run" \
-c "shutdown"
# Enable PWR and BKP clocks (set RCC_APB1ENR[PWREN|BKPEN])
OOCD_WRITE_BKPDR3 = -c "mww 0x4002101C 0x18000000"
# Enable writes to BKP registers (set PWR_CR[DBP] via bit op alias address)
#
# Direct register access would be:
# mww 0x40007000 0x00000100
#
# Direct _bit_ access is:
# Bit 8 in 0x40007000 = 0x42000000 + 0x7000 * 32 + 8 * 4 = 420E0020
OOCD_WRITE_BKPDR3 += -c "mww 0x420E0020 0x00000001"
# Set BR3 to max value to force a safe boot
OOCD_WRITE_BKPDR3 += -c "mwh 0x40006C0C 0xFFFF"
safeboot:
@echo $(MSG_JTAG_SAFEBOOT) forcing boot into safe mode
$(V1) $(OOCD_EXE) \
$$(OOCD_JTAG_SETUP) \
$$(OOCD_BOARD_RESET) \
$$(OOCD_WRITE_BKPDR3) \
-c "reset run" \
-c "shutdown"
endef
endef