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OP-1312 keep pulse timings low to have more margin to handle bus contentions and irq response time.
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@ -44,6 +44,11 @@
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#define PIOS_WS2811_PERIPHERALDATASIZE DMA_PeripheralDataSize_HalfWord
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#define PIOS_WS2811_PERIPHERALDATASIZE DMA_PeripheralDataSize_HalfWord
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#define PIOS_WS2811_TIM_PERIOD 20
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#define PIOS_WS2811_TIM_PERIOD 20
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// Following times are keept on the lower side to accounts
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// for bus contentions and irq response time
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#define PIOS_WS2811_T0_HIGH_PERIOD 25 // .35us +/- 150nS
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#define PIOS_WS2811_T1_HIGH_PERIOD 60 // .70us +/- 150nS
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#define PIOS_WS2811_DMA_CH1_CONFIG(channel) \
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#define PIOS_WS2811_DMA_CH1_CONFIG(channel) \
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{ \
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{ \
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.DMA_BufferSize = PIOS_WS2811_BUFFER_SIZE, \
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.DMA_BufferSize = PIOS_WS2811_BUFFER_SIZE, \
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@ -215,10 +215,10 @@ void setupTimer()
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};
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};
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// (duty in ticks) / (period in ticks) * 1.25uS (period in S) = 0.40 uS
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// (duty in ticks) / (period in ticks) * 1.25uS (period in S) = 0.40 uS
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oc.TIM_Pulse = 40 * PIOS_WS2811_TIM_PERIOD / 125;
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oc.TIM_Pulse = PIOS_WS2811_T0_HIGH_PERIOD * PIOS_WS2811_TIM_PERIOD / 125;
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genericTIM_OCxInit(pios_ws2811_cfg->timer, &oc, pios_ws2811_cfg->timerCh1);
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genericTIM_OCxInit(pios_ws2811_cfg->timer, &oc, pios_ws2811_cfg->timerCh1);
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// (duty in ticks) / (period in ticks) * 1.25uS (period in S) = 0.80 uS
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// (duty in ticks) / (period in ticks) * 1.25uS (period in S) = 0.80 uS
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oc.TIM_Pulse = 80 * PIOS_WS2811_TIM_PERIOD / 125;
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oc.TIM_Pulse = PIOS_WS2811_T1_HIGH_PERIOD * PIOS_WS2811_TIM_PERIOD / 125;
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genericTIM_OCxInit(pios_ws2811_cfg->timer, &oc, pios_ws2811_cfg->timerCh2);
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genericTIM_OCxInit(pios_ws2811_cfg->timer, &oc, pios_ws2811_cfg->timerCh2);
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}
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}
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@ -337,7 +337,7 @@ void PIOS_WS2811_Update()
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void PIOS_WS2811_DMA_irq_handler()
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void PIOS_WS2811_DMA_irq_handler()
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{
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{
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TIM_Cmd(pios_ws2811_cfg->timer, DISABLE);
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pios_ws2811_cfg->timer->CR1 &= (uint16_t) ~TIM_CR1_CEN;
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DMA_ClearFlag(pios_ws2811_cfg->streamCh1, pios_ws2811_cfg->irq.flags);
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DMA_ClearFlag(pios_ws2811_cfg->streamCh1, pios_ws2811_cfg->irq.flags);
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}
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}
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