From 8bd08e381a373f23581bcdcb75608db5f45943aa Mon Sep 17 00:00:00 2001 From: Stacey Sheldon Date: Tue, 24 May 2011 00:25:34 -0400 Subject: [PATCH] build: add support for EE bank on pipx boards The pipxtreme boards use a sector of the on-board flash for configuration storage. Adjust the memory maps to reflect this. The board_info_blob is also extended to include the EE bank definitions. This should be used by the pipxtreme firmware rather than determining it based on chip size. --- flight/Bootloaders/PipXtreme/Makefile | 2 ++ flight/PiOS/Common/pios_board_info.c | 4 ++++ flight/PiOS/STM32F10x/link_STM32103CB_PIPXTREME_memory.ld | 3 ++- flight/PiOS/inc/pios_board_info.h | 2 ++ 4 files changed, 10 insertions(+), 1 deletion(-) diff --git a/flight/Bootloaders/PipXtreme/Makefile b/flight/Bootloaders/PipXtreme/Makefile index e3e7b45a7..dbf537bab 100644 --- a/flight/Bootloaders/PipXtreme/Makefile +++ b/flight/Bootloaders/PipXtreme/Makefile @@ -259,6 +259,8 @@ BLONLY_CDEFS += -DBOOTLOADER_VERSION=$(BOOTLOADER_VERSION) BLONLY_CDEFS += -DFW_BANK_BASE=$(FW_BANK_BASE) BLONLY_CDEFS += -DFW_BANK_SIZE=$(FW_BANK_SIZE) BLONLY_CDEFS += -DFW_DESC_SIZE=$(FW_DESC_SIZE) +BLONLY_CDEFS += -DEE_BANK_BASE=$(EE_BANK_BASE) +BLONLY_CDEFS += -DEE_BANK_SIZE=$(EE_BANK_SIZE) # Place project-specific -D and/or -U options for # Assembler with preprocessor here. diff --git a/flight/PiOS/Common/pios_board_info.c b/flight/PiOS/Common/pios_board_info.c index f94ac1f96..8905a5c08 100644 --- a/flight/PiOS/Common/pios_board_info.c +++ b/flight/PiOS/Common/pios_board_info.c @@ -13,4 +13,8 @@ const struct pios_board_info __attribute__((__used__)) __attribute__((__section_ .fw_size = FW_BANK_SIZE - FW_DESC_SIZE, .desc_base = FW_BANK_BASE + FW_BANK_SIZE - FW_DESC_SIZE, .desc_size = FW_DESC_SIZE, +#ifdef EE_BANK_BASE + .ee_base = EE_BANK_BASE, + .ee_size = EE_BANK_SIZE, +#endif }; diff --git a/flight/PiOS/STM32F10x/link_STM32103CB_PIPXTREME_memory.ld b/flight/PiOS/STM32F10x/link_STM32103CB_PIPXTREME_memory.ld index fd36c31ba..04aa69ccb 100644 --- a/flight/PiOS/STM32F10x/link_STM32103CB_PIPXTREME_memory.ld +++ b/flight/PiOS/STM32F10x/link_STM32103CB_PIPXTREME_memory.ld @@ -2,6 +2,7 @@ MEMORY { BL_FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 0x03000 - 0x00080 BD_INFO (r) : ORIGIN = 0x08003000 - 0x80, LENGTH = 0x00080 - FLASH (rx) : ORIGIN = 0x08003000, LENGTH = 0x20000 - 0x03000 + FLASH (rx) : ORIGIN = 0x08003000, LENGTH = 0x20000 - 0x03000 - 0x00400 + EE_FLASH (rw) : ORIGIN = 0x0801FC00, LENGTH = 0x00400 SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x05000 } diff --git a/flight/PiOS/inc/pios_board_info.h b/flight/PiOS/inc/pios_board_info.h index 579a3ec2b..f2ff58fb4 100644 --- a/flight/PiOS/inc/pios_board_info.h +++ b/flight/PiOS/inc/pios_board_info.h @@ -10,6 +10,8 @@ struct pios_board_info { uint32_t fw_size; uint32_t desc_base; uint32_t desc_size; + uint32_t ee_base; + uint32_t ee_size; } __attribute__((packed)); extern const struct pios_board_info pios_board_info_blob;