rooty/LibrePilot
1
0
Fork 0
mirror of https://bitbucket.org/librepilot/librepilot.git synced 2025-02-20 10:54:14 +01:00
Code Issues Releases Activity

LP-519 F1: revert pios_sys.c clock management. Due to older (than f3 & f4) gpio architecture, we should not allow clocks for multiple peripherals with alternate functions routed to same io pin.

Browse Source
This commit is contained in:
Vladimir Zidar 2017-05-18 12:39:03 +02:00
parent 239aad83ba
commit 8edd7c1d7c
2 changed files with 7 additions and 53 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

57
flight/pios/stm32f10x/pios_sys.c
View File

@ -53,63 +53,14 @@ void PIOS_SYS_Init(void)
/* Init the delay system */
PIOS_DELAY_Init();
/*
* Turn on all the peripheral clocks.
* Micromanaging clocks makes no sense given the power situation in the system, so
* light up everything we might reasonably use here and just leave it on.
*/
/* Enable DMA */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1 |
RCC_AHBPeriph_DMA2,
ENABLE);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2 |
RCC_APB1Periph_TIM3 |
RCC_APB1Periph_TIM4 |
RCC_APB1Periph_TIM5 |
RCC_APB1Periph_TIM6 |
RCC_APB1Periph_TIM7 |
RCC_APB1Periph_TIM12 |
RCC_APB1Periph_TIM13 |
RCC_APB1Periph_TIM14 |
RCC_APB1Periph_WWDG |
RCC_APB1Periph_SPI2 |
RCC_APB1Periph_SPI3 |
RCC_APB1Periph_USART2 |
RCC_APB1Periph_USART3 |
RCC_APB1Periph_UART4 |
RCC_APB1Periph_UART5 |
RCC_APB1Periph_I2C1 |
RCC_APB1Periph_I2C2 |
RCC_APB1Periph_USB |
// RCC_APB1Periph_CAN1 | /* bxCAN unfortunately interferes with USB */
// RCC_APB1Periph_CAN2 |
RCC_APB1Periph_BKP |
RCC_APB1Periph_PWR |
RCC_APB1Periph_DAC,
ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA |
RCC_APB2Periph_GPIOB |
RCC_APB2Periph_GPIOC |
RCC_APB2Periph_GPIOD |
RCC_APB2Periph_GPIOE |
RCC_APB2Periph_ADC1 |
RCC_APB2Periph_ADC2 |
RCC_APB2Periph_ADC3 |
RCC_APB2Periph_TIM1 |
RCC_APB2Periph_TIM8 |
RCC_APB2Periph_TIM9 |
RCC_APB2Periph_TIM10 |
RCC_APB2Periph_TIM11 |
RCC_APB2Periph_TIM15 |
RCC_APB2Periph_TIM16 |
RCC_APB2Periph_TIM17 |
RCC_APB2Periph_SPI1 |
RCC_APB2Periph_USART1 |
RCC_APB2Periph_AFIO,
ENABLE);
/* Enable GPIOA, GPIOB, GPIOC, GPIOD, GPIOE and AFIO clocks */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE |
RCC_APB2Periph_AFIO, ENABLE);
#if (PIOS_USB_ENABLED)
/* Ensure that pull-up is active on detect pin */

3
flight/pios/stm32f10x/pios_usart.c
View File

@ -211,14 +211,17 @@ int32_t PIOS_USART_Init(uint32_t *usart_id, const struct pios_usart_cfg *cfg)
case (uint32_t)USART1:
PIOS_USART_1_id = (uint32_t)usart_dev;
usart_dev->irq_channel = USART1_IRQn;
RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
break;
case (uint32_t)USART2:
PIOS_USART_2_id = (uint32_t)usart_dev;
usart_dev->irq_channel = USART2_IRQn;
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
break;
case (uint32_t)USART3:
PIOS_USART_3_id = (uint32_t)usart_dev;
usart_dev->irq_channel = USART3_IRQn;
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
break;
}