mirror of
https://bitbucket.org/librepilot/librepilot.git
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Changes to PiOS to be compatible with the AHRS.
Updates to AHRS code. git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@615 ebee16cc-31ac-478f-84a7-5cbb03baadba
This commit is contained in:
gussy
gussy
parent
1bb32e78f1
commit
8f3c2dbafb
@ -25,9 +25,11 @@
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# Set developer code and compile options
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# Set to YES for debugging
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DEBUG = YES
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DEBUG ?= YES
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USE_BOOTLOADER ?= NO
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# Set to YES when using Code Sourcery toolchain
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CODE_SOURCERY = YES
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CODE_SOURCERY ?= YES
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# Toolchain prefix (i.e arm-elf- -> arm-elf-gcc.exe)
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TCHAIN_PREFIX = arm-none-eabi-
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@ -50,8 +52,12 @@ USE_THUMB_MODE = YES
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# - BOARD just passed as define (optional)
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MCU = cortex-m3
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CHIP = STM32F103CBT
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MODEL = MD
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BOARD = STM32103CB_AHRS
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ifeq ($(USE_BOOTLOADER), YES)
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MODEL = MD
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else
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MODEL = MD
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endif
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# Directory for output files (lst, obj, dep, elf, sym, map, hex, bin etc.)
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OUTDIR = Build
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@ -88,7 +94,7 @@ SRC += $(PIOSSTM32F10X)/pios_delay.c
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SRC += $(PIOSSTM32F10X)/pios_usart.c
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SRC += $(PIOSSTM32F10X)/pios_irq.c
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SRC += $(PIOSSTM32F10X)/pios_adc.c
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SRC += $(PIOSSTM32F10X)/pios_spi.c
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#SRC += $(PIOSSTM32F10X)/pios_spi.c
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## PIOS Hardware (Common)
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SRC += $(PIOSCOMMON)/pios_com.c
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@ -278,7 +284,7 @@ OOCD_EXE=openocd
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# debug level
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OOCD_CL=-d0
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# interface and board/target settings (using the OOCD target-library here)
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OOCD_CL+=-f project/OpenOCD/floss-jtag.cfg -f project/OpenOCD/stm32.cfg
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OOCD_CL+=-f ../Project/OpenOCD/floss-jtag.cfg -f ../Project/OpenOCD/stm32.cfg
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# initialize
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OOCD_CL+=-c init
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# show the targets
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@ -44,13 +44,19 @@ int main()
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/* Delay system */
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PIOS_DELAY_Init();
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/* Communication system */
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PIOS_COM_Init();
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/* ADC system */
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PIOS_ADC_Init();
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/* Toggle LED's forever */
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PIOS_LED_On(LED1);
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PIOS_LED_On(LED2);
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for(;;)
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{
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PIOS_LED_Toggle(LED2);
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PIOS_DELAY_WaitmS(100);
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for(;;) {
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PIOS_LED_Toggle(LED1);
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PIOS_COM_SendFormattedString(COM_USART1, "%d,%d,%d,%d,%d,%d,%d,%d\r", PIOS_ADC_PinGet(0), PIOS_ADC_PinGet(1), PIOS_ADC_PinGet(2), PIOS_ADC_PinGet(3), PIOS_ADC_PinGet(4), PIOS_ADC_PinGet(5), PIOS_ADC_PinGet(6), PIOS_ADC_PinGet(7));
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PIOS_DELAY_WaitmS(25);
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}
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@ -0,0 +1,211 @@
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/**
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******************************************************************************
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*
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* @file pios_board.h
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* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2010.
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* @brief Defines board hardware for the OpenPilot Version 1.1 hardware.
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* @see The GNU Public License (GPL) Version 3
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*
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*****************************************************************************/
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef PIOS_BOARD_H
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#define PIOS_BOARD_H
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//------------------------
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// Timers and Channels Used
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//------------------------
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/*
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Timer | Channel 1 | Channel 2 | Channel 3 | Channel 4
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------+-----------+-----------+-----------+----------
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TIM1 | | | |
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TIM2 | --------------- PIOS_DELAY -----------------
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TIM3 | | | |
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TIM4 | | | |
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TIM5 | | | |
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TIM6 | | | |
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TIM7 | | | |
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TIM8 | | | |
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------+-----------+-----------+-----------+----------
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*/
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//------------------------
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// DMA Channels Used
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//------------------------
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/* Channel 1 - */
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/* Channel 2 - */
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/* Channel 3 - */
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/* Channel 4 - */
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/* Channel 5 - */
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/* Channel 6 - */
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/* Channel 7 - */
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/* Channel 8 - */
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/* Channel 9 - */
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/* Channel 10 - */
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/* Channel 11 - */
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/* Channel 12 - */
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//------------------------
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// PIOS_LED
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//------------------------
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#define PIOS_LED_LED1_GPIO_PORT GPIOA
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#define PIOS_LED_LED1_GPIO_PIN GPIO_Pin_3
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#define PIOS_LED_LED1_GPIO_CLK RCC_APB2Periph_GPIOA
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#define PIOS_LED_NUM 1
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#define PIOS_LED_PORTS { PIOS_LED_LED1_GPIO_PORT }
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#define PIOS_LED_PINS { PIOS_LED_LED1_GPIO_PIN }
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#define PIOS_LED_CLKS { PIOS_LED_LED1_GPIO_CLK }
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//-------------------------
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// Delay Timer
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//-------------------------
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#define PIOS_DELAY_TIMER TIM2
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#define PIOS_DELAY_TIMER_RCC_FUNC RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE)
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//-------------------------
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// System Settings
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//-------------------------
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#define PIOS_MASTER_CLOCK 72000000
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#define PIOS_PERIPHERAL_CLOCK (PIOS_MASTER_CLOCK / 2)
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#if defined(USE_BOOTLOADER)
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#define PIOS_NVIC_VECTTAB_FLASH ((uint32_t)0x08006000)
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#else
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#define PIOS_NVIC_VECTTAB_FLASH ((uint32_t)0x08000000)
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#endif
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//-------------------------
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// Interrupt Priorities
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//-------------------------
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#define PIOS_IRQ_PRIO_LOW 12 // lower than RTOS
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#define PIOS_IRQ_PRIO_MID 8 // higher than RTOS
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#define PIOS_IRQ_PRIO_HIGH 5 // for SPI, ADC, I2C etc...
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#define PIOS_IRQ_PRIO_HIGHEST 4 // for USART etc...
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//-------------------------
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// PIOS_USART1
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//-------------------------
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#define PIOS_USART1_ENABLED 1
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#define PIOS_USART1_USART USART3
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#define PIOS_USART1_GPIO_PORT GPIOB
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#define PIOS_USART1_RX_PIN GPIO_Pin_11
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#define PIOS_USART1_TX_PIN GPIO_Pin_10
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#define PIOS_USART1_REMAP_FUNC { }
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#define PIOS_USART1_IRQ_CHANNEL USART3_IRQn
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#define PIOS_USART1_IRQHANDLER_FUNC void USART3_IRQHandler(void)
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#define PIOS_USART1_CLK_FUNC RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE)
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#define PIOS_USART1_NVIC_PRIO PIOS_IRQ_PRIO_HIGH
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#define PIOS_USART1_BAUDRATE 57600
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//-------------------------
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// PIOS_USART
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//-------------------------
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#define PIOS_USART_NUM 1
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#define PIOS_USART_RX_BUFFER_SIZE 256
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#define PIOS_USART_TX_BUFFER_SIZE 256
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#define PIOS_COM_DEBUG_PORT USART_1
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//-------------------------
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// ADC
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// PIOS_ADC_PinGet(0) = Accel Y
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// PIOS_ADC_PinGet(1) = Temp (?)
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// PIOS_ADC_PinGet(2) = Accel X
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// PIOS_ADC_PinGet(3) = Gyro Z
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// PIOS_ADC_PinGet(4) = Gyro X
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// PIOS_ADC_PinGet(5) = Temp (?)
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// PIOS_ADC_PinGet(6) = Accel Z
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// PIOS_ADC_PinGet(7) = Gyro Y
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//-------------------------
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//#define PIOS_ADC_OVERSAMPLING_RATE 1
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#define PIOS_ADC_USE_TEMP_SENSOR 0
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#define PIOS_ADC_TEMP_SENSOR_ADC ADC1
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#define PIOS_ADC_TEMP_SENSOR_ADC_CHANNEL 1
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#define PIOS_ADC_PIN1_GPIO_PORT GPIOA // PA0 (Accel Z)
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#define PIOS_ADC_PIN1_GPIO_PIN GPIO_Pin_0 // ADC12_IN0
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#define PIOS_ADC_PIN1_GPIO_CHANNEL ADC_Channel_0
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#define PIOS_ADC_PIN1_ADC ADC1
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#define PIOS_ADC_PIN1_ADC_NUMBER 0
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#define PIOS_ADC_PIN2_GPIO_PORT GPIOA // PA1 (Accel Y)
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#define PIOS_ADC_PIN2_GPIO_PIN GPIO_Pin_1 // ADC123_IN1
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#define PIOS_ADC_PIN2_GPIO_CHANNEL ADC_Channel_1
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#define PIOS_ADC_PIN2_ADC ADC1
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#define PIOS_ADC_PIN2_ADC_NUMBER 1
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#define PIOS_ADC_PIN3_GPIO_PORT GPIOA // PA1 (Accel X)
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#define PIOS_ADC_PIN3_GPIO_PIN GPIO_Pin_2 // ADC12_IN2
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#define PIOS_ADC_PIN3_GPIO_CHANNEL ADC_Channel_2
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#define PIOS_ADC_PIN3_ADC ADC1
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#define PIOS_ADC_PIN3_ADC_NUMBER 2
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#define PIOS_ADC_PIN4_GPIO_PORT GPIOA // PA4 (Gyro X)
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#define PIOS_ADC_PIN4_GPIO_PIN GPIO_Pin_4 // ADC12_IN4
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#define PIOS_ADC_PIN4_GPIO_CHANNEL ADC_Channel_4
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#define PIOS_ADC_PIN4_ADC ADC1
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#define PIOS_ADC_PIN4_ADC_NUMBER 3
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#define PIOS_ADC_PIN5_GPIO_PORT GPIOA // PA5 (Gyro Y)
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#define PIOS_ADC_PIN5_GPIO_PIN GPIO_Pin_5 // ADC12_IN5
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#define PIOS_ADC_PIN5_GPIO_CHANNEL ADC_Channel_5
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#define PIOS_ADC_PIN5_ADC ADC2
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#define PIOS_ADC_PIN5_ADC_NUMBER 0
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#define PIOS_ADC_PIN6_GPIO_PORT GPIOA // PA6 (XY Temp)
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#define PIOS_ADC_PIN6_GPIO_PIN GPIO_Pin_6 // ADC12_IN6
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#define PIOS_ADC_PIN6_GPIO_CHANNEL ADC_Channel_6
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#define PIOS_ADC_PIN6_ADC ADC2
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#define PIOS_ADC_PIN6_ADC_NUMBER 1
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#define PIOS_ADC_PIN7_GPIO_PORT GPIOA // PA7 (Gyro Z)
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#define PIOS_ADC_PIN7_GPIO_PIN GPIO_Pin_7 // ADC12_IN7
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#define PIOS_ADC_PIN7_GPIO_CHANNEL ADC_Channel_7
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#define PIOS_ADC_PIN7_ADC ADC2
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#define PIOS_ADC_PIN7_ADC_NUMBER 2
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#define PIOS_ADC_PIN8_GPIO_PORT GPIOB // PB1 (Z Temp)
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#define PIOS_ADC_PIN8_GPIO_PIN GPIO_Pin_1 // ADC12_IN9
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#define PIOS_ADC_PIN8_GPIO_CHANNEL ADC_Channel_9
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#define PIOS_ADC_PIN8_ADC ADC2
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#define PIOS_ADC_PIN8_ADC_NUMBER 3
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#define PIOS_ADC_NUM_PINS 8
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#define PIOS_ADC_PORTS { PIOS_ADC_PIN1_GPIO_PORT, PIOS_ADC_PIN2_GPIO_PORT, PIOS_ADC_PIN3_GPIO_PORT, PIOS_ADC_PIN4_GPIO_PORT, PIOS_ADC_PIN5_GPIO_PORT, PIOS_ADC_PIN6_GPIO_PORT, PIOS_ADC_PIN7_GPIO_PORT, PIOS_ADC_PIN8_GPIO_PORT }
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#define PIOS_ADC_PINS { PIOS_ADC_PIN1_GPIO_PIN, PIOS_ADC_PIN2_GPIO_PIN, PIOS_ADC_PIN3_GPIO_PIN, PIOS_ADC_PIN4_GPIO_PIN, PIOS_ADC_PIN5_GPIO_PIN, PIOS_ADC_PIN6_GPIO_PIN, PIOS_ADC_PIN7_GPIO_PIN, PIOS_ADC_PIN8_GPIO_PIN }
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#define PIOS_ADC_CHANNELS { PIOS_ADC_PIN1_GPIO_CHANNEL, PIOS_ADC_PIN2_GPIO_CHANNEL, PIOS_ADC_PIN3_GPIO_CHANNEL, PIOS_ADC_PIN4_GPIO_CHANNEL, PIOS_ADC_PIN5_GPIO_CHANNEL, PIOS_ADC_PIN6_GPIO_CHANNEL, PIOS_ADC_PIN7_GPIO_CHANNEL, PIOS_ADC_PIN8_GPIO_CHANNEL }
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#define PIOS_ADC_MAPPING { PIOS_ADC_PIN1_ADC, PIOS_ADC_PIN2_ADC, PIOS_ADC_PIN3_ADC, PIOS_ADC_PIN4_ADC, PIOS_ADC_PIN5_ADC, PIOS_ADC_PIN6_ADC, PIOS_ADC_PIN7_ADC, PIOS_ADC_PIN8_ADC }
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#define PIOS_ADC_CHANNEL_MAPPING { PIOS_ADC_PIN1_ADC_NUMBER, PIOS_ADC_PIN2_ADC_NUMBER, PIOS_ADC_PIN3_ADC_NUMBER, PIOS_ADC_PIN4_ADC_NUMBER, PIOS_ADC_PIN5_ADC_NUMBER, PIOS_ADC_PIN6_ADC_NUMBER, PIOS_ADC_PIN7_ADC_NUMBER, PIOS_ADC_PIN8_ADC_NUMBER }
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#define PIOS_ADC_NUM_CHANNELS (PIOS_ADC_NUM_PINS + PIOS_ADC_USE_TEMP_SENSOR)
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#define PIOS_ADC_NUM_ADC_CHANNELS 2
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#define PIOS_ADC_USE_ADC2 1
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#define PIOS_ADC_CLOCK_FUNCTION RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1 | RCC_APB2Periph_ADC2, ENABLE)
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#define PIOS_ADC_ADCCLK RCC_PCLK2_Div8
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/* RCC_PCLK2_Div2: ADC clock = PCLK2/2 */
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/* RCC_PCLK2_Div4: ADC clock = PCLK2/4 */
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/* RCC_PCLK2_Div6: ADC clock = PCLK2/6 */
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/* RCC_PCLK2_Div8: ADC clock = PCLK2/8 */
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#define PIOS_ADC_SAMPLE_TIME ADC_SampleTime_239Cycles5
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/* Sample time: */
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/* With an ADCCLK = 14 MHz and a sampling time of 293.5 cycles: */
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/* Tconv = 239.5 + 12.5 = 252 cycles = 18<31>s */
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/* (1 / (ADCCLK / CYCLES)) = Sample Time (<28>S) */
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#define PIOS_ADC_IRQ_PRIO PIOS_IRQ_PRIO_HIGH
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#endif /* PIOS_BOARD_H */
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@ -36,16 +36,18 @@
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#define PIOS_INCLUDE_LED
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//#define PIOS_INCLUDE_PWM
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//#define PIOS_INCLUDE_SERVO
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#define PIOS_INCLUDE_SPI
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//#define PIOS_INCLUDE_SPI
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#define PIOS_INCLUDE_SYS
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#define PIOS_INCLUDE_USART
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//#define PIOS_INCLUDE_USB_COM
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//#define PIOS_INCLUDE_USB_HID
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//#define PIOS_INCLUDE_USB
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//#define PIOS_INCLUDE_BMP085
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//#define PIOS_INCLUDE_COM
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#define PIOS_INCLUDE_COM
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//#define PIOS_INCLUDE_SDCARD
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//#define PIOS_INCLUDE_SETTINGS
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#define portBASE_TYPE int32_t
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#endif /* PIOS_CONFIG_H */
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@ -126,7 +126,7 @@ void OpenPilotInit()
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/* Create test tasks */
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//xTaskCreate(TaskTesting, (signed portCHAR *)"Testing", configMINIMAL_STACK_SIZE , NULL, 4, NULL);
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//xTaskCreate(TaskHIDTest, (signed portCHAR *)"HIDTest", configMINIMAL_STACK_SIZE , NULL, 3, NULL);
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xTaskCreate(TaskHIDTest, (signed portCHAR *)"HIDTest", configMINIMAL_STACK_SIZE , NULL, 3, NULL);
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//xTaskCreate(TaskServos, (signed portCHAR *)"Servos", configMINIMAL_STACK_SIZE , NULL, 3, NULL);
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//xTaskCreate(TaskSDCard, (signed portCHAR *)"SDCard", configMINIMAL_STACK_SIZE, NULL, (tskIDLE_PRIORITY + 2), NULL);
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}
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@ -140,7 +140,6 @@ static void TaskTesting(void *pvParameters)
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for(;;)
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{
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/* This blocks the task until the BMP085 EOC */
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/*
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PIOS_BMP085_StartADC(TemperatureConv);
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@ -154,7 +153,7 @@ static void TaskTesting(void *pvParameters)
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PIOS_COM_SendFormattedStringNonBlocking(COM_DEBUG_USART, "%u\r", PIOS_BMP085_GetPressure());
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*/
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PIOS_COM_SendFormattedStringNonBlocking(COM_DEBUG_USART, "%u,%u,%u,%u,%u,%u,%u,%u uS\r", PIOS_PWM_Get(0), PIOS_PWM_Get(1), PIOS_PWM_Get(2), PIOS_PWM_Get(3), PIOS_PWM_Get(4), PIOS_PWM_Get(5), PIOS_PWM_Get(6), PIOS_PWM_Get(7));
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PIOS_COM_SendFormattedStringNonBlocking(COM_USART2, "%u,%u,%u,%u,%u,%u,%u,%u uS\r", PIOS_PWM_Get(0), PIOS_PWM_Get(1), PIOS_PWM_Get(2), PIOS_PWM_Get(3), PIOS_PWM_Get(4), PIOS_PWM_Get(5), PIOS_PWM_Get(6), PIOS_PWM_Get(7));
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//PIOS_COM_SendFormattedStringNonBlocking(COM_DEBUG_USART, "%u,%u,%u,%u,%u,%u,%u,%u uS\r", PIOS_PPM_Get(0), PIOS_PPM_Get(1), PIOS_PPM_Get(2), PIOS_PPM_Get(3), PIOS_PPM_Get(4), PIOS_PPM_Get(5), PIOS_PPM_Get(6), PIOS_PPM_Get(7));
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/* This blocks the task until there is something on the buffer */
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@ -173,8 +172,8 @@ static void TaskTesting(void *pvParameters)
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//temp = ((1.43 - ((Vsense / 4096) * 3.3)) / 4.3) + 25;
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//uint32_t vsense = PIOS_ADC_PinGet(0);
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//uint32_t Temp = (1.42 - vsense * 3.3 / 4096) * 1000 / 4.35 + 25;
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PIOS_COM_SendFormattedString(COM_DEBUG_USART, "Temp: %d, CS_I: %d, CS_V: %d, 5v: %d\r", PIOS_ADC_PinGet(0), PIOS_ADC_PinGet(1), PIOS_ADC_PinGet(2), PIOS_ADC_PinGet(3));
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PIOS_COM_SendFormattedString(COM_DEBUG_USART, "AUX1: %d, AUX2: %d, AUX3: %d\r", PIOS_ADC_PinGet(4), PIOS_ADC_PinGet(5), PIOS_ADC_PinGet(6));
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//PIOS_COM_SendFormattedString(COM_DEBUG_USART, "Temp: %d, CS_I: %d, CS_V: %d, 5v: %d\r", PIOS_ADC_PinGet(0), PIOS_ADC_PinGet(1), PIOS_ADC_PinGet(2), PIOS_ADC_PinGet(3));
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//PIOS_COM_SendFormattedString(COM_DEBUG_USART, "AUX1: %d, AUX2: %d, AUX3: %d\r", PIOS_ADC_PinGet(4), PIOS_ADC_PinGet(5), PIOS_ADC_PinGet(6));
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vTaskDelay(xDelay);
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}
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@ -183,13 +182,13 @@ static void TaskTesting(void *pvParameters)
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static void TaskHIDTest(void *pvParameters)
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{
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uint8_t byte;
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uint8_t line_buffer[64];
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uint8_t line_buffer[128];
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uint16_t line_ix;
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for(;;)
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{
|
||||
/* HID Loopback Test */
|
||||
if(PIOS_COM_ReceiveBufferUsed(COM_USB_HID) != 0) {
|
||||
/*if(PIOS_COM_ReceiveBufferUsed(COM_USB_HID) != 0) {
|
||||
byte = PIOS_COM_ReceiveBuffer(COM_USB_HID);
|
||||
if(byte == '\r' || byte == '\n' || byte == 0) {
|
||||
PIOS_COM_SendFormattedString(COM_USB_HID, "RX: %s\r", line_buffer);
|
||||
@ -199,6 +198,19 @@ static void TaskHIDTest(void *pvParameters)
|
||||
line_buffer[line_ix++] = byte;
|
||||
line_buffer[line_ix] = 0;
|
||||
}
|
||||
}*/
|
||||
|
||||
/* HID Loopback Test */
|
||||
if(PIOS_COM_ReceiveBufferUsed(COM_USART2) != 0) {
|
||||
byte = PIOS_COM_ReceiveBuffer(COM_USART2);
|
||||
/*if(byte == '\r' || byte == '\n' || byte == 0) {
|
||||
PIOS_COM_SendFormattedString(COM_DEBUG_USART, "RX: %s\r", line_buffer);
|
||||
line_ix = 0;
|
||||
} else if(line_ix < (128 - 1)) {
|
||||
line_buffer[line_ix++] = byte;
|
||||
line_buffer[line_ix] = 0;
|
||||
}*/
|
||||
PIOS_COM_SendChar(COM_DEBUG_USART, (char)byte);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@ -113,15 +113,24 @@ int32_t PIOS_COM_SendBufferNonBlocking(COMPortTypeDef port, uint8_t *buffer, uin
|
||||
#if defined(PIOS_INCLUDE_USART)
|
||||
case COM_DEBUG_USART:
|
||||
return PIOS_USART_TxBufferPutMoreNonBlocking(PIOS_COM_DEBUG_PORT, buffer, len);
|
||||
#endif
|
||||
#if PIOS_USART1_ENABLED
|
||||
case COM_USART1:
|
||||
return PIOS_USART_TxBufferPutMoreNonBlocking(USART_1, buffer, len);
|
||||
#endif
|
||||
#if PIOS_USART2_ENABLED
|
||||
case COM_USART2:
|
||||
return PIOS_USART_TxBufferPutMoreNonBlocking(USART_2, buffer, len);
|
||||
#endif
|
||||
#if PIOS_USART3_ENABLED
|
||||
case COM_USART3:
|
||||
return PIOS_USART_TxBufferPutMoreNonBlocking(USART_3, buffer, len);
|
||||
#endif
|
||||
|
||||
#if defined(PIOS_INCLUDE_USB_HID)
|
||||
case COM_USB_HID:
|
||||
return PIOS_USB_HID_TxBufferPutMoreNonBlocking(buffer, len);
|
||||
#endif
|
||||
default:
|
||||
/* Invalid port */
|
||||
return -1;
|
||||
@ -144,15 +153,24 @@ int32_t PIOS_COM_SendBuffer(COMPortTypeDef port, uint8_t *buffer, uint16_t len)
|
||||
#if defined(PIOS_INCLUDE_USART)
|
||||
case COM_DEBUG_USART:
|
||||
return PIOS_USART_TxBufferPutMore(PIOS_COM_DEBUG_PORT, buffer, len);
|
||||
#endif
|
||||
#if PIOS_USART1_ENABLED
|
||||
case COM_USART1:
|
||||
return PIOS_USART_TxBufferPutMore(USART_1, buffer, len);
|
||||
#endif
|
||||
#if PIOS_USART2_ENABLED
|
||||
case COM_USART2:
|
||||
return PIOS_USART_TxBufferPutMore(USART_2, buffer, len);
|
||||
#endif
|
||||
#if PIOS_USART3_ENABLED
|
||||
case COM_USART3:
|
||||
return PIOS_USART_TxBufferPutMore(USART_3, buffer, len);
|
||||
#endif
|
||||
|
||||
#if defined(PIOS_INCLUDE_USB_HID)
|
||||
case COM_USB_HID:
|
||||
return PIOS_USB_HID_TxBufferPutMore(buffer, len);
|
||||
#endif
|
||||
default:
|
||||
/* Invalid port */
|
||||
return -1;
|
||||
@ -264,15 +282,24 @@ uint8_t PIOS_COM_ReceiveBuffer(COMPortTypeDef port)
|
||||
#if defined(PIOS_INCLUDE_USART)
|
||||
case COM_DEBUG_USART:
|
||||
return PIOS_USART_RxBufferGet(PIOS_COM_DEBUG_PORT);
|
||||
#endif
|
||||
#if PIOS_USART1_ENABLED
|
||||
case COM_USART1:
|
||||
return PIOS_USART_RxBufferGet(USART_1);
|
||||
#endif
|
||||
#if PIOS_USART2_ENABLED
|
||||
case COM_USART2:
|
||||
return PIOS_USART_RxBufferGet(USART_2);
|
||||
#endif
|
||||
#if PIOS_USART3_ENABLED
|
||||
case COM_USART3:
|
||||
return PIOS_USART_RxBufferGet(USART_3);
|
||||
#endif
|
||||
|
||||
#if defined(PIOS_INCLUDE_USB_HID)
|
||||
case COM_USB_HID:
|
||||
return PIOS_USB_HID_RxBufferGet();
|
||||
#endif
|
||||
/* To suppress warnings */
|
||||
default:
|
||||
return 0;
|
||||
@ -287,18 +314,27 @@ uint8_t PIOS_COM_ReceiveBuffer(COMPortTypeDef port)
|
||||
int32_t PIOS_COM_ReceiveBufferUsed(COMPortTypeDef port)
|
||||
{
|
||||
switch(port) {
|
||||
|
||||
#if defined(PIOS_INCLUDE_USART)
|
||||
case COM_DEBUG_USART:
|
||||
return PIOS_USART_RxBufferUsed(PIOS_COM_DEBUG_PORT);
|
||||
#if PIOS_USART1_ENABLED
|
||||
case COM_USART1:
|
||||
return PIOS_USART_RxBufferUsed(USART_1);
|
||||
#endif
|
||||
#if PIOS_USART2_ENABLED
|
||||
case COM_USART2:
|
||||
return PIOS_USART_RxBufferUsed(USART_2);
|
||||
#endif
|
||||
#if PIOS_USART3_ENABLED
|
||||
case COM_USART3:
|
||||
return PIOS_USART_RxBufferUsed(USART_3);
|
||||
#endif
|
||||
#endif
|
||||
#if defined(PIOS_INCLUDE_USB_HID)
|
||||
case COM_USB_HID:
|
||||
return PIOS_USB_HID_RxBufferUsed();
|
||||
#endif
|
||||
/* To suppress warnings */
|
||||
default:
|
||||
return 0;
|
||||
|
||||
@ -1,411 +1,54 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
*
|
||||
* @file link_stm32f10x_HD.ld
|
||||
* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2009.
|
||||
* @brief PiOS linker for the OpenPilot AHRS board
|
||||
* @see The GNU Public License (GPL) Version 3
|
||||
*
|
||||
*****************************************************************************/
|
||||
/*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
* for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
|
||||
/* Memory Spaces Definitions */
|
||||
MEMORY
|
||||
{
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 20K
|
||||
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 128K
|
||||
FLASHB1 (rx) : ORIGIN = 0x00000000, LENGTH = 0
|
||||
EXTMEMB0 (rx) : ORIGIN = 0x00000000, LENGTH = 0
|
||||
EXTMEMB1 (rx) : ORIGIN = 0x00000000, LENGTH = 0
|
||||
EXTMEMB2 (rx) : ORIGIN = 0x00000000, LENGTH = 0
|
||||
EXTMEMB3 (rx) : ORIGIN = 0x00000000, LENGTH = 0
|
||||
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 0x00020000
|
||||
SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00005000
|
||||
}
|
||||
|
||||
/* higher address of the user mode stack */
|
||||
_estack = 0x20010000;
|
||||
|
||||
/* default stack sizes.
|
||||
|
||||
These are used by the startup in order to allocate stacks for the different modes.
|
||||
|
||||
Note: FreeRTOS gives each task an own stack
|
||||
*/
|
||||
|
||||
__Stack_Size = 128 ;
|
||||
|
||||
PROVIDE ( _Stack_Size = __Stack_Size ) ;
|
||||
|
||||
__Stack_Init = _estack - __Stack_Size ;
|
||||
|
||||
/*"PROVIDE" allows to easily override these values from an object file or the commmand line.*/
|
||||
PROVIDE ( _Stack_Init = __Stack_Init ) ;
|
||||
|
||||
/*
|
||||
There will be a link error if there is not this amount of RAM free at the end.
|
||||
*/
|
||||
_Minimum_Stack_Size = 0x100 ;
|
||||
|
||||
/* Check valid alignment for VTOR */
|
||||
ASSERT(ORIGIN(FLASH) == ALIGN(ORIGIN(FLASH), 0x80), "Start of memory region flash not aligned for startup vector table");
|
||||
|
||||
|
||||
/*
|
||||
this sends all unreferenced IRQHandlers to reset
|
||||
*/
|
||||
|
||||
|
||||
PROVIDE ( Undefined_Handler = 0 ) ;
|
||||
PROVIDE ( SWI_Handler = 0 ) ;
|
||||
PROVIDE ( IRQ_Handler = 0 ) ;
|
||||
PROVIDE ( Prefetch_Handler = 0 ) ;
|
||||
PROVIDE ( Abort_Handler = 0 ) ;
|
||||
PROVIDE ( FIQ_Handler = 0 ) ;
|
||||
|
||||
PROVIDE ( NMI_Handler = 0 ) ;
|
||||
PROVIDE ( HardFault_Handler = 0 ) ;
|
||||
PROVIDE ( MemManage_Handler = 0 ) ;
|
||||
PROVIDE ( BusFault_Handler = 0 ) ;
|
||||
PROVIDE ( UsageFault_Handler = 0 ) ;
|
||||
PROVIDE ( SVC_Handler = 0 ) ;
|
||||
PROVIDE ( DebugMon_Handler = 0 ) ;
|
||||
PROVIDE ( PendSV_Handler = 0 ) ;
|
||||
PROVIDE ( SysTick_Handler = 0 ) ;
|
||||
|
||||
PROVIDE ( WWDG_IRQHandler = 0 ) ;
|
||||
PROVIDE ( PVD_IRQHandler = 0 ) ;
|
||||
PROVIDE ( TAMPER_IRQHandler = 0 ) ;
|
||||
PROVIDE ( RTC_IRQHandler = 0 ) ;
|
||||
PROVIDE ( FLASH_IRQHandler = 0 ) ;
|
||||
PROVIDE ( RCC_IRQHandler = 0 ) ;
|
||||
PROVIDE ( EXTI0_IRQHandler = 0 ) ;
|
||||
PROVIDE ( EXTI1_IRQHandler = 0 ) ;
|
||||
PROVIDE ( EXTI2_IRQHandler = 0 ) ;
|
||||
PROVIDE ( EXTI3_IRQHandler = 0 ) ;
|
||||
PROVIDE ( EXTI4_IRQHandler = 0 ) ;
|
||||
PROVIDE ( DMAChannel1_IRQHandler = 0 ) ;
|
||||
PROVIDE ( DMAChannel2_IRQHandler = 0 ) ;
|
||||
PROVIDE ( DMAChannel3_IRQHandler = 0 ) ;
|
||||
PROVIDE ( DMAChannel4_IRQHandler = 0 ) ;
|
||||
PROVIDE ( DMAChannel5_IRQHandler = 0 ) ;
|
||||
PROVIDE ( DMAChannel6_IRQHandler = 0 ) ;
|
||||
PROVIDE ( DMAChannel7_IRQHandler = 0 ) ;
|
||||
PROVIDE ( ADC_IRQHandler = 0 ) ;
|
||||
PROVIDE ( USB_HP_CAN1_TX_IRQHandler = 0 ) ;
|
||||
PROVIDE ( USB_LP_CAN1_RX0_IRQHandler = 0 ) ;
|
||||
PROVIDE ( CAN1_RX1_IRQHandler = 0 ) ;
|
||||
PROVIDE ( CAN1_SCE_IRQHandler = 0 ) ;
|
||||
PROVIDE ( EXTI9_5_IRQHandler = 0 ) ;
|
||||
PROVIDE ( TIM1_BRK_IRQHandler = 0 ) ;
|
||||
PROVIDE ( TIM1_UP_IRQHandler = 0 ) ;
|
||||
PROVIDE ( TIM1_TRG_COM_IRQHandler = 0 ) ;
|
||||
PROVIDE ( TIM1_CC_IRQHandler = 0 ) ;
|
||||
PROVIDE ( TIM2_IRQHandler = 0 ) ;
|
||||
PROVIDE ( TIM3_IRQHandler = 0 ) ;
|
||||
PROVIDE ( TIM4_IRQHandler = 0 ) ;
|
||||
PROVIDE ( I2C1_EV_IRQHandler = 0 ) ;
|
||||
PROVIDE ( I2C1_ER_IRQHandler = 0 ) ;
|
||||
PROVIDE ( I2C2_EV_IRQHandler = 0 ) ;
|
||||
PROVIDE ( I2C2_ER_IRQHandler = 0 ) ;
|
||||
PROVIDE ( SPI1_IRQHandler = 0 ) ;
|
||||
PROVIDE ( SPI2_IRQHandler = 0 ) ;
|
||||
PROVIDE ( USART1_IRQHandler = 0 ) ;
|
||||
PROVIDE ( USART2_IRQHandler = 0 ) ;
|
||||
PROVIDE ( USART3_IRQHandler = 0 ) ;
|
||||
PROVIDE ( EXTI15_10_IRQHandler = 0 ) ;
|
||||
PROVIDE ( RTCAlarm_IRQHandler = 0 ) ;
|
||||
PROVIDE ( USBWakeUp_IRQHandler = 0 ) ;
|
||||
PROVIDE ( TIM8_BRK_IRQHandler = 0 ) ;
|
||||
PROVIDE ( TIM8_UP_IRQHandler = 0 ) ;
|
||||
PROVIDE ( TIM8_TRG_COM_IRQHandler = 0 ) ;
|
||||
PROVIDE ( TIM8_CC_IRQHandler = 0 ) ;
|
||||
PROVIDE ( ADC3_IRQHandler = 0 ) ;
|
||||
PROVIDE ( FSMC_IRQHandler = 0 ) ;
|
||||
PROVIDE ( SDIO_IRQHandler = 0 ) ;
|
||||
PROVIDE ( TIM5_IRQHandler = 0 ) ;
|
||||
PROVIDE ( SPI3_IRQHandler = 0 ) ;
|
||||
PROVIDE ( UART4_IRQHandler = 0 ) ;
|
||||
PROVIDE ( UART5_IRQHandler = 0 ) ;
|
||||
PROVIDE ( TIM6_IRQHandler = 0 ) ;
|
||||
PROVIDE ( TIM7_IRQHandler = 0 ) ;
|
||||
PROVIDE ( DMA2_Channel1_IRQHandler = 0 ) ;
|
||||
PROVIDE ( DMA2_Channel2_IRQHandler = 0 ) ;
|
||||
PROVIDE ( DMA2_Channel3_IRQHandler = 0 ) ;
|
||||
PROVIDE ( DMA2_Channel4_5_IRQHandler = 0 ) ;
|
||||
|
||||
|
||||
|
||||
/******************************************************************************/
|
||||
/* Peripheral memory map */
|
||||
/******************************************************************************/
|
||||
/*this allows to compile the ST lib in "non-debug" mode*/
|
||||
|
||||
|
||||
/* Peripheral and SRAM base address in the alias region */
|
||||
PERIPH_BB_BASE = 0x42000000;
|
||||
SRAM_BB_BASE = 0x22000000;
|
||||
|
||||
/* Peripheral and SRAM base address in the bit-band region */
|
||||
SRAM_BASE = 0x20000000;
|
||||
PERIPH_BASE = 0x40000000;
|
||||
|
||||
/* Flash registers base address */
|
||||
PROVIDE ( FLASH_BASE = 0x40022000);
|
||||
/* Flash Option Bytes base address */
|
||||
PROVIDE ( OB_BASE = 0x1FFFF800);
|
||||
|
||||
/* Peripheral memory map */
|
||||
APB1PERIPH_BASE = PERIPH_BASE ;
|
||||
APB2PERIPH_BASE = (PERIPH_BASE + 0x10000) ;
|
||||
AHBPERIPH_BASE = (PERIPH_BASE + 0x20000) ;
|
||||
|
||||
PROVIDE ( TIM2 = (APB1PERIPH_BASE + 0x0000) ) ;
|
||||
PROVIDE ( TIM3 = (APB1PERIPH_BASE + 0x0400) ) ;
|
||||
PROVIDE ( TIM4 = (APB1PERIPH_BASE + 0x0800) ) ;
|
||||
PROVIDE ( RTC = (APB1PERIPH_BASE + 0x2800) ) ;
|
||||
PROVIDE ( WWDG = (APB1PERIPH_BASE + 0x2C00) ) ;
|
||||
PROVIDE ( IWDG = (APB1PERIPH_BASE + 0x3000) ) ;
|
||||
PROVIDE ( SPI2 = (APB1PERIPH_BASE + 0x3800) ) ;
|
||||
PROVIDE ( USART2 = (APB1PERIPH_BASE + 0x4400) ) ;
|
||||
PROVIDE ( USART3 = (APB1PERIPH_BASE + 0x4800) ) ;
|
||||
PROVIDE ( I2C1 = (APB1PERIPH_BASE + 0x5400) ) ;
|
||||
PROVIDE ( I2C2 = (APB1PERIPH_BASE + 0x5800) ) ;
|
||||
PROVIDE ( CAN = (APB1PERIPH_BASE + 0x6400) ) ;
|
||||
PROVIDE ( BKP = (APB1PERIPH_BASE + 0x6C00) ) ;
|
||||
PROVIDE ( PWR = (APB1PERIPH_BASE + 0x7000) ) ;
|
||||
|
||||
PROVIDE ( AFIO = (APB2PERIPH_BASE + 0x0000) ) ;
|
||||
PROVIDE ( EXTI = (APB2PERIPH_BASE + 0x0400) ) ;
|
||||
PROVIDE ( GPIOA = (APB2PERIPH_BASE + 0x0800) ) ;
|
||||
PROVIDE ( GPIOB = (APB2PERIPH_BASE + 0x0C00) ) ;
|
||||
PROVIDE ( GPIOC = (APB2PERIPH_BASE + 0x1000) ) ;
|
||||
PROVIDE ( GPIOD = (APB2PERIPH_BASE + 0x1400) ) ;
|
||||
PROVIDE ( GPIOE = (APB2PERIPH_BASE + 0x1800) ) ;
|
||||
PROVIDE ( ADC1 = (APB2PERIPH_BASE + 0x2400) ) ;
|
||||
PROVIDE ( ADC2 = (APB2PERIPH_BASE + 0x2800) ) ;
|
||||
PROVIDE ( TIM1 = (APB2PERIPH_BASE + 0x2C00) ) ;
|
||||
PROVIDE ( SPI1 = (APB2PERIPH_BASE + 0x3000) ) ;
|
||||
PROVIDE ( USART1 = (APB2PERIPH_BASE + 0x3800) ) ;
|
||||
|
||||
PROVIDE ( DMA = (AHBPERIPH_BASE + 0x0000) ) ;
|
||||
PROVIDE ( DMA_Channel1 = (AHBPERIPH_BASE + 0x0008) ) ;
|
||||
PROVIDE ( DMA_Channel2 = (AHBPERIPH_BASE + 0x001C) ) ;
|
||||
PROVIDE ( DMA_Channel3 = (AHBPERIPH_BASE + 0x0030) ) ;
|
||||
PROVIDE ( DMA_Channel4 = (AHBPERIPH_BASE + 0x0044) ) ;
|
||||
PROVIDE ( DMA_Channel5 = (AHBPERIPH_BASE + 0x0058) ) ;
|
||||
PROVIDE ( DMA_Channel6 = (AHBPERIPH_BASE + 0x006C) ) ;
|
||||
PROVIDE ( DMA_Channel7 = (AHBPERIPH_BASE + 0x0080) ) ;
|
||||
PROVIDE ( RCC = (AHBPERIPH_BASE + 0x1000) ) ;
|
||||
|
||||
/* System Control Space memory map */
|
||||
SCS_BASE = 0xE000E000;
|
||||
|
||||
PROVIDE ( SysTick = (SCS_BASE + 0x0010) ) ;
|
||||
PROVIDE ( NVIC = (SCS_BASE + 0x0100) ) ;
|
||||
PROVIDE ( SCB = (SCS_BASE + 0x0D00) ) ;
|
||||
|
||||
|
||||
/* Sections Definitions */
|
||||
_estack = 0x20004FF0;
|
||||
|
||||
/* Section Definitions */
|
||||
SECTIONS
|
||||
{
|
||||
|
||||
/* for Cortex devices, the beginning of the startup code is stored in the .isr_vector section, which goes to FLASH */
|
||||
.isr_vector :
|
||||
{
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
/* for some STRx devices, the beginning of the startup code is stored in the .flashtext section, which goes to FLASH */
|
||||
.flashtext :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.flashtext) /* Startup code */
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
|
||||
/* the program code is stored in the .text section, which goes to Flash */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.isr_vector .isr_vector.*))
|
||||
*(.text .text.* .gnu.linkonce.t.*)
|
||||
*(.glue_7t) *(.glue_7)
|
||||
*(.rodata .rodata* .gnu.linkonce.r.*)
|
||||
} > FLASH
|
||||
|
||||
*(.text) /* remaining code */
|
||||
*(.text.*) /* remaining code */
|
||||
*(.rodata) /* read-only data (constants) */
|
||||
*(.rodata*)
|
||||
*(.glue_7)
|
||||
*(.glue_7t)
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > FLASH
|
||||
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} > FLASH
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_sidata = _etext;
|
||||
} >FLASH
|
||||
_sidata = .;
|
||||
|
||||
|
||||
|
||||
/* This is the initialized data section
|
||||
The program executes knowing that the data is in the RAM
|
||||
but the loader puts the initial values in the FLASH (inidata).
|
||||
It is one task of the startup to copy the initial values from FLASH to RAM. */
|
||||
.data : AT ( _sidata )
|
||||
.data : AT (_etext)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_sdata = .;
|
||||
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.data .data.*)
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_edata = . ;
|
||||
} >RAM
|
||||
} > SRAM
|
||||
|
||||
|
||||
|
||||
/* This is the uninitialized data section */
|
||||
.bss :
|
||||
/* .bss section which is used for uninitialized data */
|
||||
.bss (NOLOAD) :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_sbss = . ;
|
||||
|
||||
*(.bss)
|
||||
*(.bss .bss.*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_ebss = . ;
|
||||
} >RAM
|
||||
|
||||
PROVIDE ( end = _ebss );
|
||||
PROVIDE ( _end = _ebss );
|
||||
|
||||
/* This is the user stack section
|
||||
This is just to check that there is enough RAM left for the User mode stack
|
||||
It should generate an error if it's full.
|
||||
*/
|
||||
._usrstack :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_susrstack = . ;
|
||||
|
||||
. = . + _Minimum_Stack_Size ;
|
||||
} > SRAM
|
||||
|
||||
. = ALIGN(4);
|
||||
_eusrstack = . ;
|
||||
} >RAM
|
||||
|
||||
|
||||
|
||||
/* this is the FLASH Bank1 */
|
||||
/* the C or assembly source must explicitly place the code or data there
|
||||
using the "section" attribute */
|
||||
.b1text :
|
||||
{
|
||||
*(.b1text) /* remaining code */
|
||||
*(.b1rodata) /* read-only data (constants) */
|
||||
*(.b1rodata*)
|
||||
} >FLASHB1
|
||||
|
||||
/* this is the EXTMEM */
|
||||
/* the C or assembly source must explicitly place the code or data there
|
||||
using the "section" attribute */
|
||||
|
||||
/* EXTMEM Bank0 */
|
||||
.eb0text :
|
||||
{
|
||||
*(.eb0text) /* remaining code */
|
||||
*(.eb0rodata) /* read-only data (constants) */
|
||||
*(.eb0rodata*)
|
||||
} >EXTMEMB0
|
||||
|
||||
/* EXTMEM Bank1 */
|
||||
.eb1text :
|
||||
{
|
||||
*(.eb1text) /* remaining code */
|
||||
*(.eb1rodata) /* read-only data (constants) */
|
||||
*(.eb1rodata*)
|
||||
} >EXTMEMB1
|
||||
|
||||
/* EXTMEM Bank2 */
|
||||
.eb2text :
|
||||
{
|
||||
*(.eb2text) /* remaining code */
|
||||
*(.eb2rodata) /* read-only data (constants) */
|
||||
*(.eb2rodata*)
|
||||
} >EXTMEMB2
|
||||
|
||||
/* EXTMEM Bank0 */
|
||||
.eb3text :
|
||||
{
|
||||
*(.eb3text) /* remaining code */
|
||||
*(.eb3rodata) /* read-only data (constants) */
|
||||
*(.eb3rodata*)
|
||||
} >EXTMEMB3
|
||||
|
||||
__exidx_start = .;
|
||||
__exidx_end = .;
|
||||
|
||||
/* after that it's only debugging information. */
|
||||
|
||||
/* remove the debugging information from the standard libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
_end = . ;
|
||||
}
|
||||
|
||||
/* Stabs debugging sections. */
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
/* DWARF debug sections.
|
||||
Symbols in the DWARF debugging sections are relative to the beginning
|
||||
of the section so we begin them at 0. */
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
}
|
||||
|
||||
|
||||
|
||||
@ -101,8 +101,14 @@ int32_t PIOS_SYS_Reset(void)
|
||||
PIOS_IRQ_Disable();
|
||||
|
||||
// turn off all board LEDs
|
||||
#if (PIOS_LED_NUM == 1)
|
||||
PIOS_LED_Off(LED1);
|
||||
#elif (PIOS_LED_NUM == 2)
|
||||
PIOS_LED_Off(LED1);
|
||||
PIOS_LED_Off(LED2);
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
/* Reset STM32 */
|
||||
//RCC_APB2PeriphResetCmd(0xfffffff8, ENABLE); /* MBHP_CORE_STM32: don't reset GPIOA/AF due to USB pins */
|
||||
|
||||
@ -34,7 +34,7 @@
|
||||
|
||||
|
||||
/* Global Variables */
|
||||
static portBASE_TYPE xHigherPriorityTaskWoken;
|
||||
|
||||
|
||||
/* Local Variables */
|
||||
static uint8_t rx_buffer[PIOS_USART_NUM][PIOS_USART_RX_BUFFER_SIZE];
|
||||
@ -49,7 +49,7 @@ static volatile uint8_t tx_buffer_size[PIOS_USART_NUM];
|
||||
|
||||
|
||||
/**
|
||||
* Initialise the GPS and TELEM onboard USARTs
|
||||
* Initialise the onboard USARTs
|
||||
*/
|
||||
void PIOS_USART_Init(void)
|
||||
{
|
||||
@ -64,7 +64,6 @@ void PIOS_USART_Init(void)
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
GPIO_StructInit(&GPIO_InitStructure);
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_OD;
|
||||
|
||||
/* Configure and Init USARTs */
|
||||
USART_InitTypeDef USART_InitStructure;
|
||||
@ -83,7 +82,7 @@ void PIOS_USART_Init(void)
|
||||
/* Enable the USART Pins Software Remapping */
|
||||
PIOS_USART1_REMAP_FUNC;
|
||||
|
||||
/* Configure and Init USART Tx as alternate function open-drain */
|
||||
/* Configure and Init USART Tx as alternate function push-pull */
|
||||
GPIO_InitStructure.GPIO_Pin = PIOS_USART1_TX_PIN;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||
GPIO_Init(PIOS_USART1_GPIO_PORT, &GPIO_InitStructure);
|
||||
@ -116,7 +115,7 @@ void PIOS_USART_Init(void)
|
||||
/* Enable the USART Pins Software Remapping */
|
||||
PIOS_USART2_REMAP_FUNC;
|
||||
|
||||
/* Configure and Init USART Tx as alternate function open-drain */
|
||||
/* Configure and Init USART Tx as alternate function push-pull */
|
||||
GPIO_InitStructure.GPIO_Pin = PIOS_USART2_TX_PIN;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||
GPIO_Init(PIOS_USART2_GPIO_PORT, &GPIO_InitStructure);
|
||||
@ -149,7 +148,7 @@ void PIOS_USART_Init(void)
|
||||
/* Enable the USART Pins Software Remapping */
|
||||
PIOS_USART3_REMAP_FUNC;
|
||||
|
||||
/* Configure and Init USART Tx as alternate function open-drain */
|
||||
/* Configure and Init USART Tx as alternate function push-pull */
|
||||
GPIO_InitStructure.GPIO_Pin = PIOS_USART3_TX_PIN;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||
GPIO_Init(PIOS_USART3_GPIO_PORT, &GPIO_InitStructure);
|
||||
@ -433,13 +432,19 @@ int32_t PIOS_USART_TxBufferPutMoreNonBlocking(USARTNumTypeDef usart, uint8_t *bu
|
||||
/* Enable Tx interrupt if buffer was empty */
|
||||
if(++tx_buffer_size[usart] == 1) {
|
||||
switch(usart) {
|
||||
#if (PIOS_USART1_ENABLED)
|
||||
/* Enable TXE interrupt (TXEIE=1) */
|
||||
case 0: PIOS_USART1_USART->CR1 |= (1 << 7); break;
|
||||
#endif
|
||||
#if (PIOS_USART2_ENABLED)
|
||||
/* Enable TXE interrupt (TXEIE=1) */
|
||||
case 1: PIOS_USART2_USART->CR1 |= (1 << 7); break;
|
||||
#endif
|
||||
#if (PIOS_USART3_ENABLED)
|
||||
/* Enable TXE interrupt (TXEIE=1) */
|
||||
case 2: PIOS_USART3_USART->CR1 |= (1 << 7); break;
|
||||
/* USART not supported by routine (yet) */
|
||||
#endif
|
||||
default: PIOS_IRQ_Enable(); return -3;
|
||||
}
|
||||
}
|
||||
@ -538,7 +543,7 @@ PIOS_USART1_IRQHANDLER_FUNC
|
||||
}
|
||||
#endif
|
||||
|
||||
#if (PIOS_USART1_ENABLED)
|
||||
#if (PIOS_USART2_ENABLED)
|
||||
/* Interrupt handler for USART2 */
|
||||
PIOS_USART2_IRQHANDLER_FUNC
|
||||
{
|
||||
@ -569,7 +574,7 @@ PIOS_USART2_IRQHANDLER_FUNC
|
||||
}
|
||||
#endif
|
||||
|
||||
#if (PIOS_USART1_ENABLED)
|
||||
#if (PIOS_USART3_ENABLED)
|
||||
/* Interrupt handler for USART3 */
|
||||
PIOS_USART3_IRQHANDLER_FUNC
|
||||
{
|
||||
|
||||
@ -2,8 +2,8 @@
|
||||
******************************************************************************
|
||||
* @file startup_stm32f10x_md.s
|
||||
* @author MCD Application Team / Angus Peart
|
||||
* @version V3.1.1
|
||||
* @date 07/27/2009
|
||||
* @version V3.1.2
|
||||
* @date 09/28/2009
|
||||
* @brief STM32F10x Medium Density Devices vector table for RIDE7 toolchain.
|
||||
* This module performs:
|
||||
* - Set the initial SP
|
||||
@ -32,7 +32,6 @@
|
||||
.thumb
|
||||
|
||||
.global g_pfnVectors
|
||||
.global SystemInit_ExtMemCtl_Dummy
|
||||
.global Default_Handler
|
||||
|
||||
/* start address for the initialization values of the .data section.
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user