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Code Issues Releases Activity

Get the pios_overo driver for pios_com compiling

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This commit is contained in:
James Cotton 2012-07-20 09:32:22 -05:00
parent 1c4c373b86
commit 8fc2d10ea6
5 changed files with 129 additions and 42 deletions
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19
flight/PiOS/STM32F4xx/pios_overo.c
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@ -40,7 +40,7 @@
#if defined(PIOS_INCLUDE_SPI)
#include <pios_overo.h>
#include <pios_overo_priv.h>
#define PACKET_SIZE 1024
@ -144,13 +144,18 @@ void PIOS_OVERO_DMA_irq_handler(uint32_t overo_id)
struct pios_overo_dev * overo_dev = (struct pios_overo_dev *) overo_id;
PIOS_Assert(PIOS_OVERO_validate(overo_dev));
overo_dev->writing_memory = 1 - DMA_GetCurMemoryTarget(overo_dev->cfg->dma.tx.channel);
overo_dev->writing_buffer = 1 - DMA_GetCurrentMemoryTarget(overo_dev->cfg->dma.tx.channel);
bool rx_need_yield;
// Get data from the Rx buffer and add to the fifo
(void) (overo_dev->rx_in_cb)(overo_dev->rx_in_context,
&overo_dev->rx_buffer[overo_dev->writing_buffer][0],
PACKET_SIZE, NULL, &rx_need_yield);
if(rx_need_yield) {
vPortYieldFromISR();
}
// Fill the buffer with known value to prevent rereading these bytes
memset(&overo_dev->rx_buffer[overo_dev->writing_buffer][0], 0xFF, PACKET_SIZE);
@ -197,7 +202,7 @@ int32_t PIOS_OVERO_Init(uint32_t * overo_id, const struct pios_overo_cfg * cfg)
/* only legal for single-slave config */
PIOS_Assert(overo_dev->cfg->slave_count == 1);
SPI_SSOutputCmd(overo_dev->cfg->regs, (overo_dev->cfg->init.SPI_Mode == SPI_Mode_Master) ? ENABLE : DISABLE);
SPI_SSOutputCmd(overo_dev->cfg->regs, DISABLE);
/* Initialize the GPIO pins */
/* note __builtin_ctz() due to the difference between GPIO_PinX and GPIO_PinSourceX */
@ -223,19 +228,19 @@ int32_t PIOS_OVERO_Init(uint32_t * overo_id, const struct pios_overo_cfg * cfg)
DMA_DeInit(overo_dev->cfg->dma.rx.channel);
dma_init = overo_dev->cfg->dma.rx.init;
dma_init.DMA_Memory0BaseAddr = (uin32_t) overo_dev->rx_buffer[0];
dma_init.DMA_Memory0BaseAddr = (uint32_t) overo_dev->rx_buffer[0];
dma_init.DMA_MemoryInc = DMA_MemoryInc_Enable;
dma_init.DMA_BufferSize = PACKET_SIZE;
DMA_Init(overo_dev->cfg->dma.rx.channel, &dma_init);
DMA_DoubleBufferModeConfig(overo_dev->cfg->dma.rx.channel, (uin32_t) overo_dev->rx_buffer[1], DMA_Memory_0);
DMA_DoubleBufferModeConfig(overo_dev->cfg->dma.rx.channel, (uint32_t) overo_dev->rx_buffer[1], DMA_Memory_0);
DMA_DeInit(overo_dev->cfg->dma.tx.channel);
dma_init = overo_dev->cfg->dma.tx.init;
dma_init.DMA_Memory0BaseAddr = (uin32_t) overo_dev->tx_buffer[0];
dma_init.DMA_Memory0BaseAddr = (uint32_t) overo_dev->tx_buffer[0];
dma_init.DMA_MemoryInc = DMA_MemoryInc_Enable;
dma_init.DMA_BufferSize = PACKET_SIZE;
DMA_Init(overo_dev->cfg->dma.tx.channel, &dma_init);
DMA_DoubleBufferModeConfig(overo_dev->cfg->dma.tx.channel, (uin32_t) overo_dev->tx_buffer[1], DMA_Memory_0);
DMA_DoubleBufferModeConfig(overo_dev->cfg->dma.tx.channel, (uint32_t) overo_dev->tx_buffer[1], DMA_Memory_0);
/* Initialize the SPI block */
SPI_DeInit(overo_dev->cfg->regs);

18
flight/PiOS/inc/pios_overo.h
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@ -30,23 +30,7 @@
#ifndef PIOS_OVERO_H
#define PIOS_OVERO_H
#include <pios.h>
#include <pios_stm32.h>
struct pios_overo_cfg {
SPI_TypeDef *regs;
uint32_t remap; /* GPIO_Remap_* or GPIO_AF_* */
SPI_InitTypeDef init;
bool use_crc;
struct stm32_dma dma;
struct stm32_gpio sclk;
struct stm32_gpio miso;
struct stm32_gpio mosi;
uint32_t slave_count;
struct stm32_gpio ssel[];
};
extern int32_t PIOS_OVERO_Init(uint32_t * overo_id, const struct pios_overo_cfg * cfg);
extern void PIOS_OVERO_DMA_irq_handler(uint32_t overo_id);
#endif /* PIOS_OVERO_H */

58
flight/PiOS/inc/pios_overo_priv.h Normal file
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@ -0,0 +1,58 @@
/**
******************************************************************************
* @addtogroup PIOS PIOS Core hardware abstraction layer
* @{
* @addtogroup PIOS_OVERO Overo Functions
* @{
*
* @file pios_overo_priv.h
* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2012.
* @brief Overo functions header.
* @see The GNU Public License (GPL) Version 3
*
*****************************************************************************/
/*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef PIOS_OVERO_PRIV_H
#define PIOS_OVERO_PRIV_H
#include <pios.h>
#include <pios_stm32.h>
extern const struct pios_com_driver pios_overo_com_driver;
struct pios_overo_cfg {
SPI_TypeDef *regs;
uint32_t remap; /* GPIO_Remap_* or GPIO_AF_* */
SPI_InitTypeDef init;
bool use_crc;
struct stm32_dma dma;
struct stm32_gpio sclk;
struct stm32_gpio miso;
struct stm32_gpio mosi;
uint32_t slave_count;
struct stm32_gpio ssel[];
};
extern int32_t PIOS_OVERO_Init(uint32_t * overo_id, const struct pios_overo_cfg * cfg);
#endif /* PIOS_OVERO_H */
/**
* @}
* @}
*/

33
flight/Revolution/System/pios_board.c
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@ -310,6 +310,7 @@ uint32_t pios_com_gps_id = 0;
uint32_t pios_com_telem_usb_id = 0;
uint32_t pios_com_telem_rf_id = 0;
uint32_t pios_com_bridge_id = 0;
uint32_t pios_com_overo_id = 0;
/*
* Setup a com port based on the passed cfg, driver and buffer sizes. tx size of -1 make the port rx only
@ -401,13 +402,6 @@ void PIOS_Board_Init(void) {
PIOS_Flash_Jedec_Init(pios_spi_accel_id, 1, &flash_m25p_cfg);
#endif
PIOS_FLASHFS_Init(&flashfs_m25p_cfg);
#if defined(PIOS_OVERO_SPI)
/* Set up the SPI interface to the gyro */
if (PIOS_Overo_Init(&pios_overo_cfg)) {
PIOS_DEBUG_Assert(0);
}
#endif
/* Initialize UAVObject libraries */
EventDispatcherInitialize();
@ -786,6 +780,31 @@ void PIOS_Board_Init(void) {
break;
}
#if defined(PIOS_OVERO_SPI)
/* Set up the SPI based PIOS_COM interface to the overo */
{
HwSettingsData hwSettings;
HwSettingsGet(&hwSettings);
if(hwSettings.OptionalModules[HWSETTINGS_OPTIONALMODULES_OVERO] == HWSETTINGS_OPTIONALMODULES_ENABLED) {
if (PIOS_Overo_Init(&pios_overo_id, &pios_overo_cfg)) {
PIOS_DEBUG_Assert(0);
}
const uint32_t PACKET_SIZE = 1024;
uint8_t * rx_buffer = (uint8_t *) pvPortMalloc(PACKET_SIZE);
uint8_t * tx_buffer = (uint8_t *) pvPortMalloc(PACKET_SIZE);
PIOS_Assert(rx_buffer);
PIOS_Assert(tx_buffer);
if (PIOS_COM_Init(&pios_com_overo_id, &pios_overo_com_driver, pios_overo_id,
rx_buffer, PIOS_COM_TELEM_USB_RX_BUF_LEN,
tx_buffer, PIOS_COM_TELEM_USB_TX_BUF_LEN)) {
PIOS_Assert(0);
}
}
}
#endif
#if defined(PIOS_INCLUDE_GCSRCVR)
GCSReceiverInitialize();
uint32_t pios_gcsrcvr_id;

43
flight/board_hw_defs/revolution/board_hw_defs.c
View File

@ -447,10 +447,15 @@ void PIOS_SPI_flash_irq_handler(void)
}
#endif /* PIOS_FLASH_ON_ACCEL */
#endif /* PIOS_INCLUDE_SPI */
#if defined(PIOS_OVERO_SPI)
/* SPI3 Interface
* - Used for flash communications
*/
#include <pios_overo_priv.h>
void PIOS_OVERO_irq_handler(void);
void DMA1_Streamr7_IRQHandler(void) __attribute__((alias("PIOS_OVERO_irq_handler")));
static const struct pios_overo_cfg pios_overo_cfg = {
.regs = SPI3,
.remap = GPIO_AF_SPI3,
@ -467,6 +472,17 @@ static const struct pios_overo_cfg pios_overo_cfg = {
},
.use_crc = false,
.dma = {
.irq = {
// Note this is the stream ID that triggers interrupts (in this case TX)
.flags = (DMA_IT_TCIF7 | DMA_IT_TEIF7), //DMA_IT_HTIF7),
.init = {
.NVIC_IRQChannel = DMA1_Stream7_IRQn,
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGH,
.NVIC_IRQChannelSubPriority = 0,
.NVIC_IRQChannelCmd = ENABLE,
},
},
.rx = {
.channel = DMA1_Stream0,
.init = {
@ -477,13 +493,13 @@ static const struct pios_overo_cfg pios_overo_cfg = {
.DMA_MemoryInc = DMA_MemoryInc_Enable,
.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
.DMA_Mode = DMA_Mode_Normal,
.DMA_Mode = DMA_Mode_Circular,
.DMA_Priority = DMA_Priority_Medium,
//TODO: Enable FIFO
.DMA_FIFOMode = DMA_FIFOMode_Disable,
.DMA_FIFOThreshold = DMA_FIFOThreshold_Full,
.DMA_MemoryBurst = DMA_MemoryBurst_Single,
.DMA_PeripheralBurst = DMA_PeripheralBurst_Single,
.DMA_FIFOThreshold = DMA_FIFOThreshold_Full,
.DMA_MemoryBurst = DMA_MemoryBurst_Single,
.DMA_PeripheralBurst = DMA_PeripheralBurst_Single,
},
},
.tx = {
@ -496,12 +512,12 @@ static const struct pios_overo_cfg pios_overo_cfg = {
.DMA_MemoryInc = DMA_MemoryInc_Enable,
.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
.DMA_Mode = DMA_Mode_Normal,
.DMA_Mode = DMA_Mode_Circular,
.DMA_Priority = DMA_Priority_Medium,
.DMA_FIFOMode = DMA_FIFOMode_Disable,
.DMA_FIFOThreshold = DMA_FIFOThreshold_Full,
.DMA_MemoryBurst = DMA_MemoryBurst_Single,
.DMA_PeripheralBurst = DMA_PeripheralBurst_Single,
.DMA_FIFOThreshold = DMA_FIFOThreshold_Full,
.DMA_MemoryBurst = DMA_MemoryBurst_Single,
.DMA_PeripheralBurst = DMA_PeripheralBurst_Single,
},
},
},
@ -547,12 +563,17 @@ static const struct pios_overo_cfg pios_overo_cfg = {
},
} },
};
uint32_t pios_overo_id = 0;
void PIOS_OVERO_irq_handler(void)
{
/* Call into the generic code to handle the IRQ for this specific device */
PIOS_OVERO_DMA_irq_handler(pios_overo_id);
}
#else
uint32_t pios_spi_overo_id = 0;
#endif /* PIOS_OVERO_SPI */
#endif /* PIOS_INCLUDE_SPI */