openocd: add support for stlink on stm32f4 targets

Makefile

@@ -203,10 +203,9 @@ arm_sdk_clean:
 OPENOCD_DIR := $(TOOLS_DIR)/openocd
 
 .PHONY: openocd_install
+openocd_install: | $(DL_DIR) $(TOOLS_DIR)
 openocd_install: OPENOCD_URL  := http://sourceforge.net/projects/openocd/files/openocd/0.5.0/openocd-0.5.0.tar.bz2/download
 openocd_install: OPENOCD_FILE := openocd-0.5.0.tar.bz2
-# order-only prereq on directory existance:
-openocd_install: | $(DL_DIR) $(TOOLS_DIR)
 openocd_install: openocd_clean
         # download the source only if it's newer than what we already have
 	$(V1) wget -N -P "$(DL_DIR)" --trust-server-name "$(OPENOCD_URL)"
@@ -221,6 +220,44 @@ openocd_install: openocd_clean
 	$(V1) ( \
 	  cd $(DL_DIR)/openocd-build/openocd-0.5.0 ; \
 	  ./configure --prefix="$(OPENOCD_DIR)" --enable-ft2232_libftdi --enable-buspirate; \
+	  $(MAKE) --silent ; \
+	  $(MAKE) --silent install ; \
+	)
+
+        # delete the extracted source when we're done
+	$(V1) [ ! -d "$(DL_DIR)/openocd-build" ] || $(RM) -rf "$(DL_DIR)/openocd-build"
+
+.PHONY: openocd_git_install
+
+openocd_git_install: | $(DL_DIR) $(TOOLS_DIR)
+openocd_git_install: OPENOCD_URL  := git://openocd.git.sourceforge.net/gitroot/openocd/openocd
+openocd_git_install: OPENOCD_REV  := bce7009e31b23250d4325637c7b7cdbae0efed9a
+openocd_git_install: openocd_clean
+        # download the source
+	$(V0) @echo " DOWNLOAD     $(OPENOCD_URL) @ $(OPENOCD_REV)"
+	$(V1) [ ! -d "$(DL_DIR)/openocd-build" ] || $(RM) -rf "$(DL_DIR)/openocd-build"
+	$(V1) mkdir -p "$(DL_DIR)/openocd-build"
+	$(V1) git clone --depth 1 --no-checkout $(OPENOCD_URL) "$(DL_DIR)/openocd-build"
+	$(V1) ( \
+	  cd $(DL_DIR)/openocd-build ; \
+	  git checkout -q $(OPENOCD_REV) ; \
+	)
+
+        # apply patches
+	$(V0) @echo " PATCH        $(OPENOCD_DIR)"
+	$(V1) ( \
+	  cd $(DL_DIR)/openocd-build ; \
+	  git apply < $(ROOT_DIR)/flight/Project/OpenOCD/0001-armv7m-remove-dummy-FP-regs-for-new-gdb.patch ; \
+	  git apply < $(ROOT_DIR)/flight/Project/OpenOCD/0002-rtos-add-stm32_stlink-to-FreeRTOS-targets.patch ; \
+	)
+
+        # build and install
+	$(V0) @echo " BUILD        $(OPENOCD_DIR)"
+	$(V1) mkdir -p "$(OPENOCD_DIR)"
+	$(V1) ( \
+	  cd $(DL_DIR)/openocd-build ; \
+	  ./bootstrap ; \
+	  ./configure --enable-maintainer-mode --prefix="$(OPENOCD_DIR)" --enable-ft2232_libftdi --enable-buspirate --enable-stlink ; \
 	  $(MAKE) ; \
 	  $(MAKE) install ; \
 	)
@@ -230,6 +267,7 @@ openocd_install: openocd_clean
 
 .PHONY: openocd_clean
 openocd_clean:
+	$(V0) @echo " CLEAN        $(OPENOCD_DIR)"
 	$(V1) [ ! -d "$(OPENOCD_DIR)" ] || $(RM) -r "$(OPENOCD_DIR)"
 
 STM32FLASH_DIR := $(TOOLS_DIR)/stm32flash

flight/Project/OpenOCD/0001-armv7m-remove-dummy-FP-regs-for-new-gdb.patch

@@ -0,0 +1,79 @@
+From 7a8a1dbf856a2183c91f441cfdd2eee5b3d9151b Mon Sep 17 00:00:00 2001
+From: Stacey Sheldon <stac@solidgoldbomb.org>
+Date: Thu, 2 Feb 2012 22:42:03 -0500
+Subject: [PATCH 1/2] armv7m: remove dummy FP regs for new gdb
+
+---
+ src/rtos/rtos_standard_stackings.c |    6 ++++++
+ src/target/armv7m.c                |   16 ++++++++++++++++
+ 2 files changed, 22 insertions(+), 0 deletions(-)
+
+diff --git a/src/rtos/rtos_standard_stackings.c b/src/rtos/rtos_standard_stackings.c
+index 278d3ef..7ef4659 100644
+--- a/src/rtos/rtos_standard_stackings.c
++++ b/src/rtos/rtos_standard_stackings.c
+@@ -41,6 +41,7 @@ static const struct stack_register_offset rtos_standard_Cortex_M3_stack_offsets[
+ 	{ -2,   32 },       /* sp   */
+ 	{ 0x34, 32 },       /* lr   */
+ 	{ 0x38, 32 },       /* pc   */
++#ifdef USE_DUMMY_FP_REGS
+ 	{ -1,   96 },       /* FPA1 */
+ 	{ -1,   96 },       /* FPA2 */
+ 	{ -1,   96 },       /* FPA3 */
+@@ -50,6 +51,7 @@ static const struct stack_register_offset rtos_standard_Cortex_M3_stack_offsets[
+ 	{ -1,   96 },       /* FPA7 */
+ 	{ -1,   96 },       /* FPA8 */
+ 	{ -1,   32 },       /* FPS  */
++#endif
+ 	{ 0x3c, 32 },       /* xPSR */
+ };
+ 
+@@ -58,7 +60,11 @@ const struct rtos_register_stacking rtos_standard_Cortex_M3_stacking =
+ {
+ 	0x40,                                 /* stack_registers_size */
+ 	-1,                                   /* stack_growth_direction */
++#ifdef USE_DUMMY_FP_REGS
+ 	26,                                   /* num_output_registers */
++#else
++	17,
++#endif
+ 	8,                                    /* stack_alignment */
+ 	rtos_standard_Cortex_M3_stack_offsets /* register_offsets */
+ };
+diff --git a/src/target/armv7m.c b/src/target/armv7m.c
+index 6c1732e..7bb53c7 100644
+--- a/src/target/armv7m.c
++++ b/src/target/armv7m.c
+@@ -272,6 +272,7 @@ int armv7m_get_gdb_reg_list(struct target *target, struct reg **reg_list[], int
+ 	struct armv7m_common *armv7m = target_to_armv7m(target);
+ 	int i;
+ 
++#ifdef USE_DUMMY_FP_REGS
+ 	*reg_list_size = 26;
+ 	*reg_list = malloc(sizeof(struct reg*) * (*reg_list_size));
+ 
+@@ -302,6 +303,21 @@ int armv7m_get_gdb_reg_list(struct target *target, struct reg **reg_list[], int
+ 	(*reg_list)[25] = &armv7m->core_cache->reg_list[ARMV7M_xPSR];
+ #endif
+ 
++#else
++	*reg_list_size = 17;
++	*reg_list = malloc(sizeof(struct reg*) * (*reg_list_size));
++
++	/*
++	 * GDB register packet format for ARM:
++	 * - the first 16 registers are r0..r15
++	 * - followed by xPSR
++	 */
++	for (i = 0; i < *reg_list_size; i++)
++	{
++		(*reg_list)[i] = &armv7m->core_cache->reg_list[i];
++	}
++#endif
++
+ 	return ERROR_OK;
+ }
+ 
+-- 
+1.7.1
+

flight/Project/OpenOCD/0002-rtos-add-stm32_stlink-to-FreeRTOS-targets.patch

@@ -0,0 +1,34 @@
+From fceb681b4421dd00eb47085990b77c0f0716517d Mon Sep 17 00:00:00 2001
+From: Stacey Sheldon <stac@solidgoldbomb.org>
+Date: Thu, 2 Feb 2012 22:42:26 -0500
+Subject: [PATCH 2/2] rtos: add stm32_stlink to FreeRTOS targets
+
+---
+ src/rtos/FreeRTOS.c |   11 +++++++++++
+ 1 files changed, 11 insertions(+), 0 deletions(-)
+
+diff --git a/src/rtos/FreeRTOS.c b/src/rtos/FreeRTOS.c
+index eeab134..e57806e 100644
+--- a/src/rtos/FreeRTOS.c
++++ b/src/rtos/FreeRTOS.c
+@@ -63,6 +63,17 @@ const struct FreeRTOS_params FreeRTOS_params_list[] =
+           0,                                // thread_stack_offset;
+           52,                               // thread_name_offset;
+           &rtos_standard_Cortex_M3_stacking, // stacking_info
++		},
++		{ "stm32_stlink",                      // target_name
++          4,                                // thread_count_width;
++          4,                                // pointer_width;
++          16,                               // list_next_offset;
++          20,                               // list_width;
++          8,                                // list_elem_next_offset;
++          12,                               // list_elem_content_offset
++          0,                                // thread_stack_offset;
++          52,                               // thread_name_offset;
++          &rtos_standard_Cortex_M3_stacking, // stacking_info
+ 		}
+ 
+ };
+-- 
+1.7.1
+

flight/Project/OpenOCD/stlink-v2.cfg

@@ -0,0 +1,17 @@
+#
+# STMicroelectronics ST-LINK/V2 in-circuit debugger/programmer
+#
+
+interface stlink
+stlink_layout usb
+stlink_device_desc "ST-LINK/V2"
+stlink_vid_pid 0x0483 0x3748
+#
+# dummy values, not really needed
+#
+adapter_khz 1
+reset_config trst_and_srst
+
+gdb_port 3333
+tcl_port 6666
+telnet_port 4444

flight/Project/OpenOCD/stm32f4xx.stlink.cfg

@@ -0,0 +1,34 @@
+#
+#
+#
+if { [info exists CHIPNAME] } {
+   set _CHIPNAME $CHIPNAME
+} else {
+   set _CHIPNAME stm32f4x
+}
+
+# Work-area is a space in RAM used for flash programming
+# By default use 64kB
+if { [info exists WORKAREASIZE] } {
+   set _WORKAREASIZE $WORKAREASIZE
+} else {
+   set _WORKAREASIZE 0x10000
+}
+
+if { [info exists CPUTAPID] } {
+   set _CPUTAPID $CPUTAPID
+} else {
+   set _CPUTAPID 0x2ba01477
+}
+
+transport select stlink_swd
+
+stlink newtap $_CHIPNAME cpu -expected-id $_CPUTAPID
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME stm32_stlink -chain-position $_TARGETNAME -rtos auto
+
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
+
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME stm32f2x 0x08000000 0 0 0 $_TARGETNAME