mirror of
https://bitbucket.org/librepilot/librepilot.git
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Added PIOS_I2C module. It's blind code though, no idea if it works.
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@60 ebee16cc-31ac-478f-84a7-5cbb03baadba
This commit is contained in:
gussy
gussy
parent
f52a719c1d
commit
a1f7f260c1
@ -95,6 +95,7 @@ SRC += $(PIOSSTM32F10X)/pios_usart.c
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SRC += $(PIOSSTM32F10X)/pios_irq.c
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SRC += $(PIOSSTM32F10X)/pios_irq.c
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SRC += $(PIOSSTM32F10X)/pios_adc.c
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SRC += $(PIOSSTM32F10X)/pios_adc.c
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SRC += $(PIOSSTM32F10X)/pios_servo.c
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SRC += $(PIOSSTM32F10X)/pios_servo.c
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SRC += $(PIOSSTM32F10X)/pios_i2c.c
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## PIOS Hardware (Common)
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## PIOS Hardware (Common)
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SRC += $(PIOSCOMMON)/pios_settings.c
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SRC += $(PIOSCOMMON)/pios_settings.c
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574
flight/PiOS/STM32F10x/pios_i2c.c
Normal file
574
flight/PiOS/STM32F10x/pios_i2c.c
Normal file
@ -0,0 +1,574 @@
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/**
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******************************************************************************
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*
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* @file pios_i2c.c
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* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2009.
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* @brief I2C Enable/Disable routines
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* @see The GNU Public License (GPL) Version 3
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* @defgroup PIOS_I2C I2C Communication Functions
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* @{
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*
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*****************************************************************************/
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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/* Project Includes */
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#include "pios.h"
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/* Global Variables */
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volatile uint32_t PIOS_I2C_UnexpectedEvent;
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/* Local types */
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typedef union {
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struct {
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unsigned ALL:8;
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};
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struct {
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unsigned BUSY:1;
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unsigned STOP_REQUESTED:1;
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unsigned ABORT_IF_FIRST_BYTE_0:1;
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unsigned WRITE_WITHOUT_STOP:1;
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};
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} TransferStateTypeDef;
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typedef struct {
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I2C_TypeDef *base;
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uint8_t i2c_address;
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uint8_t *tx_buffer_ptr;
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uint8_t *rx_buffer_ptr;
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volatile uint16_t buffer_len;
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volatile uint16_t buffer_ix;
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volatile TransferStateTypeDef transfer_state;
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volatile int32_t transfer_error;
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volatile int32_t last_transfer_error;
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volatile uint8_t i2c_semaphore;
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} I2CRecTypeDef;
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/* Local Prototypes */
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static void PIOS_I2C_InitPeripheral(void);
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static void EV_IRQHandler(I2CRecTypeDef *i2cx);
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static void ER_IRQHandler(I2CRecTypeDef *i2cx);
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/* Local Variables */
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static I2CRecTypeDef I2CRec;
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/**
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* Initializes IIC driver
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* \param[in] mode currently only mode 0 supported
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* \return < 0 if initialisation failed
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*/
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int32_t PIOS_I2C_Init(void)
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{
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/* Configure IIC pins in open drain mode */
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GPIO_InitTypeDef GPIO_InitStructure;
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GPIO_StructInit(&GPIO_InitStructure);
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_10MHz;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_OD;
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GPIO_InitStructure.GPIO_Pin = I2C_SCL_PIN;
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GPIO_Init(I2C_GPIO_PORT, &GPIO_InitStructure);
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GPIO_InitStructure.GPIO_Pin = I2C_SDA_PIN;
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GPIO_Init(I2C_GPIO_PORT, &GPIO_InitStructure);
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PIOS_I2C_InitPeripheral();
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/* Now accessible for other tasks */
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I2CRec.i2c_semaphore = 0;
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I2CRec.last_transfer_error = 0;
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/* Configure and enable I2C2 interrupts */
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NVIC_InitTypeDef NVIC_InitStructure;
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NVIC_InitStructure.NVIC_IRQChannel = I2C2_EV_IRQn;
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = IRQ_I2C_EV_PRIORITY;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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NVIC_InitStructure.NVIC_IRQChannel = I2C2_ER_IRQn;
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = IRQ_I2C_ER_PRIORITY;
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NVIC_Init(&NVIC_InitStructure);
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/* No error */
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return 0;
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}
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/**
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* Internal function to (re-)initialize the I2C peripheral
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*/
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static void PIOS_I2C_InitPeripheral(void)
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{
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I2C_InitTypeDef I2C_InitStructure;
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I2CRecTypeDef *i2cx = &I2CRec;
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/* Prepare I2C init-struct */
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I2C_StructInit(&I2C_InitStructure);
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I2C_InitStructure.I2C_Mode = I2C_Mode_I2C;
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I2C_InitStructure.I2C_OwnAddress1 = 0;
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I2C_InitStructure.I2C_Ack = I2C_Ack_Enable;
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I2C_InitStructure.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit;
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/* Define base address */
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i2cx->base = I2C2;
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/* enable peripheral clock of I2C */
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C2, ENABLE);
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/* Set I2C clock bus clock params */
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/* Note that the STM32 driver handles value <= 100kHz differently! (duty cycle always 1:1) */
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/* Important: bus frequencies > 400kHz don't work stable */
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I2C_InitStructure.I2C_DutyCycle = I2C_DUTY_CYCLE;
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I2C_InitStructure.I2C_ClockSpeed = I2C_BUS_FREQUENCY;
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/* Trigger software reset via I2C_DeInit */
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I2C_DeInit(i2cx->base);
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/* Clear transfer state and error value */
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i2cx->transfer_state.ALL = 0;
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i2cx->transfer_error = 0;
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/* Configure I2C peripheral */
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I2C_Init(i2cx->base, &I2C_InitStructure);
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}
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/**
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* Semaphore handling: requests the IIC interface
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* \param[in] semaphore_type is either IIC_Blocking or IIC_Non_Blocking
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* \return Non_Blocking: returns -1 to request a retry
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* \return 0 if IIC interface free
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*/
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int32_t PIOS_I2C_TransferBegin(I2CSemaphoreTypeDef semaphore_type)
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{
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I2CRecTypeDef *i2cx = &I2CRec;
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int32_t status = -1;
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do {
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PIOS_IRQ_Disable();
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if(!i2cx->i2c_semaphore) {
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i2cx->i2c_semaphore = 1;
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status = 0;
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}
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PIOS_IRQ_Enable();
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} while(semaphore_type == I2C_Blocking && status != 0);
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/* Clear transfer errors of last transmission */
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i2cx->last_transfer_error = 0;
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i2cx->transfer_error = 0;
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return status;
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}
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/**
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* Semaphore handling: releases the IIC interface for other tasks
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* \return < 0 on errors
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*/
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int32_t PIOS_I2C_TransferFinished(void)
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{
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I2CRec.i2c_semaphore = 0;
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/* No error */
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return 0;
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}
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/**
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* Returns the last transfer error<BR>
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* Will be updated by PIOS_I2C_TransferCheck(), so that the error status
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* doesn't get lost (the check function will return 0 when called again)<BR>
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* Will be cleared when a new transfer has been started successfully
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* \return last error status
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*/
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int32_t MIOS32_IIC_LastErrorGet(void)
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{
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return I2CRec.last_transfer_error;
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}
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/**
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* Checks if transfer is finished
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* \return 0 if no ongoing transfer
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* \return 1 if ongoing transfer
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* \return < 0 if error during transfer
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* \note Note that the semaphore will be released automatically after an error
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* (PIOS_I2C_TransferBegin() has to be called again)
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*/
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int32_t PIOS_I2C_TransferCheck(void)
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{
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I2CRecTypeDef *i2cx = &I2CRec;
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/* Ongoing transfer? */
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if(i2cx->transfer_state.BUSY) {
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return 1;
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}
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/* Error during transfer? */
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/* (must be done *after* BUSY check to avoid race conditon!) */
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if(i2cx->transfer_error) {
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/* Store error status for MIOS32_IIC_LastErrorGet() function */
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i2cx->last_transfer_error = i2cx->transfer_error;
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/* Clear current error status */
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i2cx->transfer_error = 0;
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/* Release semaphore for easier programming at user level */
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i2cx->i2c_semaphore = 0;
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/* And exit */
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return i2cx->last_transfer_error;
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}
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/* No transfer */
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return 0;
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}
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/**
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* Waits until transfer is finished
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* \return 0 if no ongoing transfer
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* \return < 0 if error during transfer
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* \note Note that the semaphore will be released automatically after an error
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* (PIOS_I2C_TransferBegin() has to be called again)
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*/
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int32_t PIOS_I2C_TransferWait(void)
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{
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I2CRecTypeDef *i2cx = &I2CRec;
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uint32_t repeat_ctr = I2C_TIMEOUT_VALUE;
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uint16_t last_buffer_ix = i2cx->buffer_ix;
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while(--repeat_ctr > 0) {
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/* Check if buffer index has changed - if so, reload repeat counter */
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if(i2cx->buffer_ix != last_buffer_ix) {
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repeat_ctr = I2C_TIMEOUT_VALUE;
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last_buffer_ix = i2cx->buffer_ix;
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}
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/* Get transfer state */
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int32_t check_state = PIOS_I2C_TransferCheck();
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/* Exit if transfer finished or error detected */
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if(check_state <= 0) {
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if(check_state < 0) {
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/* Release semaphore for easier programming at user level */
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i2cx->i2c_semaphore = 0;
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}
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return check_state;
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}
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}
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/* Timeout error - something is stalling... */
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/* Send stop condition */
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I2C_GenerateSTOP(i2cx->base, ENABLE);
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/* Re-initialize peripheral */
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PIOS_I2C_InitPeripheral();
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/* Release semaphore (!) */
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i2cx->i2c_semaphore = 0;
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return (i2cx->last_transfer_error = I2C_ERROR_TIMEOUT);
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}
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/**
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* Starts a new transfer. If this function is called during an ongoing
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* transfer, we wait until it has been finished and setup the new transfer
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* \param[in] transfer type:<BR>
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* <UL>
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* <LI>I2C_Read: a common Read transfer
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* <LI>I2C_Write: a common Write transfer
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* <LI>I2C_Write_WithoutStop: don't send stop condition after transfer to allow
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* a restart condition (e.g. used to access EEPROMs)
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* \param[in] address of I2C device (bit 0 always cleared)
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* \param[in] *buffer pointer to transmit/receive buffer
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* \param[in] len number of bytes which should be transmitted/received
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* \return 0 no error
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* \return < 0 on errors, if PIOS_I2C_ERROR_PREV_OFFSET is added, the previous
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* transfer got an error (the previous task didn't use \ref PIOS_I2C_TransferWait
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* to poll the transfer state)
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* \note Note that the semaphore will be released automatically after an error
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* (PIOS_I2C_TransferBegin() has to be called again)
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*/
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int32_t PIOS_I2C_Transfer(I2CTransferTypeDef transfer, uint8_t address, uint8_t *buffer, uint16_t len)
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{
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I2CRecTypeDef *i2cx = &I2CRec;
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int32_t error;
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/* Wait until previous transfer finished */
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if((error = PIOS_I2C_TransferWait())) {
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/* Transmission error during previous transfer */
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/* Release semaphore for easier programming at user level */
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i2cx->i2c_semaphore = 0;
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return error + I2C_ERROR_PREV_OFFSET;
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}
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/* Disable interrupts */
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I2C_ITConfig(i2cx->base, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR, DISABLE);
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/* Clear transfer state and error value */
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i2cx->transfer_state.ALL = 0;
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i2cx->transfer_error = 0;
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/* Set buffer length and start index */
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i2cx->buffer_len = len;
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i2cx->buffer_ix = 0;
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/* Branch depending on read/write */
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if(transfer == I2C_Read) {
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/* Take new address/buffer/len */
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/* Set bit 0 for read operation */
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i2cx->i2c_address = address | 1;
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/* Ensure that previous TX buffer won't be accessed */
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i2cx->tx_buffer_ptr = NULL;
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i2cx->rx_buffer_ptr = buffer;
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} else if(transfer == I2C_Write || transfer == I2C_Write_WithoutStop) {
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/* Take new address/buffer/len */
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/* Clear bit 0 for write operation */
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i2cx->i2c_address = address & 0xfe;
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i2cx->tx_buffer_ptr = buffer;
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/* Ensure that nothing will be received */
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i2cx->rx_buffer_ptr = NULL;
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/* Option to skip stop-condition generation after successful write */
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i2cx->transfer_state.WRITE_WITHOUT_STOP = transfer == I2C_Write_WithoutStop ? 1 : 0;
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} else {
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/* Release semaphore for easier programming at user level */
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i2cx->i2c_semaphore = 0;
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return (i2cx->last_transfer_error=I2C_ERROR_UNSUPPORTED_TRANSFER_TYPE);
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Start with ACK */
|
||||||
|
I2C_AcknowledgeConfig(i2cx->base, ENABLE);
|
||||||
|
|
||||||
|
/* Clear last error status */
|
||||||
|
i2cx->last_transfer_error = 0;
|
||||||
|
|
||||||
|
/* Notify that transfer has started */
|
||||||
|
i2cx->transfer_state.BUSY = 1;
|
||||||
|
|
||||||
|
/* Send start condition */
|
||||||
|
I2C_GenerateSTART(i2cx->base, ENABLE);
|
||||||
|
|
||||||
|
/* Enable I2V2 event, buffer and error interrupt */
|
||||||
|
/* This must be done *after* GenerateStart, for the case last transfer was WRITE_WITHOUT_STOP. */
|
||||||
|
/* In this case, start was already generated at the end of the last communication! */
|
||||||
|
I2C_ITConfig(i2cx->base, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR, ENABLE);
|
||||||
|
|
||||||
|
/* No error */
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Internal function for handling IIC event interrupts
|
||||||
|
*/
|
||||||
|
static void EV_IRQHandler(I2CRecTypeDef *i2cx)
|
||||||
|
{
|
||||||
|
uint8_t b;
|
||||||
|
|
||||||
|
/* Read SR1 and SR2 at the beginning (if not done so, flags may get lost) */
|
||||||
|
uint32_t event = I2C_GetLastEvent(i2cx->base);
|
||||||
|
|
||||||
|
/* The order of the handling blocks is chosen by test results @ 1MHZ */
|
||||||
|
/* Don't change this order */
|
||||||
|
|
||||||
|
/* RxNE set, will be cleared by reading/writing DR */
|
||||||
|
/* Note: also BTF will be reset after a read of SR1 (TxE flag) followed by either read/write DR */
|
||||||
|
/* Or a START or STOP condition generated */
|
||||||
|
/* Failsave: really requested a receive transfer? If not, continue to check TXE flag, if not set, */
|
||||||
|
/* We'll end up in the unexpected event handler. */
|
||||||
|
if(event & I2C_FLAG_RXNE && i2cx->rx_buffer_ptr != NULL) {
|
||||||
|
/* Get received data */
|
||||||
|
b = I2C_ReceiveData(i2cx->base);
|
||||||
|
|
||||||
|
/* Failsave: still place in buffer? */
|
||||||
|
if(i2cx->buffer_ix < i2cx->buffer_len) {
|
||||||
|
i2cx->rx_buffer_ptr[i2cx->buffer_ix++] = b;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Last byte received, disable interrupts and return. */
|
||||||
|
if(i2cx->transfer_state.STOP_REQUESTED) {
|
||||||
|
/* Transfer finished */
|
||||||
|
i2cx->transfer_state.BUSY = 0;
|
||||||
|
/* Disable all interrupts */
|
||||||
|
I2C_ITConfig(i2cx->base, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR, DISABLE);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Request NAK and stop condition before receiving last data */
|
||||||
|
if(i2cx->buffer_ix >= i2cx->buffer_len-1) {
|
||||||
|
/* Request NAK */
|
||||||
|
I2C_AcknowledgeConfig(i2cx->base, DISABLE);
|
||||||
|
/* Request stop condition */
|
||||||
|
I2C_GenerateSTOP(i2cx->base, ENABLE);
|
||||||
|
i2cx->transfer_state.STOP_REQUESTED = 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* ADDR set, TRA flag not set (indicates transmitter/receiver mode). */
|
||||||
|
/* ADDR will be cleared by a read of SR1 followed by a read of SR2 (done by I2C_GetLastEvent) */
|
||||||
|
/* If transmitter mode is selected (TRA set), we go on, TXE will be catched to send the first byte */
|
||||||
|
if((event & I2C_FLAG_ADDR) && !(event & I2C_FLAG_TRA)) {
|
||||||
|
/* Address sent (receiver mode), receiving first byte - check if we already have to request NAK/Stop */
|
||||||
|
if(i2cx->buffer_len == 1) {
|
||||||
|
/* Request NAK */
|
||||||
|
I2C_AcknowledgeConfig(i2cx->base, DISABLE);
|
||||||
|
/* Request stop condition */
|
||||||
|
I2C_GenerateSTOP(i2cx->base, ENABLE);
|
||||||
|
i2cx->transfer_state.STOP_REQUESTED = 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* TxE set, will be cleared by writing DR, or after START or STOP was generated */
|
||||||
|
/* This handling also applies for BTF, as TXE will alway be set if BTF is. */
|
||||||
|
/* Note: also BTF will be reset after a read of SR1 (TxE flag) followed by either read/write DR */
|
||||||
|
/* Or a START or STOP condition generated */
|
||||||
|
if(event & I2C_FLAG_TXE) {
|
||||||
|
/* Last byte already sent, disable interrupts and return. */
|
||||||
|
if(i2cx->transfer_state.STOP_REQUESTED) {
|
||||||
|
/* Transfer finished */
|
||||||
|
i2cx->transfer_state.BUSY = 0;
|
||||||
|
/* Disable all interrupts */
|
||||||
|
I2C_ITConfig(i2cx->base, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR, DISABLE);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
if(i2cx->buffer_ix < i2cx->buffer_len) {
|
||||||
|
/* Checking tx_buffer_ptr for NULL is a failsafe measure. */
|
||||||
|
I2C_SendData(i2cx->base, (i2cx->tx_buffer_ptr == NULL) ? 0 : i2cx->tx_buffer_ptr[i2cx->buffer_ix++]);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Peripheral is transfering last byte, request stop condition / */
|
||||||
|
/* On write-without-stop transfer-type, request start condition instead */
|
||||||
|
if(!i2cx->transfer_state.WRITE_WITHOUT_STOP) {
|
||||||
|
I2C_GenerateSTOP(i2cx->base, ENABLE);
|
||||||
|
} else {
|
||||||
|
I2C_GenerateSTART(i2cx->base, ENABLE);
|
||||||
|
i2cx->transfer_state.STOP_REQUESTED = 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
if(i2cx->buffer_len == 0) {
|
||||||
|
/* Transfer finished */
|
||||||
|
i2cx->transfer_state.BUSY = 0;
|
||||||
|
/* Disable all interrupts */
|
||||||
|
I2C_ITConfig(i2cx->base, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR, DISABLE);
|
||||||
|
} else {
|
||||||
|
/* Disable the I2C_IT_BUF interrupt after sending the last buffer data */
|
||||||
|
/* (last EV8) to not allow a new interrupt just with TxE - only BTF will generate it */
|
||||||
|
/* If this is not done, BUSY will be cleared before the transfer is finished */
|
||||||
|
I2C_ITConfig(i2cx->base, I2C_IT_BUF, DISABLE);
|
||||||
|
}
|
||||||
|
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* SB set, cleared by reading SR1 (done by I2C_GetLastEvent) followed by writing DR register */
|
||||||
|
if(event & I2C_FLAG_SB) {
|
||||||
|
/* Don't send address if stop was requested (WRITE_WITHOUT_STOP - mode, start condition was sent) */
|
||||||
|
/* We have to wait for the application to start the next transfer */
|
||||||
|
if(i2cx->transfer_state.STOP_REQUESTED) {
|
||||||
|
/* Transfer finished */
|
||||||
|
i2cx->transfer_state.BUSY = 0;
|
||||||
|
/* Disable all interrupts */
|
||||||
|
I2C_ITConfig(i2cx->base, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR, DISABLE);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Send IIC address */
|
||||||
|
I2C_Send7bitAddress(i2cx->base, i2cx->i2c_address,
|
||||||
|
(i2cx->i2c_address & 1)
|
||||||
|
? I2C_Direction_Receiver
|
||||||
|
: I2C_Direction_Transmitter);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* This code is only reached if something got wrong, e.g. interrupt handler is called too late, */
|
||||||
|
/* The device reset itself (while testing, it was always event 0x00000000). we have to stop the transfer, */
|
||||||
|
/* Else read/write of corrupt data may be the result. */
|
||||||
|
I2C_ITConfig(i2cx->base, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR, DISABLE);
|
||||||
|
|
||||||
|
/* Notify error */
|
||||||
|
PIOS_I2C_UnexpectedEvent = event;
|
||||||
|
i2cx->transfer_error = I2C_ERROR_UNEXPECTED_EVENT;
|
||||||
|
i2cx->transfer_state.BUSY = 0;
|
||||||
|
|
||||||
|
/* Do dummy read to send NAK + STOP condition */
|
||||||
|
I2C_AcknowledgeConfig(i2cx->base, DISABLE);
|
||||||
|
b = I2C_ReceiveData(i2cx->base);
|
||||||
|
I2C_GenerateSTOP(i2cx->base, ENABLE);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Internal function for handling IIC error interrupts
|
||||||
|
*/
|
||||||
|
static void ER_IRQHandler(I2CRecTypeDef *i2cx)
|
||||||
|
{
|
||||||
|
/* Read SR1 and SR2 at the beginning (if not done so, flags may get lost) */
|
||||||
|
uint32_t event = I2C_GetLastEvent(i2cx->base);
|
||||||
|
|
||||||
|
/* Note that only one error number is available */
|
||||||
|
/* The order of these checks defines the priority */
|
||||||
|
|
||||||
|
/* Bus error (start/stop condition during read */
|
||||||
|
/* Unlikely, should only be relevant for slave mode?) */
|
||||||
|
if(event & I2C_FLAG_BERR) {
|
||||||
|
I2C_ClearITPendingBit(i2cx->base, I2C_IT_BERR);
|
||||||
|
i2cx->transfer_error = I2C_ERROR_BUS;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Arbitration lost */
|
||||||
|
if(event & I2C_FLAG_ARLO) {
|
||||||
|
I2C_ClearITPendingBit(i2cx->base, I2C_IT_ARLO);
|
||||||
|
i2cx->transfer_error = I2C_ERROR_ARBITRATION_LOST;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* No acknowledge received from slave (e.g. slave not connected) */
|
||||||
|
if(event & I2C_FLAG_AF) {
|
||||||
|
I2C_ClearITPendingBit(i2cx->base, I2C_IT_AF);
|
||||||
|
i2cx->transfer_error = I2C_ERROR_SLAVE_NOT_CONNECTED;
|
||||||
|
/* Send stop condition to release bus */
|
||||||
|
I2C_GenerateSTOP(i2cx->base, ENABLE);
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Disable interrupts */
|
||||||
|
I2C_ITConfig(i2cx->base, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR, DISABLE);
|
||||||
|
|
||||||
|
/* Notify that transfer has finished (due to the error) */
|
||||||
|
i2cx->transfer_state.BUSY = 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/* Interrupt vectors */
|
||||||
|
void I2C2_EV_IRQHandler(void)
|
||||||
|
{
|
||||||
|
EV_IRQHandler((I2CRecTypeDef *)&I2CRec);
|
||||||
|
}
|
||||||
|
|
||||||
|
void I2C2_ER_IRQHandler(void)
|
||||||
|
{
|
||||||
|
ER_IRQHandler((I2CRecTypeDef *)&I2CRec);
|
||||||
|
}
|
||||||
@ -66,6 +66,11 @@
|
|||||||
#define I2C_GPIO_PORT GPIOB
|
#define I2C_GPIO_PORT GPIOB
|
||||||
#define I2C_SDA_PIN GPIO_Pin_11
|
#define I2C_SDA_PIN GPIO_Pin_11
|
||||||
#define I2C_SCL_PIN GPIO_Pin_10
|
#define I2C_SCL_PIN GPIO_Pin_10
|
||||||
|
#define I2C_DUTY_CYCLE I2C_DutyCycle_2
|
||||||
|
#define I2C_BUS_FREQUENCY 400000
|
||||||
|
#define I2C_TIMEOUT_VALUE 5000
|
||||||
|
#define IRQ_I2C_EV_PRIORITY 2
|
||||||
|
#define IRQ_I2C_ER_PRIORITY 2
|
||||||
|
|
||||||
//------------------------
|
//------------------------
|
||||||
// Onboard Pressure sensor
|
// Onboard Pressure sensor
|
||||||
|
|||||||
62
flight/PiOS/inc/pios_i2c.h
Normal file
62
flight/PiOS/inc/pios_i2c.h
Normal file
@ -0,0 +1,62 @@
|
|||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
*
|
||||||
|
* @file pios_i2c.h
|
||||||
|
* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2009.
|
||||||
|
* @brief I2C functions header.
|
||||||
|
* @see The GNU Public License (GPL) Version 3
|
||||||
|
*
|
||||||
|
*****************************************************************************/
|
||||||
|
/*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 3 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful, but
|
||||||
|
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||||
|
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||||
|
* for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License along
|
||||||
|
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||||
|
* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef PIOS_I2C_H
|
||||||
|
#define PIOS_I2C_H
|
||||||
|
|
||||||
|
/* Local defines */
|
||||||
|
#define I2C_ERROR_INVALID_PORT -1
|
||||||
|
#define I2C_ERROR_GENERAL -2
|
||||||
|
#define I2C_ERROR_UNSUPPORTED_TRANSFER_TYPE -3
|
||||||
|
#define I2C_ERROR_TIMEOUT -4
|
||||||
|
#define I2C_ERROR_ARBITRATION_LOST -5
|
||||||
|
#define I2C_ERROR_BUS -6
|
||||||
|
#define I2C_ERROR_SLAVE_NOT_CONNECTED -7
|
||||||
|
#define I2C_ERROR_UNEXPECTED_EVENT -8
|
||||||
|
#define I2C_ERROR_RX_BUFFER_OVERRUN -9
|
||||||
|
#define I2C_ERROR_PREV_OFFSET -128
|
||||||
|
|
||||||
|
/* Global Types */
|
||||||
|
typedef enum {
|
||||||
|
I2C_Blocking,
|
||||||
|
I2C_Non_Blocking
|
||||||
|
} I2CSemaphoreTypeDef;
|
||||||
|
|
||||||
|
typedef enum {
|
||||||
|
I2C_Read,
|
||||||
|
I2C_Write,
|
||||||
|
I2C_Write_WithoutStop
|
||||||
|
} I2CTransferTypeDef;
|
||||||
|
|
||||||
|
/* Public Functions */
|
||||||
|
extern int32_t PIOS_I2C_Init(void);
|
||||||
|
extern int32_t PIOS_I2C_TransferBegin(I2CSemaphoreTypeDef semaphore_type);
|
||||||
|
extern int32_t PIOS_I2C_TransferFinished(void);
|
||||||
|
extern int32_t PIOS_I2C_LastErrorGet(void);
|
||||||
|
extern int32_t PIOS_I2C_TransferCheck(void);
|
||||||
|
extern int32_t PIOS_I2C_TransferWait(void);
|
||||||
|
extern int32_t PIOS_I2C_Transfer(I2CTransferTypeDef transfer, uint8_t address, uint8_t *buffer, uint16_t len);
|
||||||
|
|
||||||
|
#endif /* PIOS_I2C_H */
|
||||||
@ -57,6 +57,7 @@
|
|||||||
#include "pios_irq.h"
|
#include "pios_irq.h"
|
||||||
#include "pios_adc.h"
|
#include "pios_adc.h"
|
||||||
#include "pios_servo.h"
|
#include "pios_servo.h"
|
||||||
|
#include "pios_i2c.h"
|
||||||
|
|
||||||
/* PIOS Hardware Includes (Common) */
|
/* PIOS Hardware Includes (Common) */
|
||||||
#include "pios_settings.h"
|
#include "pios_settings.h"
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user