diff --git a/flight/PiOS/STM32F10x/pios_spi.c b/flight/PiOS/STM32F10x/pios_spi.c
index 41cc47bf1..fcb46ee9a 100644
--- a/flight/PiOS/STM32F10x/pios_spi.c
+++ b/flight/PiOS/STM32F10x/pios_spi.c
@@ -276,7 +276,7 @@ int32_t PIOS_SPI_ClaimBusISR(uint32_t spi_id)
 	bool valid = PIOS_SPI_validate(spi_dev);
 	PIOS_Assert(valid)
 	
-	if (xSemaphoreTakeFromISR(( xQueueHandle ) spi_dev->busy, NULL) != pdTRUE){
+	if (xSemaphoreTakeFromISR(spi_dev->busy, NULL) != pdTRUE){
 		return -1;
 	}
 #endif
@@ -307,6 +307,31 @@ int32_t PIOS_SPI_ReleaseBus(uint32_t spi_id)
 	return 0;
 }
 
+/**
+ * Release the SPI bus semaphore from ISR.  Calling the SPI functions does not require this
+ * \param[in] spi SPI number (0 or 1)
+ * \return 0 if no error
+ */
+int32_t PIOS_SPI_ReleaseBusISR(uint32_t spi_id)
+{
+#if defined(PIOS_INCLUDE_FREERTOS)
+    struct pios_spi_dev * spi_dev = (struct pios_spi_dev *)spi_id;
+
+    bool valid = PIOS_SPI_validate(spi_dev);
+    PIOS_Assert(valid)
+
+    xSemaphoreGiveFromISR(spi_dev->busy, NULL);
+#else
+    struct pios_spi_dev * spi_dev = (struct pios_spi_dev *)spi_id;
+    PIOS_IRQ_Disable();
+    spi_dev->busy = 0;
+    PIOS_IRQ_Enable();
+
+#endif
+    return 0;
+}
+
+
 /**
  * Controls the RC (Register Clock alias Chip Select) pin of a SPI port
  * \param[in] spi SPI number (0 or 1)
diff --git a/flight/PiOS/STM32F4xx/pios_spi.c b/flight/PiOS/STM32F4xx/pios_spi.c
index 8108e4eed..bf82a9951 100644
--- a/flight/PiOS/STM32F4xx/pios_spi.c
+++ b/flight/PiOS/STM32F4xx/pios_spi.c
@@ -53,7 +53,7 @@ static bool PIOS_SPI_validate(struct pios_spi_dev * com_dev)
 #if defined(PIOS_INCLUDE_FREERTOS)
 static struct pios_spi_dev * PIOS_SPI_alloc(void)
 {
-	return (malloc(sizeof(struct pios_spi_dev)));
+	return (pvPortMalloc(sizeof(struct pios_spi_dev)));
 }
 #else
 static struct pios_spi_dev pios_spi_devs[PIOS_SPI_MAX_DEVS];
@@ -275,8 +275,9 @@ int32_t PIOS_SPI_ClaimBusISR(uint32_t spi_id)
 	bool valid = PIOS_SPI_validate(spi_dev);
 	PIOS_Assert(valid)
 	
-	if (xSemaphoreTakeFromISR(( xQueueHandle ) spi_dev->busy, NULL) != pdTRUE)
+	if (xSemaphoreTakeFromISR(spi_dev->busy, NULL) != pdTRUE){
 		return -1;
+	}
 #endif
 	return 0;
 }
@@ -300,6 +301,24 @@ int32_t PIOS_SPI_ReleaseBus(uint32_t spi_id)
 	return 0;
 }
 
+/**
+ * Release the SPI bus semaphore from ISR.  Calling the SPI functions does not require this
+ * \param[in] spi SPI number (0 or 1)
+ * \return 0 if no error
+ */
+int32_t PIOS_SPI_ReleaseBusISR(uint32_t spi_id)
+{
+#if defined(PIOS_INCLUDE_FREERTOS)
+    struct pios_spi_dev * spi_dev = (struct pios_spi_dev *)spi_id;
+
+    bool valid = PIOS_SPI_validate(spi_dev);
+    PIOS_Assert(valid)
+
+    xSemaphoreGiveFromISR(spi_dev->busy, NULL);
+#endif
+    return 0;
+}
+
 /**
 * Controls the RC (Register Clock alias Chip Select) pin of a SPI port
 * \param[in] spi SPI number (0 or 1)
diff --git a/flight/PiOS/inc/pios_spi.h b/flight/PiOS/inc/pios_spi.h
index 2abbf9c20..951459b94 100644
--- a/flight/PiOS/inc/pios_spi.h
+++ b/flight/PiOS/inc/pios_spi.h
@@ -51,6 +51,7 @@ extern int32_t PIOS_SPI_Busy(uint32_t spi_id);
 extern int32_t PIOS_SPI_ClaimBus(uint32_t spi_id);
 extern int32_t PIOS_SPI_ClaimBusISR(uint32_t spi_id);
 extern int32_t PIOS_SPI_ReleaseBus(uint32_t spi_id);
+extern int32_t PIOS_SPI_ReleaseBusISR(uint32_t spi_id);
 extern void    PIOS_SPI_IRQ_Handler(uint32_t spi_id);
 extern void    PIOS_SPI_SetPrescalar(uint32_t spi_id, uint32_t prescalar);