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Code Issues Releases Activity

Remove all references to vTaskDelay in the flash code as it can run before the

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FreeRTOS scheduler

Also increaes init stack size from 0x80 to 0x100
This commit is contained in:
James Cotton 2011-07-15 18:06:18 -05:00
parent 01b62cf98f
commit b83f731c03
4 changed files with 58 additions and 52 deletions
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85
flight/PiOS/Common/pios_flash_w25x.c
View File

@ -41,11 +41,11 @@ static uint8_t PIOS_Flash_W25X_Busy() ;
static uint32_t PIOS_SPI_FLASH;
/**
/**
* @brief Claim the SPI bus for flash use and assert CS pin
* @return 0 for sucess, -1 for failure to get semaphore
*/
static int8_t PIOS_Flash_W25X_ClaimBus()
static int8_t PIOS_Flash_W25X_ClaimBus()
{
int8_t ret = PIOS_SPI_ClaimBus(PIOS_SPI_FLASH);
PIOS_FLASH_ENABLE;
@ -55,7 +55,7 @@ static int8_t PIOS_Flash_W25X_ClaimBus()
/**
* @brief Release the SPI bus sempahore and ensure flash chip not using bus
*/
static void PIOS_Flash_W25X_ReleaseBus()
static void PIOS_Flash_W25X_ReleaseBus()
{
PIOS_FLASH_DISABLE;
PIOS_SPI_ReleaseBus(PIOS_SPI_FLASH);
@ -64,8 +64,8 @@ static void PIOS_Flash_W25X_ReleaseBus()
/**
* @brief Returns if the flash chip is busy
*/
static uint8_t PIOS_Flash_W25X_Busy()
{
static uint8_t PIOS_Flash_W25X_Busy()
{
return PIOS_Flash_W25X_ReadStatus() & W25X_STATUS_BUSY;
}
@ -73,12 +73,12 @@ static uint8_t PIOS_Flash_W25X_Busy()
* @brief Execute the write enable instruction and returns the status
* @returns 0 if successful, -1 if unable to claim bus
*/
static uint8_t PIOS_Flash_W25X_WriteEnable()
static uint8_t PIOS_Flash_W25X_WriteEnable()
{
uint8_t out[] = {W25X_WRITE_ENABLE};
if(PIOS_Flash_W25X_ClaimBus() != 0)
return -1;
PIOS_SPI_TransferBlock(PIOS_SPI_FLASH,out,NULL,sizeof(out),NULL);
PIOS_SPI_TransferBlock(PIOS_SPI_FLASH,out,NULL,sizeof(out),NULL);
PIOS_Flash_W25X_ReleaseBus();
return 0;
}
@ -97,27 +97,27 @@ int8_t PIOS_Flash_W25X_Init(uint32_t spi_id)
/**
* @brief Read the status register from flash chip and return it
* @brief Read the status register from flash chip and return it
*/
uint8_t PIOS_Flash_W25X_ReadStatus()
uint8_t PIOS_Flash_W25X_ReadStatus()
{
uint8_t out[2] = {W25X_READ_STATUS, 0};
uint8_t in[2] = {0,0};
PIOS_Flash_W25X_ClaimBus();
PIOS_SPI_TransferBlock(PIOS_SPI_FLASH,out,in,sizeof(out),NULL);
PIOS_SPI_TransferBlock(PIOS_SPI_FLASH,out,in,sizeof(out),NULL);
PIOS_Flash_W25X_ReleaseBus();
return in[1];
}
/**
* @brief Read the status register from flash chip and return it
* @brief Read the status register from flash chip and return it
*/
uint8_t PIOS_Flash_W25X_ReadID()
uint8_t PIOS_Flash_W25X_ReadID()
{
uint8_t out[] = {W25X_DEVICE_ID, 0, 0, 0, 0, 0};
uint8_t in[6];
PIOS_Flash_W25X_ClaimBus();
PIOS_SPI_TransferBlock(PIOS_SPI_FLASH,out,in,sizeof(out),NULL);
PIOS_SPI_TransferBlock(PIOS_SPI_FLASH,out,in,sizeof(out),NULL);
PIOS_Flash_W25X_ReleaseBus();
return in[5];
}
@ -127,28 +127,27 @@ uint8_t PIOS_Flash_W25X_ReadID()
* @param[in] add Address of flash to erase
* @returns 0 if successful
* @retval -1 if unable to claim bus
* @retval
* @retval
*/
int8_t PIOS_Flash_W25X_EraseSector(uint32_t addr)
{
uint8_t ret;
uint8_t out[] = {W25X_SECTOR_ERASE, (addr >> 16) & 0xff, (addr >> 8) & 0xff , addr & 0xff};
if((ret = PIOS_Flash_W25X_WriteEnable()) != 0)
return ret;
if(PIOS_Flash_W25X_ClaimBus() != 0)
return -1;
return -1;
PIOS_SPI_TransferBlock(PIOS_SPI_FLASH,out,NULL,sizeof(out),NULL);
PIOS_Flash_W25X_ReleaseBus();
uint32_t i = 1;
while(PIOS_Flash_W25X_Busy()) {
//TODO: Fail on timeout
#if defined(PIOS_INCLUDE_FREERTOS)
vTaskDelay(1);
#endif
if(++i == 0)
return -1;
}
return 0;
}
@ -160,25 +159,26 @@ int8_t PIOS_Flash_W25X_EraseChip()
{
uint8_t ret;
uint8_t out[] = {W25X_CHIP_ERASE};
if((ret = PIOS_Flash_W25X_WriteEnable()) != 0)
return ret;
if(PIOS_Flash_W25X_ClaimBus() != 0)
return -1;
PIOS_SPI_TransferBlock(PIOS_SPI_FLASH,out,NULL,sizeof(out),NULL);
PIOS_SPI_TransferBlock(PIOS_SPI_FLASH,out,NULL,sizeof(out),NULL);
PIOS_Flash_W25X_ReleaseBus();
uint32_t i = 1;
while(PIOS_Flash_W25X_Busy()) {
//TODO: Fail on timeout
#if defined(PIOS_INCLUDE_FREERTOS)
vTaskDelay(1);
#endif
if(++i == 0)
return -1;
}
return 0;
}
/**
/**
* @brief Write one page of data (up to 256 bytes) aligned to a page start
* @param[in] addr Address in flash to write to
* @param[in] data Pointer to data to write to flash
@ -192,37 +192,38 @@ int8_t PIOS_Flash_W25X_WriteData(uint32_t addr, uint8_t * data, uint16_t len)
{
uint8_t ret;
uint8_t out[4] = {W25X_PAGE_WRITE, (addr >> 16) & 0xff, (addr >> 8) & 0xff , addr & 0xff};
/* Can only write one page at a time */
if(len > 0x100)
if(len > 0x100)
return -2;
/* Ensure number of bytes fits after starting address before end of page */
if(((addr & 0xff) + len) > 0x100)
if(((addr & 0xff) + len) > 0x100)
return -3;
if((ret = PIOS_Flash_W25X_WriteEnable()) != 0)
return ret;
/* Execute write page command and clock in address. Keep CS asserted */
if(PIOS_Flash_W25X_ClaimBus() != 0)
return -1;
PIOS_SPI_TransferBlock(PIOS_SPI_FLASH,out,NULL,sizeof(out),NULL);
/* Clock out data to flash */
PIOS_SPI_TransferBlock(PIOS_SPI_FLASH,data,NULL,len,NULL);
PIOS_Flash_W25X_ReleaseBus();
uint32_t i = 1;
while(PIOS_Flash_W25X_Busy()) {
#if defined(PIOS_INCLUDE_FREERTOS)
vTaskDelay(1);
#endif
if(++i == 0)
return -1;
}
return 0;
}
/**
/**
* @brief Read data from a location in flash memory
* @param[in] addr Address in flash to write to
* @param[in] data Pointer to data to write from flash
@ -243,6 +244,6 @@ int8_t PIOS_Flash_W25X_ReadData(uint32_t addr, uint8_t * data, uint16_t len)
PIOS_SPI_TransferBlock(PIOS_SPI_FLASH,NULL,data,len,NULL);
PIOS_Flash_W25X_ReleaseBus();
return 0;
}

5
flight/PiOS/Common/pios_flashfs_objlist.c
View File

@ -80,9 +80,10 @@ int32_t PIOS_FLASHFS_Init()
return -1;
if(object_table_magic != OBJECT_TABLE_MAGIC) {
if(magic_fail_count++ > MAX_BADMAGIC) {
magic_fail_count = 0;
PIOS_FLASHFS_ClearObjectTableHeader();
PIOS_DELAY_WaituS(100);
PIOS_LED_Toggle(LED1);
magic_fail_count = 0;
magic_good = true;
} else {
PIOS_DELAY_WaituS(100);
}

16
flight/PiOS/STM32F10x/link_STM32103CB_CC_Rev1_sections.ld
View File

@ -1,7 +1,7 @@
/* This is the size of the stack for all FreeRTOS IRQs */
_irq_stack_size = 0x180;
/* This is the size of the stack for early init: life span is until scheduler starts */
_init_stack_size = 0x80;
_init_stack_size = 0x100;
/* there is probably a way to get that from the MEMORY section */
_eram = ORIGIN(SRAM) + LENGTH(SRAM);
@ -43,7 +43,7 @@ SECTIONS
. = ALIGN(4);
__module_initcall_end = .;
} >FLASH
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
@ -58,7 +58,7 @@ SECTIONS
_etext = .;
_sidata = .;
/*
/*
* This stack is used both as the initial sp during early init as well as ultimately
* being used as the STM32's MSP (Main Stack Pointer) which is the same stack that
* is used for _all_ interrupt handlers. The end of this stack should be placed
@ -74,7 +74,7 @@ SECTIONS
_irq_stack_top = . - 4 ;
. = ALIGN(4);
} > SRAM
.data : AT (_etext)
{
_sdata = .;
@ -84,7 +84,7 @@ SECTIONS
} > SRAM
/* .bss section which is used for uninitialized data */
.bss (NOLOAD) :
{
@ -94,7 +94,7 @@ SECTIONS
. = ALIGN(4);
_ebss = . ;
} > SRAM
.heap (NOLOAD) :
{
_sheap = . ;
@ -103,7 +103,7 @@ SECTIONS
. = ALIGN(4);
_eheap = . ;
_eheap_pre_rtos = . ;
_init_stack_end = . ;
_init_stack_end = . ;
_sheap_post_rtos = . ;
. = . + _init_stack_size ;
. = ALIGN(4);
@ -111,7 +111,7 @@ SECTIONS
_init_stack_top = . - 4 ;
} > SRAM
/* keep the heap section at the end of the SRAM */
/* this will allow to claim the remaining bytes not used
/* at run time! (done by the reset vector).

4
flight/Project/OpenPilotOSX/OpenPilotOSX.xcodeproj/project.pbxproj
View File

@ -90,6 +90,8 @@
65632DF51251650300469B77 /* pios_board.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = pios_board.h; sourceTree = "<group>"; };
65632DF61251650300469B77 /* STM32103CB_AHRS.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = STM32103CB_AHRS.h; sourceTree = "<group>"; };
65632DF71251650300469B77 /* STM3210E_OP.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = STM3210E_OP.h; sourceTree = "<group>"; };
6572CB1613D0F2B200FC2972 /* link_STM32103CB_CC_Rev1_memory.ld */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = text; name = link_STM32103CB_CC_Rev1_memory.ld; path = ../../PiOS/STM32F10x/link_STM32103CB_CC_Rev1_memory.ld; sourceTree = SOURCE_ROOT; };
6572CB1713D0F2B200FC2972 /* link_STM32103CB_CC_Rev1_sections.ld */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = text; name = link_STM32103CB_CC_Rev1_sections.ld; path = ../../PiOS/STM32F10x/link_STM32103CB_CC_Rev1_sections.ld; sourceTree = SOURCE_ROOT; };
657CEEAD121DB6C8007A1FBE /* homelocation.xml */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = text.xml; path = homelocation.xml; sourceTree = "<group>"; };
657CEEB7121DBC63007A1FBE /* CoordinateConversions.c */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.c; path = CoordinateConversions.c; sourceTree = "<group>"; };
657CEEB9121DBC63007A1FBE /* CoordinateConversions.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = CoordinateConversions.h; sourceTree = "<group>"; };
@ -7761,6 +7763,8 @@
65E8F05911EFF25C00BBF654 /* Libraries */ = {
isa = PBXGroup;
children = (
6572CB1613D0F2B200FC2972 /* link_STM32103CB_CC_Rev1_memory.ld */,
6572CB1713D0F2B200FC2972 /* link_STM32103CB_CC_Rev1_sections.ld */,
65E8F05A11EFF25C00BBF654 /* CMSIS */,
65E8F06B11EFF25C00BBF654 /* dosfs */,
65E8F07111EFF25C00BBF654 /* FreeRTOS */,