From c3a55d671fb42236b1d918cddc39a12c8efb664f Mon Sep 17 00:00:00 2001
From: Steve Evans <Steve@SCEvans.com>
Date: Tue, 5 May 2015 16:50:19 +0100
Subject: [PATCH] OP-1849 DTR on FlexIO pin 3

Conflicts:
	flight/targets/boards/revonano/board_hw_defs.c
---
 flight/targets/boards/revonano/board_hw_defs.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/flight/targets/boards/revonano/board_hw_defs.c b/flight/targets/boards/revonano/board_hw_defs.c
index 740c8b6da..37b1ab02d 100644
--- a/flight/targets/boards/revonano/board_hw_defs.c
+++ b/flight/targets/boards/revonano/board_hw_defs.c
@@ -61,6 +61,9 @@
 #define FLEXI_USART_RX_PIN               GPIO_Pin_7
 #define FLEXI_USART_TX_GPIO              GPIOB
 #define FLEXI_USART_TX_PIN               GPIO_Pin_6
+// ReceiverPort pin 3
+#define FLEXI_USART_DTR_GPIO             GPIOB
+#define FLEXI_USART_DTR_PIN              GPIO_Pin_10
 
 
 #if defined(PIOS_INCLUDE_LED)
@@ -459,6 +462,15 @@ static const struct pios_usart_cfg pios_usart_flexi_cfg = {
             .GPIO_PuPd  = GPIO_PuPd_UP
         },
     },
+    .dtr                                       = {
+        .gpio = FLEXI_USART_DTR_GPIO,
+        .init = {
+            .GPIO_Pin   = FLEXI_USART_DTR_PIN,
+            .GPIO_Speed = GPIO_Speed_25MHz,
+            .GPIO_Mode  = GPIO_Mode_OUT,
+            .GPIO_OType = GPIO_OType_PP,
+        },
+    },
 };
 
 #endif /* PIOS_INCLUDE_COM_FLEXI */