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Clean up the pios_overo driver. Working well now.
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@ -121,18 +121,18 @@ static void PIOS_OVERO_WriteData(struct pios_overo_dev *overo_dev)
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// to this buffer. If we were writing at the beginning it could cause a weird race.
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if (overo_dev->tx_out_cb) {
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uint32_t max_bytes = PACKET_SIZE - overo_dev->writing_offset;
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int32_t max_bytes = PACKET_SIZE - overo_dev->writing_offset;
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if (max_bytes > 0) {
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bool tx_need_yield = false;
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uint16_t bytes_added;
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bool tx_need_yield = false;
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uint8_t *writing_pointer = &overo_dev->tx_buffer[overo_dev->writing_buffer][overo_dev->writing_offset];
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bytes_added = (overo_dev->tx_out_cb)(overo_dev->tx_out_context, writing_pointer, max_bytes, NULL, &tx_need_yield);
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if (tx_need_yield) {
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vPortYieldFromISR();
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}
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overo_dev->writing_offset += bytes_added;
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}
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}
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@ -145,7 +145,8 @@ static void PIOS_OVERO_WriteData(struct pios_overo_dev *overo_dev)
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void PIOS_OVERO_DMA_irq_handler(uint32_t overo_id)
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{
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struct pios_overo_dev * overo_dev = (struct pios_overo_dev *) overo_id;
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PIOS_Assert(PIOS_OVERO_validate(overo_dev));
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if(!PIOS_OVERO_validate(overo_dev))
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return;
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DMA_ClearFlag(overo_dev->cfg->dma.tx.channel, overo_dev->cfg->dma.irq.flags);
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@ -326,7 +327,7 @@ static void PIOS_OVERO_TxStart(uint32_t overo_id, uint16_t tx_bytes_avail)
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// DMA TX enable (enable IRQ) ?
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// Load any pending bytes from TX fifo
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//PIOS_OVERO_WriteData(overo_dev);
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PIOS_OVERO_WriteData(overo_dev);
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}
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static void PIOS_OVERO_RegisterRxCallback(uint32_t overo_id, pios_com_callback rx_in_cb, uint32_t context)
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