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OP-901 updated STM32 USB OTG Driver
This commit is contained in:
Alessio Morale
parent
1016b08b70
commit
ccc24d844a
@ -0,0 +1,306 @@
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/**
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******************************************************************************
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* @file usb_conf.h
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* @author MCD Application Team
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* @version V2.1.0
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* @date 19-March-2012
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* @brief General low level driver configuration
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
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*
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* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
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* You may not use this file except in compliance with the License.
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* You may obtain a copy of the License at:
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*
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* http://www.st.com/software_license_agreement_liberty_v2
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __USB_CONF__H__
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#define __USB_CONF__H__
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/* Includes ------------------------------------------------------------------*/
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#include "usb_conf.h"
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/** @addtogroup USB_OTG_DRIVER
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* @{
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*/
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/** @defgroup USB_CONF
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* @brief USB low level driver configuration file
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* @{
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*/
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/** @defgroup USB_CONF_Exported_Defines
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* @{
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*/
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/* USB Core and PHY interface configuration.
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Tip: To avoid modifying these defines each time you need to change the USB
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configuration, you can declare the needed define in your toolchain
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compiler preprocessor.
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*/
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/****************** USB OTG FS PHY CONFIGURATION *******************************
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* The USB OTG FS Core supports one on-chip Full Speed PHY.
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*
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* The USE_EMBEDDED_PHY symbol is defined in the project compiler preprocessor
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* when FS core is used.
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*******************************************************************************/
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#ifndef USE_USB_OTG_FS
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//#define USE_USB_OTG_FS
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#endif /* USE_USB_OTG_FS */
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#ifdef USE_USB_OTG_FS
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#define USB_OTG_FS_CORE
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#endif
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/****************** USB OTG HS PHY CONFIGURATION *******************************
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* The USB OTG HS Core supports two PHY interfaces:
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* (i) An ULPI interface for the external High Speed PHY: the USB HS Core will
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* operate in High speed mode
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* (ii) An on-chip Full Speed PHY: the USB HS Core will operate in Full speed mode
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*
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* You can select the PHY to be used using one of these two defines:
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* (i) USE_ULPI_PHY: if the USB OTG HS Core is to be used in High speed mode
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* (ii) USE_EMBEDDED_PHY: if the USB OTG HS Core is to be used in Full speed mode
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*
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* Notes:
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* - The USE_ULPI_PHY symbol is defined in the project compiler preprocessor as
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* default PHY when HS core is used.
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* - On STM322xG-EVAL and STM324xG-EVAL boards, only configuration(i) is available.
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* Configuration (ii) need a different hardware, for more details refer to your
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* STM32 device datasheet.
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*******************************************************************************/
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#ifndef USE_USB_OTG_HS
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//#define USE_USB_OTG_HS
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#endif /* USE_USB_OTG_HS */
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#ifndef USE_ULPI_PHY
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//#define USE_ULPI_PHY
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#endif /* USE_ULPI_PHY */
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#ifndef USE_EMBEDDED_PHY
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//#define USE_EMBEDDED_PHY
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#endif /* USE_EMBEDDED_PHY */
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#ifdef USE_USB_OTG_HS
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#define USB_OTG_HS_CORE
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#endif
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/*******************************************************************************
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* FIFO Size Configuration in Device mode
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*
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* (i) Receive data FIFO size = RAM for setup packets +
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* OUT endpoint control information +
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* data OUT packets + miscellaneous
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* Space = ONE 32-bits words
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* --> RAM for setup packets = 10 spaces
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* (n is the nbr of CTRL EPs the device core supports)
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* --> OUT EP CTRL info = 1 space
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* (one space for status information written to the FIFO along with each
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* received packet)
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* --> data OUT packets = (Largest Packet Size / 4) + 1 spaces
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* (MINIMUM to receive packets)
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* --> OR data OUT packets = at least 2*(Largest Packet Size / 4) + 1 spaces
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* (if high-bandwidth EP is enabled or multiple isochronous EPs)
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* --> miscellaneous = 1 space per OUT EP
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* (one space for transfer complete status information also pushed to the
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* FIFO with each endpoint's last packet)
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*
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* (ii)MINIMUM RAM space required for each IN EP Tx FIFO = MAX packet size for
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* that particular IN EP. More space allocated in the IN EP Tx FIFO results
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* in a better performance on the USB and can hide latencies on the AHB.
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*
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* (iii) TXn min size = 16 words. (n : Transmit FIFO index)
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* (iv) When a TxFIFO is not used, the Configuration should be as follows:
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* case 1 : n > m and Txn is not used (n,m : Transmit FIFO indexes)
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* --> Txm can use the space allocated for Txn.
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* case2 : n < m and Txn is not used (n,m : Transmit FIFO indexes)
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* --> Txn should be configured with the minimum space of 16 words
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* (v) The FIFO is used optimally when used TxFIFOs are allocated in the top
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* of the FIFO.Ex: use EP1 and EP2 as IN instead of EP1 and EP3 as IN ones.
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*******************************************************************************/
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/*******************************************************************************
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* FIFO Size Configuration in Host mode
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*
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* (i) Receive data FIFO size = (Largest Packet Size / 4) + 1 or
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* 2x (Largest Packet Size / 4) + 1, If a
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* high-bandwidth channel or multiple isochronous
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* channels are enabled
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*
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* (ii) For the host nonperiodic Transmit FIFO is the largest maximum packet size
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* for all supported nonperiodic OUT channels. Typically, a space
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* corresponding to two Largest Packet Size is recommended.
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*
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* (iii) The minimum amount of RAM required for Host periodic Transmit FIFO is
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* the largest maximum packet size for all supported periodic OUT channels.
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* If there is at least one High Bandwidth Isochronous OUT endpoint,
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* then the space must be at least two times the maximum packet size for
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* that channel.
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*******************************************************************************/
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/****************** USB OTG HS CONFIGURATION **********************************/
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#ifdef USB_OTG_HS_CORE
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#define RX_FIFO_HS_SIZE 512
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#define TX0_FIFO_HS_SIZE 512
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#define TX1_FIFO_HS_SIZE 512
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#define TX2_FIFO_HS_SIZE 0
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#define TX3_FIFO_HS_SIZE 0
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#define TX4_FIFO_HS_SIZE 0
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#define TX5_FIFO_HS_SIZE 0
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#define TXH_NP_HS_FIFOSIZ 96
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#define TXH_P_HS_FIFOSIZ 96
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// #define USB_OTG_HS_LOW_PWR_MGMT_SUPPORT
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// #define USB_OTG_HS_SOF_OUTPUT_ENABLED
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// #define USB_OTG_INTERNAL_VBUS_ENABLED
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#define USB_OTG_EXTERNAL_VBUS_ENABLED
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#ifdef USE_ULPI_PHY
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#define USB_OTG_ULPI_PHY_ENABLED
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#endif
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#ifdef USE_EMBEDDED_PHY
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#define USB_OTG_EMBEDDED_PHY_ENABLED
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#endif
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#define USB_OTG_HS_INTERNAL_DMA_ENABLED
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#define USB_OTG_HS_DEDICATED_EP1_ENABLED
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#endif
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/****************** USB OTG FS CONFIGURATION **********************************/
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#ifdef USB_OTG_FS_CORE
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#define RX_FIFO_FS_SIZE 128
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#define TX0_FIFO_FS_SIZE 64
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#define TX1_FIFO_FS_SIZE 128
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#define TX2_FIFO_FS_SIZE 0
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#define TX3_FIFO_FS_SIZE 0
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#define TXH_NP_HS_FIFOSIZ 96
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#define TXH_P_HS_FIFOSIZ 96
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// #define USB_OTG_FS_LOW_PWR_MGMT_SUPPORT
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// #define USB_OTG_FS_SOF_OUTPUT_ENABLED
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#endif
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/****************** USB OTG MISC CONFIGURATION ********************************/
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//#define VBUS_SENSING_ENABLED
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/****************** USB OTG MODE CONFIGURATION ********************************/
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//#define USE_HOST_MODE
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#define USE_DEVICE_MODE
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//#define USE_OTG_MODE
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#ifndef USB_OTG_FS_CORE
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#ifndef USB_OTG_HS_CORE
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#error "USB_OTG_HS_CORE or USB_OTG_FS_CORE should be defined"
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#endif
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#endif
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#ifndef USE_DEVICE_MODE
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#ifndef USE_HOST_MODE
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#error "USE_DEVICE_MODE or USE_HOST_MODE should be defined"
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#endif
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#endif
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#ifndef USE_USB_OTG_HS
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#ifndef USE_USB_OTG_FS
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#error "USE_USB_OTG_HS or USE_USB_OTG_FS should be defined"
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#endif
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#else //USE_USB_OTG_HS
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#ifndef USE_ULPI_PHY
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#ifndef USE_EMBEDDED_PHY
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#error "USE_ULPI_PHY or USE_EMBEDDED_PHY should be defined"
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#endif
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#endif
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#endif
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/****************** C Compilers dependant keywords ****************************/
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/* In HS mode and when the DMA is used, all variables and data structures dealing
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with the DMA during the transaction process should be 4-bytes aligned */
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#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
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#if defined (__GNUC__) /* GNU Compiler */
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#define __ALIGN_END __attribute__ ((aligned (4)))
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#define __ALIGN_BEGIN
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#else
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#define __ALIGN_END
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#if defined (__CC_ARM) /* ARM Compiler */
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#define __ALIGN_BEGIN __align(4)
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#elif defined (__ICCARM__) /* IAR Compiler */
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#define __ALIGN_BEGIN
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#elif defined (__TASKING__) /* TASKING Compiler */
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#define __ALIGN_BEGIN __align(4)
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#endif /* __CC_ARM */
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#endif /* __GNUC__ */
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#else
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#define __ALIGN_BEGIN
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#define __ALIGN_END
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#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
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/* __packed keyword used to decrease the data type alignment to 1-byte */
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#if defined (__CC_ARM) /* ARM Compiler */
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#define __packed __packed
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#elif defined (__ICCARM__) /* IAR Compiler */
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#define __packed __packed
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#elif defined ( __GNUC__ ) /* GNU Compiler */
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#define __packed __attribute__ ((__packed__))
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#elif defined (__TASKING__) /* TASKING Compiler */
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#define __packed __unaligned
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#endif /* __CC_ARM */
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/**
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* @}
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*/
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/** @defgroup USB_CONF_Exported_Types
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup USB_CONF_Exported_Macros
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup USB_CONF_Exported_Variables
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup USB_CONF_Exported_FunctionsPrototype
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* @{
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*/
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/**
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* @}
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*/
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#endif //__USB_CONF__H__
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/**
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* @}
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*/
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/**
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* @}
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*/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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<o:Author>STMicroelectronics</o:Author>
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<o:LastAuthor>Raouf Hosni</o:LastAuthor>
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<o:Revision>39</o:Revision>
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|
||||
<w:LsdException Locked="false" Priority="68" Name="Medium Grid 2"/>
|
||||
<w:LsdException Locked="false" Priority="69" Name="Medium Grid 3"/>
|
||||
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|
||||
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|
||||
<w:LsdException Locked="false" Priority="72" Name="Colorful List"/>
|
||||
<w:LsdException Locked="false" Priority="73" Name="Colorful Grid"/>
|
||||
<w:LsdException Locked="false" Priority="60" Name="Light Shading Accent 1"/>
|
||||
<w:LsdException Locked="false" Priority="61" Name="Light List Accent 1"/>
|
||||
<w:LsdException Locked="false" Priority="62" Name="Light Grid Accent 1"/>
|
||||
<w:LsdException Locked="false" Priority="63" Name="Medium Shading 1 Accent 1"/>
|
||||
<w:LsdException Locked="false" Priority="64" Name="Medium Shading 2 Accent 1"/>
|
||||
<w:LsdException Locked="false" Priority="65" Name="Medium List 1 Accent 1"/>
|
||||
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|
||||
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|
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|
||||
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|
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<w:LsdException Locked="false" Priority="71" Name="Colorful Shading Accent 1"/>
|
||||
<w:LsdException Locked="false" Priority="72" Name="Colorful List Accent 1"/>
|
||||
<w:LsdException Locked="false" Priority="73" Name="Colorful Grid Accent 1"/>
|
||||
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|
||||
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|
||||
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|
||||
<w:LsdException Locked="false" Priority="63" Name="Medium Shading 1 Accent 2"/>
|
||||
<w:LsdException Locked="false" Priority="64" Name="Medium Shading 2 Accent 2"/>
|
||||
<w:LsdException Locked="false" Priority="65" Name="Medium List 1 Accent 2"/>
|
||||
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|
||||
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|
||||
<w:LsdException Locked="false" Priority="68" Name="Medium Grid 2 Accent 2"/>
|
||||
<w:LsdException Locked="false" Priority="69" Name="Medium Grid 3 Accent 2"/>
|
||||
<w:LsdException Locked="false" Priority="70" Name="Dark List Accent 2"/>
|
||||
<w:LsdException Locked="false" Priority="71" Name="Colorful Shading Accent 2"/>
|
||||
<w:LsdException Locked="false" Priority="72" Name="Colorful List Accent 2"/>
|
||||
<w:LsdException Locked="false" Priority="73" Name="Colorful Grid Accent 2"/>
|
||||
<w:LsdException Locked="false" Priority="60" Name="Light Shading Accent 3"/>
|
||||
<w:LsdException Locked="false" Priority="61" Name="Light List Accent 3"/>
|
||||
<w:LsdException Locked="false" Priority="62" Name="Light Grid Accent 3"/>
|
||||
<w:LsdException Locked="false" Priority="63" Name="Medium Shading 1 Accent 3"/>
|
||||
<w:LsdException Locked="false" Priority="64" Name="Medium Shading 2 Accent 3"/>
|
||||
<w:LsdException Locked="false" Priority="65" Name="Medium List 1 Accent 3"/>
|
||||
<w:LsdException Locked="false" Priority="66" Name="Medium List 2 Accent 3"/>
|
||||
<w:LsdException Locked="false" Priority="67" Name="Medium Grid 1 Accent 3"/>
|
||||
<w:LsdException Locked="false" Priority="68" Name="Medium Grid 2 Accent 3"/>
|
||||
<w:LsdException Locked="false" Priority="69" Name="Medium Grid 3 Accent 3"/>
|
||||
<w:LsdException Locked="false" Priority="70" Name="Dark List Accent 3"/>
|
||||
<w:LsdException Locked="false" Priority="71" Name="Colorful Shading Accent 3"/>
|
||||
<w:LsdException Locked="false" Priority="72" Name="Colorful List Accent 3"/>
|
||||
<w:LsdException Locked="false" Priority="73" Name="Colorful Grid Accent 3"/>
|
||||
<w:LsdException Locked="false" Priority="60" Name="Light Shading Accent 4"/>
|
||||
<w:LsdException Locked="false" Priority="61" Name="Light List Accent 4"/>
|
||||
<w:LsdException Locked="false" Priority="62" Name="Light Grid Accent 4"/>
|
||||
<w:LsdException Locked="false" Priority="63" Name="Medium Shading 1 Accent 4"/>
|
||||
<w:LsdException Locked="false" Priority="64" Name="Medium Shading 2 Accent 4"/>
|
||||
<w:LsdException Locked="false" Priority="65" Name="Medium List 1 Accent 4"/>
|
||||
<w:LsdException Locked="false" Priority="66" Name="Medium List 2 Accent 4"/>
|
||||
<w:LsdException Locked="false" Priority="67" Name="Medium Grid 1 Accent 4"/>
|
||||
<w:LsdException Locked="false" Priority="68" Name="Medium Grid 2 Accent 4"/>
|
||||
<w:LsdException Locked="false" Priority="69" Name="Medium Grid 3 Accent 4"/>
|
||||
<w:LsdException Locked="false" Priority="70" Name="Dark List Accent 4"/>
|
||||
<w:LsdException Locked="false" Priority="71" Name="Colorful Shading Accent 4"/>
|
||||
<w:LsdException Locked="false" Priority="72" Name="Colorful List Accent 4"/>
|
||||
<w:LsdException Locked="false" Priority="73" Name="Colorful Grid Accent 4"/>
|
||||
<w:LsdException Locked="false" Priority="60" Name="Light Shading Accent 5"/>
|
||||
<w:LsdException Locked="false" Priority="61" Name="Light List Accent 5"/>
|
||||
<w:LsdException Locked="false" Priority="62" Name="Light Grid Accent 5"/>
|
||||
<w:LsdException Locked="false" Priority="63" Name="Medium Shading 1 Accent 5"/>
|
||||
<w:LsdException Locked="false" Priority="64" Name="Medium Shading 2 Accent 5"/>
|
||||
<w:LsdException Locked="false" Priority="65" Name="Medium List 1 Accent 5"/>
|
||||
<w:LsdException Locked="false" Priority="66" Name="Medium List 2 Accent 5"/>
|
||||
<w:LsdException Locked="false" Priority="67" Name="Medium Grid 1 Accent 5"/>
|
||||
<w:LsdException Locked="false" Priority="68" Name="Medium Grid 2 Accent 5"/>
|
||||
<w:LsdException Locked="false" Priority="69" Name="Medium Grid 3 Accent 5"/>
|
||||
<w:LsdException Locked="false" Priority="70" Name="Dark List Accent 5"/>
|
||||
<w:LsdException Locked="false" Priority="71" Name="Colorful Shading Accent 5"/>
|
||||
<w:LsdException Locked="false" Priority="72" Name="Colorful List Accent 5"/>
|
||||
<w:LsdException Locked="false" Priority="73" Name="Colorful Grid Accent 5"/>
|
||||
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|
||||
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|
||||
<w:LsdException Locked="false" Priority="62" Name="Light Grid Accent 6"/>
|
||||
<w:LsdException Locked="false" Priority="63" Name="Medium Shading 1 Accent 6"/>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<w:LsdException Locked="false" Priority="68" Name="Medium Grid 2 Accent 6"/>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<w:LsdException Locked="false" Priority="73" Name="Colorful Grid Accent 6"/>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<w:LsdException Locked="false" Priority="32" QFormat="true"
|
||||
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|
||||
<w:LsdException Locked="false" Priority="33" QFormat="true" Name="Book Title"/>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
|
||||
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|
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|
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|
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|
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|
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|
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|
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span.BalloonTextChar
|
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{mso-style-name:"Balloon Text Char";
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div.WordSection1
|
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{page:WordSection1;}
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@list l0:level7
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@list l0:level8
|
||||
{mso-level-tab-stop:4.0in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l0:level9
|
||||
{mso-level-tab-stop:4.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l1
|
||||
{mso-list-id:128015942;
|
||||
mso-list-template-ids:-90681214;}
|
||||
@list l1:level1
|
||||
{mso-level-tab-stop:.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l1:level2
|
||||
{mso-level-tab-stop:1.0in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l1:level3
|
||||
{mso-level-tab-stop:1.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l1:level4
|
||||
{mso-level-tab-stop:2.0in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l1:level5
|
||||
{mso-level-tab-stop:2.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l1:level6
|
||||
{mso-level-tab-stop:3.0in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l1:level7
|
||||
{mso-level-tab-stop:3.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l1:level8
|
||||
{mso-level-tab-stop:4.0in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l1:level9
|
||||
{mso-level-tab-stop:4.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l2
|
||||
{mso-list-id:216556000;
|
||||
mso-list-template-ids:925924412;}
|
||||
@list l2:level1
|
||||
{mso-level-number-format:bullet;
|
||||
mso-level-text:\F0B7;
|
||||
mso-level-tab-stop:.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;
|
||||
mso-ansi-font-size:10.0pt;
|
||||
font-family:Symbol;}
|
||||
@list l2:level2
|
||||
{mso-level-number-format:bullet;
|
||||
mso-level-text:\F0B7;
|
||||
mso-level-tab-stop:1.0in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;
|
||||
mso-ansi-font-size:10.0pt;
|
||||
font-family:Symbol;}
|
||||
@list l2:level3
|
||||
{mso-level-tab-stop:1.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l2:level4
|
||||
{mso-level-tab-stop:2.0in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l2:level5
|
||||
{mso-level-tab-stop:2.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l2:level6
|
||||
{mso-level-tab-stop:3.0in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l2:level7
|
||||
{mso-level-tab-stop:3.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l2:level8
|
||||
{mso-level-tab-stop:4.0in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l2:level9
|
||||
{mso-level-tab-stop:4.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l3
|
||||
{mso-list-id:562446694;
|
||||
mso-list-template-ids:913898366;}
|
||||
@list l3:level1
|
||||
{mso-level-number-format:bullet;
|
||||
mso-level-text:\F0B7;
|
||||
mso-level-tab-stop:.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;
|
||||
mso-ansi-font-size:10.0pt;
|
||||
font-family:Symbol;}
|
||||
@list l3:level2
|
||||
{mso-level-tab-stop:1.0in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l3:level3
|
||||
{mso-level-tab-stop:1.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l3:level4
|
||||
{mso-level-tab-stop:2.0in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l3:level5
|
||||
{mso-level-tab-stop:2.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l3:level6
|
||||
{mso-level-tab-stop:3.0in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l3:level7
|
||||
{mso-level-tab-stop:3.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l3:level8
|
||||
{mso-level-tab-stop:4.0in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l3:level9
|
||||
{mso-level-tab-stop:4.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l4
|
||||
{mso-list-id:797802132;
|
||||
mso-list-template-ids:-1971191336;}
|
||||
@list l4:level1
|
||||
{mso-level-tab-stop:.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l4:level2
|
||||
{mso-level-tab-stop:1.0in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l4:level3
|
||||
{mso-level-tab-stop:1.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l4:level4
|
||||
{mso-level-tab-stop:2.0in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l4:level5
|
||||
{mso-level-tab-stop:2.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l4:level6
|
||||
{mso-level-tab-stop:3.0in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l4:level7
|
||||
{mso-level-tab-stop:3.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l4:level8
|
||||
{mso-level-tab-stop:4.0in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l4:level9
|
||||
{mso-level-tab-stop:4.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l5
|
||||
{mso-list-id:907304066;
|
||||
mso-list-template-ids:1969781532;}
|
||||
@list l5:level1
|
||||
{mso-level-tab-stop:.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l5:level2
|
||||
{mso-level-tab-stop:1.0in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l5:level3
|
||||
{mso-level-tab-stop:1.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l5:level4
|
||||
{mso-level-tab-stop:2.0in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l5:level5
|
||||
{mso-level-tab-stop:2.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l5:level6
|
||||
{mso-level-tab-stop:3.0in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l5:level7
|
||||
{mso-level-tab-stop:3.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l5:level8
|
||||
{mso-level-tab-stop:4.0in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l5:level9
|
||||
{mso-level-tab-stop:4.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l6
|
||||
{mso-list-id:1050613616;
|
||||
mso-list-template-ids:-1009886748;}
|
||||
@list l6:level1
|
||||
{mso-level-number-format:bullet;
|
||||
mso-level-text:\F0B7;
|
||||
mso-level-tab-stop:.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;
|
||||
mso-ansi-font-size:10.0pt;
|
||||
font-family:Symbol;}
|
||||
@list l6:level2
|
||||
{mso-level-number-format:bullet;
|
||||
mso-level-text:\F0B7;
|
||||
mso-level-tab-stop:1.0in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;
|
||||
mso-ansi-font-size:10.0pt;
|
||||
font-family:Symbol;}
|
||||
@list l6:level3
|
||||
{mso-level-tab-stop:1.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l6:level4
|
||||
{mso-level-tab-stop:2.0in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l6:level5
|
||||
{mso-level-tab-stop:2.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l6:level6
|
||||
{mso-level-tab-stop:3.0in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l6:level7
|
||||
{mso-level-tab-stop:3.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l6:level8
|
||||
{mso-level-tab-stop:4.0in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l6:level9
|
||||
{mso-level-tab-stop:4.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l7
|
||||
{mso-list-id:1234970193;
|
||||
mso-list-template-ids:2055904002;}
|
||||
@list l7:level1
|
||||
{mso-level-number-format:bullet;
|
||||
mso-level-text:\F0B7;
|
||||
mso-level-tab-stop:.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;
|
||||
mso-ansi-font-size:10.0pt;
|
||||
font-family:Symbol;}
|
||||
@list l7:level2
|
||||
{mso-level-number-format:bullet;
|
||||
mso-level-text:\F0B7;
|
||||
mso-level-tab-stop:1.0in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;
|
||||
mso-ansi-font-size:10.0pt;
|
||||
font-family:Symbol;}
|
||||
@list l7:level3
|
||||
{mso-level-tab-stop:1.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l7:level4
|
||||
{mso-level-tab-stop:2.0in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l7:level5
|
||||
{mso-level-tab-stop:2.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l7:level6
|
||||
{mso-level-tab-stop:3.0in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l7:level7
|
||||
{mso-level-tab-stop:3.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l7:level8
|
||||
{mso-level-tab-stop:4.0in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l7:level9
|
||||
{mso-level-tab-stop:4.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l8
|
||||
{mso-list-id:1846092290;
|
||||
mso-list-template-ids:-768590846;}
|
||||
@list l8:level1
|
||||
{mso-level-start-at:2;
|
||||
mso-level-tab-stop:.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l8:level2
|
||||
{mso-level-tab-stop:1.0in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l8:level3
|
||||
{mso-level-tab-stop:1.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l8:level4
|
||||
{mso-level-tab-stop:2.0in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l8:level5
|
||||
{mso-level-tab-stop:2.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l8:level6
|
||||
{mso-level-tab-stop:3.0in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l8:level7
|
||||
{mso-level-tab-stop:3.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l8:level8
|
||||
{mso-level-tab-stop:4.0in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l8:level9
|
||||
{mso-level-tab-stop:4.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l9
|
||||
{mso-list-id:1894656566;
|
||||
mso-list-template-ids:1199983812;}
|
||||
@list l9:level1
|
||||
{mso-level-start-at:2;
|
||||
mso-level-tab-stop:.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l9:level2
|
||||
{mso-level-tab-stop:1.0in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l9:level3
|
||||
{mso-level-tab-stop:1.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l9:level4
|
||||
{mso-level-tab-stop:2.0in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l9:level5
|
||||
{mso-level-tab-stop:2.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l9:level6
|
||||
{mso-level-tab-stop:3.0in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l9:level7
|
||||
{mso-level-tab-stop:3.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l9:level8
|
||||
{mso-level-tab-stop:4.0in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
@list l9:level9
|
||||
{mso-level-tab-stop:4.5in;
|
||||
mso-level-number-position:left;
|
||||
text-indent:-.25in;}
|
||||
ol
|
||||
{margin-bottom:0in;}
|
||||
ul
|
||||
{margin-bottom:0in;}
|
||||
-->
|
||||
</style><!--[if gte mso 10]>
|
||||
<style>
|
||||
/* Style Definitions */
|
||||
table.MsoNormalTable
|
||||
{mso-style-name:"Table Normal";
|
||||
mso-tstyle-rowband-size:0;
|
||||
mso-tstyle-colband-size:0;
|
||||
mso-style-noshow:yes;
|
||||
mso-style-priority:99;
|
||||
mso-style-qformat:yes;
|
||||
mso-style-parent:"";
|
||||
mso-padding-alt:0in 5.4pt 0in 5.4pt;
|
||||
mso-para-margin:0in;
|
||||
mso-para-margin-bottom:.0001pt;
|
||||
mso-pagination:widow-orphan;
|
||||
font-size:10.0pt;
|
||||
font-family:"Times New Roman","serif";}
|
||||
</style>
|
||||
<![endif]--><!--[if gte mso 9]><xml>
|
||||
<o:shapedefaults v:ext="edit" spidmax="7170"/>
|
||||
</xml><![endif]--><!--[if gte mso 9]><xml>
|
||||
<o:shapelayout v:ext="edit">
|
||||
<o:idmap v:ext="edit" data="1"/>
|
||||
</o:shapelayout></xml><![endif]--></head>
|
||||
<body style="" lang="EN-US" link="blue" vlink="blue">
|
||||
|
||||
<div class="WordSection1">
|
||||
|
||||
<p class="MsoNormal"><span style="font-family: "Arial","sans-serif";"><o:p> </o:p></span></p>
|
||||
|
||||
<div align="center">
|
||||
|
||||
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<p class="MsoNormal"><span style="font-size: 8pt; font-family: "Arial","sans-serif"; color: blue;"><a href="../../Release_Notes.html">Back to Release page</a></span><span style="font-size: 10pt;"><o:p></o:p></span></p>
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<h1 style="margin-bottom: 0.25in; text-align: center;" align="center"><span style="font-size: 20pt; font-family: "Verdana","sans-serif"; color: rgb(51, 102, 255);">Release Notes for STM32F105/7xx and STM32F2xx USB OTG Driver</span><span style="font-size: 20pt; font-family: "Verdana","sans-serif";"><o:p></o:p></span></h1>
|
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<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: "Arial","sans-serif"; color: black;">Copyright
|
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2011 STMicroelectronics</span><span style="color: black;"><u1:p></u1:p><o:p></o:p></span></p>
|
||||
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: "Arial","sans-serif"; color: black;"><img id="_x0000_i1026" src="../../_htmresc/logo.bmp" border="0" height="65" width="86"></span><span style="font-size: 10pt;"><o:p></o:p></span></p>
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|
||||
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><span style="font-size: 12pt; color: white;">Contents<o:p></o:p></span></h2>
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<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana","sans-serif";"><a href="#History">STM32F105/7xx and STM32F2xx USB OTG Driver update History</a><o:p></o:p></span></li>
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<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana","sans-serif";"><a href="#License">License</a><o:p></o:p></span></li>
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<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><a name="History"></a><span style="font-size: 12pt; color: white;">STM32F105/7xx and STM32F2xx USB OTG Driver update History</span></h2><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 171px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V2.0.0 / 22-July-2011 <o:p></o:p></span></h3><p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
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Changes<o:p></o:p></span></u></b></p>
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<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Second official version supporting <span style="font-weight: bold; font-style: italic;">STM32F105/7</span> and <span style="font-weight: bold; font-style: italic;">STM32F2xx</span> devices</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Rename the Library from "<span style="font-style: italic;">STM32_USB_HOST_Driver</span>" to "<span style="font-style: italic;">STM32_USB_OTG_Driver</span>"</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add support for <span style="font-weight: bold; font-style: italic;">STM32F2xx</span> devices</span><span style="font-size: 10pt; font-family: Verdana;"></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add support for Device and OTG modes</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Change HCD layer to support High speed core</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Change the Low level driver to support multi core support for Host mode</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add Stop mechanism for Host and Device modes</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Change VBUS enabling method, to use the external or the internal VBUS when using the ULPI</span></li></ul><span style="font-size: 10pt; font-family: Verdana;"><br></span><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 171px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.0.0 - 11/29/2010<o:p></o:p></span></h3>
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|
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<p class="MsoNormal"><span style="font-size: 10pt; font-family: Verdana; color: black;">The use of this STM32 software is governed by the terms and conditions of the License Agreement </span><span style="font-size: 10pt; font-family: Verdana; color: black;"><span style="font-weight: bold; font-style: italic;">"MCD-ST Liberty SW License Agreement 20Jul2011 v0.1.pdf"</span> </span><span style="font-size: 10pt; font-family: Verdana; color: black;">available in the root of this package.</span><span style="color: black;"><o:p> </o:p></span></p>
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|
||||
complete documentation on </span><span style="font-size: 10pt; font-family: "Verdana","sans-serif";">STM32(<span style="color: black;">CORTEX M3) 32-Bit
|
||||
Microcontrollers visit </span><u><span style="color: blue;"><a href="http://www.st.com/stm32" target="_blank">www.st.com/STM32</a></span></u></span><span style="color: black;"><o:p></o:p></span></p>
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|
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|
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|
||||
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|
||||
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|
||||
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||||
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table.MsoNormalTable
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|
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|
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</o:shapelayout></xml><![endif]--><meta content="MCD Application Team" name="author"></head>
|
||||
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|
||||
|
||||
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|
||||
|
||||
<p class="MsoNormal"><span style="font-family: "Arial","sans-serif";"><o:p> </o:p></span></p>
|
||||
|
||||
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|
||||
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||||
<table class="MsoNormalTable" style="width: 675pt;" border="0" cellpadding="0" cellspacing="0" width="900">
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|
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|
||||
<table class="MsoNormalTable" style="width: 675pt;" border="0" cellpadding="0" cellspacing="0" width="900">
|
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<tbody><tr style="">
|
||||
<td style="padding: 0in 5.4pt;" valign="top">
|
||||
<p class="MsoNormal"><span style="font-size: 8pt; font-family: "Arial","sans-serif"; color: blue;"><a href="../../Release_Notes.html">Back to Release page</a></span><span style="font-size: 10pt;"><o:p></o:p></span></p>
|
||||
</td>
|
||||
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|
||||
<tr style="">
|
||||
<td style="padding: 1.5pt;">
|
||||
<h1 style="margin-bottom: 0.25in; text-align: center;" align="center"><span style="font-size: 20pt; font-family: "Verdana","sans-serif"; color: rgb(51, 102, 255);">Release Notes for STM32F105/7xx, STM32F2xx and STM32F4xx USB OTG Driver</span><span style="font-size: 20pt; font-family: "Verdana","sans-serif";"><o:p></o:p></span></h1>
|
||||
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: "Arial","sans-serif"; color: black;">Copyright
|
||||
2012 STMicroelectronics</span><span style="color: black;"><u1:p></u1:p><o:p></o:p></span></p>
|
||||
<p class="MsoNormal" style="text-align: center;" align="center"><span style="font-size: 10pt; font-family: "Arial","sans-serif"; color: black;"><img id="_x0000_i1026" src="../../_htmresc/logo.bmp" border="0" height="65" width="86"></span><span style="font-size: 10pt;"><o:p></o:p></span></p>
|
||||
</td>
|
||||
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|
||||
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|
||||
<p class="MsoNormal"><span style="font-family: "Arial","sans-serif"; display: none;"><o:p> </o:p></span></p>
|
||||
<table class="MsoNormalTable" style="width: 675pt;" border="0" cellpadding="0" width="900">
|
||||
<tbody><tr style="">
|
||||
<td style="padding: 0in;" valign="top">
|
||||
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><span style="font-size: 12pt; color: white;">Contents<o:p></o:p></span></h2>
|
||||
<ol style="margin-top: 0in;" start="1" type="1">
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana","sans-serif";"><a href="#History">Update History</a><o:p></o:p></span></li>
|
||||
<li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: "Verdana","sans-serif";"><a href="#License">License</a><o:p></o:p></span></li>
|
||||
</ol>
|
||||
<h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><a name="History"></a><span style="font-size: 12pt; color: white;">Update History</span></h2><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 200px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V2.1.0 / 19-March-2012<o:p></o:p></span></h3>
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
Changes<o:p></o:p></span></u></b></p>
|
||||
|
||||
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Official support of </span><span style="font-size: 10pt; font-family: Verdana;"><span style="font-weight: bold; font-style: italic;">STM32F4xx</span> devices</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">All source files: license disclaimer text update and add link to the License file on ST Internet</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Unmask Session request interrupt to handle the connect event during the core start-up</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Remove any reference to the USB HS external I2C PHY</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Update optimization pragma for AR Compiler</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Handle Correctly the Low Speed device connection in HS mode</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add a wrapper to isolate the library from the low level driver: connection done through ISR structure<br></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Miscellaneous bug fix</span></li></ul><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 171px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V2.0.0 / 22-July-2011 <o:p></o:p></span></h3><p class="MsoNormal" style="margin: 4.5pt 0cm 4.5pt 18pt;"><b style=""><u><span style="font-size: 10pt; font-family: Verdana; color: black;">Main
|
||||
Changes<o:p></o:p></span></u></b></p>
|
||||
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Second official version supporting <span style="font-weight: bold; font-style: italic;">STM32F105/7</span> and <span style="font-weight: bold; font-style: italic;">STM32F2xx</span> devices</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Rename the Library from "<span style="font-style: italic;">STM32_USB_HOST_Driver</span>" to "<span style="font-style: italic;">STM32_USB_OTG_Driver</span>"</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add support for <span style="font-weight: bold; font-style: italic;">STM32F2xx</span> devices</span><span style="font-size: 10pt; font-family: Verdana;"></span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add support for Device and OTG modes</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Change HCD layer to support High speed core</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Change the Low level driver to support multi core support for Host mode</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Add Stop mechanism for Host and Device modes</span></li><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Change VBUS enabling method, to use the external or the internal VBUS when using the ULPI</span></li></ul><span style="font-size: 10pt; font-family: Verdana;"></span><h3 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial; margin-right: 500pt; width: 171px;"><span style="font-size: 10pt; font-family: Arial; color: white;">V1.0.0 - 11/29/2010<o:p></o:p></span></h3>
|
||||
<ul style="margin-top: 0cm;" type="square"><li class="MsoNormal" style="color: black; margin-top: 4.5pt; margin-bottom: 4.5pt;"><span style="font-size: 10pt; font-family: Verdana;">Created </span></li></ul><h2 style="background: rgb(51, 102, 255) none repeat scroll 0% 50%; -moz-background-clip: initial; -moz-background-origin: initial; -moz-background-inline-policy: initial;"><a name="License"></a><span style="font-size: 12pt; color: white;">License<o:p></o:p></span></h2>
|
||||
<p class="MsoNormal"><span style="font-size: 10pt; font-family: "Verdana","sans-serif"; color: black;">Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); You may not use this </span><span style="font-size: 10pt; font-family: "Verdana","sans-serif"; color: black;">package</span><span style="font-size: 10pt; font-family: "Verdana","sans-serif"; color: black;"> except in compliance with the License. You may obtain a copy of the License at:<br><br></span></p><div style="text-align: center;"><span style="font-size: 10pt; font-family: "Verdana","sans-serif"; color: black;"> <a target="_blank" href="http://www.st.com/software_license_agreement_liberty_v2">http://www.st.com/software_license_agreement_liberty_v2</a></span><br><span style="font-size: 10pt; font-family: "Verdana","sans-serif"; color: black;"></span></div><span style="font-size: 10pt; font-family: "Verdana","sans-serif"; color: black;"><br>Unless
|
||||
required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS, <br>WITHOUT
|
||||
WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See
|
||||
the License for the specific language governing permissions and
|
||||
limitations under the License.</span>
|
||||
<div class="MsoNormal" style="text-align: center;" align="center"><span style="color: black;">
|
||||
<hr align="center" size="2" width="100%">
|
||||
</span></div>
|
||||
<p class="MsoNormal" style="margin: 4.5pt 0in 4.5pt 0.25in; text-align: center;" align="center"><span style="font-size: 10pt; font-family: "Verdana","sans-serif"; color: black;">For
|
||||
complete documentation on </span><span style="font-size: 10pt; font-family: "Verdana","sans-serif";">STM32<span style="color: black;">
|
||||
Microcontrollers visit </span><u><span style="color: blue;"><a href="http://www.st.com/internet/mcu/family/141.jsp" target="_blank">www.st.com/STM32</a></span></u></span><span style="font-size: 10pt; font-family: "Verdana","sans-serif";"><u><span style="color: blue;"><a href="http://www.st.com/stm32" target="_blank"></a></span></u></span><span style="color: black;"><o:p></o:p></span></p>
|
||||
</td>
|
||||
</tr>
|
||||
</tbody></table>
|
||||
<p class="MsoNormal"><span style="font-size: 10pt;"><o:p></o:p></span></p>
|
||||
</td>
|
||||
</tr>
|
||||
</tbody></table>
|
||||
|
||||
</div>
|
||||
|
||||
<p class="MsoNormal"><o:p> </o:p></p>
|
||||
|
||||
</div>
|
||||
|
||||
</body></html>
|
||||
@ -2,20 +2,26 @@
|
||||
******************************************************************************
|
||||
* @file usb_bsp.h
|
||||
* @author MCD Application Team
|
||||
* @version V2.0.0
|
||||
* @date 22-July-2011
|
||||
* @version V2.1.0
|
||||
* @date 19-March-2012
|
||||
* @brief Specific api's relative to the used hardware platform
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
@ -25,6 +31,7 @@
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "usb_core.h"
|
||||
#include "usb_conf.h"
|
||||
|
||||
/** @addtogroup USB_OTG_DRIVER
|
||||
* @{
|
||||
|
||||
@ -2,20 +2,26 @@
|
||||
******************************************************************************
|
||||
* @file usb_core.h
|
||||
* @author MCD Application Team
|
||||
* @version V2.0.0
|
||||
* @date 22-July-2011
|
||||
* @version V2.1.0
|
||||
* @date 19-March-2012
|
||||
* @brief Header of the Core Layer
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
@ -63,7 +69,7 @@
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#define MAX_DATA_LENGTH 0xFF
|
||||
#define MAX_DATA_LENGTH 0x200
|
||||
|
||||
/** @defgroup USB_CORE_Exported_Types
|
||||
* @{
|
||||
@ -191,15 +197,15 @@ typedef struct _Device_TypeDef
|
||||
const uint8_t *(*GetInterfaceStrDescriptor)( uint8_t speed , uint16_t *length);
|
||||
} USBD_DEVICE, *pUSBD_DEVICE;
|
||||
|
||||
typedef struct USB_OTG_hPort
|
||||
{
|
||||
void (*Disconnect) (void *phost);
|
||||
void (*Connect) (void *phost);
|
||||
uint8_t ConnStatus;
|
||||
uint8_t DisconnStatus;
|
||||
uint8_t ConnHandled;
|
||||
uint8_t DisconnHandled;
|
||||
} USB_OTG_hPort_TypeDef;
|
||||
//typedef struct USB_OTG_hPort
|
||||
//{
|
||||
// void (*Disconnect) (void *phost);
|
||||
// void (*Connect) (void *phost);
|
||||
// uint8_t ConnStatus;
|
||||
// uint8_t DisconnStatus;
|
||||
// uint8_t ConnHandled;
|
||||
// uint8_t DisconnHandled;
|
||||
//} USB_OTG_hPort_TypeDef;
|
||||
|
||||
typedef struct _Device_cb
|
||||
{
|
||||
@ -248,7 +254,10 @@ typedef struct _DCD
|
||||
uint8_t device_config;
|
||||
uint8_t device_state;
|
||||
uint8_t device_status;
|
||||
uint8_t device_old_status;
|
||||
uint8_t device_address;
|
||||
uint8_t connection_status;
|
||||
uint8_t test_mode;
|
||||
uint32_t DevRemoteWakeup;
|
||||
USB_OTG_EP in_ep [USB_OTG_MAX_TX_FIFOS];
|
||||
USB_OTG_EP out_ep [USB_OTG_MAX_TX_FIFOS];
|
||||
@ -271,7 +280,7 @@ typedef struct _HCD
|
||||
__IO URB_STATE URB_State[USB_OTG_MAX_TX_FIFOS];
|
||||
USB_OTG_HC hc [USB_OTG_MAX_TX_FIFOS];
|
||||
uint16_t channel [USB_OTG_MAX_TX_FIFOS];
|
||||
USB_OTG_hPort_TypeDef *port_cb;
|
||||
// USB_OTG_hPort_TypeDef *port_cb;
|
||||
}
|
||||
HCD_DEV , *USB_OTG_USBH_PDEV;
|
||||
|
||||
|
||||
@ -2,20 +2,26 @@
|
||||
******************************************************************************
|
||||
* @file usb_dcd.h
|
||||
* @author MCD Application Team
|
||||
* @version V2.0.0
|
||||
* @date 22-July-2011
|
||||
* @version V2.1.0
|
||||
* @date 19-March-2012
|
||||
* @brief Peripheral Driver Header file
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
|
||||
@ -2,20 +2,26 @@
|
||||
******************************************************************************
|
||||
* @file usb_dcd_int.h
|
||||
* @author MCD Application Team
|
||||
* @version V2.0.0
|
||||
* @date 22-July-2011
|
||||
* @version V2.1.0
|
||||
* @date 19-March-2012
|
||||
* @brief Peripheral Device Interface Layer
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
|
||||
@ -2,20 +2,26 @@
|
||||
******************************************************************************
|
||||
* @file usb_defines.h
|
||||
* @author MCD Application Team
|
||||
* @version V2.0.0
|
||||
* @date 22-July-2011
|
||||
* @version V2.1.0
|
||||
* @date 19-March-2012
|
||||
* @brief Header of the Core Layer
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
@ -57,7 +63,6 @@
|
||||
|
||||
#define USB_OTG_ULPI_PHY 1
|
||||
#define USB_OTG_EMBEDDED_PHY 2
|
||||
#define USB_OTG_I2C_PHY 3
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
||||
@ -2,20 +2,26 @@
|
||||
******************************************************************************
|
||||
* @file usb_hcd.h
|
||||
* @author MCD Application Team
|
||||
* @version V2.0.0
|
||||
* @date 22-July-2011
|
||||
* @version V2.1.0
|
||||
* @date 19-March-2012
|
||||
* @brief Host layer Header file
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
|
||||
@ -2,20 +2,26 @@
|
||||
******************************************************************************
|
||||
* @file usb_hcd_int.h
|
||||
* @author MCD Application Team
|
||||
* @version V2.0.0
|
||||
* @date 22-July-2011
|
||||
* @version V2.1.0
|
||||
* @date 19-March-2012
|
||||
* @brief Peripheral Device Interface Layer
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
@ -23,7 +29,6 @@
|
||||
#ifndef __HCD_INT_H__
|
||||
#define __HCD_INT_H__
|
||||
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "usb_hcd.h"
|
||||
|
||||
@ -49,6 +54,16 @@
|
||||
/** @defgroup USB_HCD_INT_Exported_Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
typedef struct _USBH_HCD_INT
|
||||
{
|
||||
uint8_t (* SOF) (USB_OTG_CORE_HANDLE *pdev);
|
||||
uint8_t (* DevConnected) (USB_OTG_CORE_HANDLE *pdev);
|
||||
uint8_t (* DevDisconnected) (USB_OTG_CORE_HANDLE *pdev);
|
||||
|
||||
}USBH_HCD_INT_cb_TypeDef;
|
||||
|
||||
extern USBH_HCD_INT_cb_TypeDef *USBH_HCD_INT_fops;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
@ -66,25 +81,25 @@
|
||||
USB_OTG_WRITE_REG32(&((HC_REGS)->HCINT), hcint_clear.d32);\
|
||||
}\
|
||||
|
||||
#define MASK_HOST_INT_CHH(hc_num) { USB_OTG_HCGINTMSK_TypeDef GINTMSK; \
|
||||
GINTMSK.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[hc_num]->HCGINTMSK); \
|
||||
GINTMSK.b.chhltd = 0; \
|
||||
USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCGINTMSK, GINTMSK.d32);}
|
||||
#define MASK_HOST_INT_CHH(hc_num) { USB_OTG_HCINTMSK_TypeDef INTMSK; \
|
||||
INTMSK.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK); \
|
||||
INTMSK.b.chhltd = 0; \
|
||||
USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK, INTMSK.d32);}
|
||||
|
||||
#define UNMASK_HOST_INT_CHH(hc_num) { USB_OTG_HCGINTMSK_TypeDef GINTMSK; \
|
||||
GINTMSK.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[hc_num]->HCGINTMSK); \
|
||||
GINTMSK.b.chhltd = 1; \
|
||||
USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCGINTMSK, GINTMSK.d32);}
|
||||
#define UNMASK_HOST_INT_CHH(hc_num) { USB_OTG_HCINTMSK_TypeDef INTMSK; \
|
||||
INTMSK.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK); \
|
||||
INTMSK.b.chhltd = 1; \
|
||||
USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK, INTMSK.d32);}
|
||||
|
||||
#define MASK_HOST_INT_ACK(hc_num) { USB_OTG_HCGINTMSK_TypeDef GINTMSK; \
|
||||
GINTMSK.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[hc_num]->HCGINTMSK); \
|
||||
GINTMSK.b.ack = 0; \
|
||||
USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCGINTMSK, GINTMSK.d32);}
|
||||
#define MASK_HOST_INT_ACK(hc_num) { USB_OTG_HCINTMSK_TypeDef INTMSK; \
|
||||
INTMSK.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK); \
|
||||
INTMSK.b.ack = 0; \
|
||||
USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK, GINTMSK.d32);}
|
||||
|
||||
#define UNMASK_HOST_INT_ACK(hc_num) { USB_OTG_HCGINTMSK_TypeDef GINTMSK; \
|
||||
GINTMSK.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[hc_num]->HCGINTMSK); \
|
||||
GINTMSK.b.ack = 1; \
|
||||
USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCGINTMSK, GINTMSK.d32);}
|
||||
#define UNMASK_HOST_INT_ACK(hc_num) { USB_OTG_HCGINTMSK_TypeDef INTMSK; \
|
||||
INTMSK.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK); \
|
||||
INTMSK.b.ack = 1; \
|
||||
USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK, INTMSK.d32);}
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
||||
@ -2,20 +2,26 @@
|
||||
******************************************************************************
|
||||
* @file usb_otg.h
|
||||
* @author MCD Application Team
|
||||
* @version V2.0.0
|
||||
* @date 22-July-2011
|
||||
* @version V2.1.0
|
||||
* @date 19-March-2012
|
||||
* @brief OTG Core Header
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
@ -41,10 +47,9 @@
|
||||
|
||||
void USB_OTG_InitiateSRP(void);
|
||||
void USB_OTG_InitiateHNP(uint8_t state , uint8_t mode);
|
||||
void USB_OTG_Switchback (USB_OTG_CORE_HANDLE *pdev);
|
||||
uint32_t USB_OTG_GetCurrentState (USB_OTG_CORE_HANDLE *pdev);
|
||||
void USB_OTG_Switchback (USB_OTG_CORE_DEVICE *pdev);
|
||||
uint32_t USB_OTG_GetCurrentState (USB_OTG_CORE_DEVICE *pdev);
|
||||
|
||||
uint32_t STM32_USBO_OTG_ISR_Handler(USB_OTG_CORE_HANDLE *pdev);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
@ -2,20 +2,26 @@
|
||||
******************************************************************************
|
||||
* @file usb_regs.h
|
||||
* @author MCD Application Team
|
||||
* @version V2.0.0
|
||||
* @date 22-July-2011
|
||||
* @version V2.1.0
|
||||
* @date 19-March-2012
|
||||
* @brief hardware registers
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
@ -88,8 +94,7 @@ typedef struct _USB_OTG_GREGS //000h
|
||||
__IO uint32_t GRXFSIZ; /* Receive FIFO Size Register 024h*/
|
||||
__IO uint32_t DIEPTXF0_HNPTXFSIZ; /* EP0 / Non Periodic Tx FIFO Size Register 028h*/
|
||||
__IO uint32_t HNPTXSTS; /* Non Periodic Tx FIFO/Queue Sts reg 02Ch*/
|
||||
__IO uint32_t GI2CCTL; /* I2C Access Register 030h*/
|
||||
uint32_t Reserved34; /* PHY Vendor Control Register 034h*/
|
||||
uint32_t Reserved30[2]; /* Reserved 030h*/
|
||||
__IO uint32_t GCCFG; /* General Purpose IO Register 038h*/
|
||||
__IO uint32_t CID; /* User ID Register 03Ch*/
|
||||
uint32_t Reserved40[48]; /* Reserved 040h-0FFh*/
|
||||
@ -160,7 +165,7 @@ USB_OTG_INEPREGS;
|
||||
typedef struct _USB_OTG_OUTEPREGS
|
||||
{
|
||||
__IO uint32_t DOEPCTL; /* dev OUT Endpoint Control Reg B00h + (ep_num * 20h) + 00h*/
|
||||
__IO uint32_t DOUTEPFRM; /* dev OUT Endpoint Frame number B00h + (ep_num * 20h) + 04h*/
|
||||
uint32_t Reserved04; /* Reserved B00h + (ep_num * 20h) + 04h*/
|
||||
__IO uint32_t DOEPINT; /* dev OUT Endpoint Itr Reg B00h + (ep_num * 20h) + 08h*/
|
||||
uint32_t Reserved0C; /* Reserved B00h + (ep_num * 20h) + 0Ch*/
|
||||
__IO uint32_t DOEPTSIZ; /* dev OUT Endpoint Txfer Size B00h + (ep_num * 20h) + 10h*/
|
||||
@ -200,7 +205,7 @@ typedef struct _USB_OTG_HC_REGS
|
||||
__IO uint32_t HCCHAR;
|
||||
__IO uint32_t HCSPLT;
|
||||
__IO uint32_t HCINT;
|
||||
__IO uint32_t HCGINTMSK;
|
||||
__IO uint32_t HCINTMSK;
|
||||
__IO uint32_t HCTSIZ;
|
||||
__IO uint32_t HCDMA;
|
||||
uint32_t Reserved[2];
|
||||
@ -227,7 +232,7 @@ typedef struct USB_OTG_core_regs //000h
|
||||
__IO uint32_t *PCGCCTL;
|
||||
}
|
||||
USB_OTG_CORE_REGS , *PUSB_OTG_CORE_REGS;
|
||||
typedef union _USB_OTG_OTGCTL_TypeDef
|
||||
typedef union _USB_OTG_GOTGCTL_TypeDef
|
||||
{
|
||||
uint32_t d32;
|
||||
struct
|
||||
@ -250,19 +255,18 @@ uint32_t Reserved12_15 :
|
||||
4;
|
||||
uint32_t conidsts :
|
||||
1;
|
||||
uint32_t Reserved17 :
|
||||
uint32_t dbct :
|
||||
1;
|
||||
uint32_t asesvld :
|
||||
1;
|
||||
uint32_t bsesvld :
|
||||
1;
|
||||
uint32_t currmod :
|
||||
1;
|
||||
uint32_t Reserved21_31 :
|
||||
11;
|
||||
uint32_t Reserved20_31 :
|
||||
12;
|
||||
}
|
||||
b;
|
||||
} USB_OTG_OTGCTL_TypeDef ;
|
||||
} USB_OTG_GOTGCTL_TypeDef ;
|
||||
|
||||
typedef union _USB_OTG_GOTGINT_TypeDef
|
||||
{
|
||||
uint32_t d32;
|
||||
@ -320,15 +324,11 @@ typedef union _USB_OTG_GUSBCFG_TypeDef
|
||||
{
|
||||
uint32_t toutcal :
|
||||
3;
|
||||
uint32_t phyif :
|
||||
1;
|
||||
uint32_t ulpi_utmi_sel :
|
||||
1;
|
||||
uint32_t fsintf :
|
||||
1;
|
||||
uint32_t Reserved3_5 :
|
||||
3;
|
||||
uint32_t physel :
|
||||
1;
|
||||
uint32_t ddrsel :
|
||||
uint32_t Reserved7 :
|
||||
1;
|
||||
uint32_t srpcap :
|
||||
1;
|
||||
@ -336,11 +336,11 @@ uint32_t hnpcap :
|
||||
1;
|
||||
uint32_t usbtrdtim :
|
||||
4;
|
||||
uint32_t nptxfrwnden :
|
||||
uint32_t Reserved14 :
|
||||
1;
|
||||
uint32_t phylpwrclksel :
|
||||
1;
|
||||
uint32_t otgutmifssel :
|
||||
uint32_t Reserved16 :
|
||||
1;
|
||||
uint32_t ulpi_fsls :
|
||||
1;
|
||||
@ -350,12 +350,18 @@ uint32_t ulpi_clk_sus_m :
|
||||
1;
|
||||
uint32_t ulpi_ext_vbus_drv :
|
||||
1;
|
||||
uint32_t ulpi_int_vbus_indicator :
|
||||
uint32_t ulpi_int_vbus_ind :
|
||||
1;
|
||||
uint32_t term_sel_dl_pulse :
|
||||
1;
|
||||
uint32_t Reserved :
|
||||
6;
|
||||
uint32_t ulpi_ind_cpl :
|
||||
1;
|
||||
uint32_t ulpi_passthrough :
|
||||
1;
|
||||
uint32_t ulpi_protect_disable :
|
||||
1;
|
||||
uint32_t Reserved26_28 :
|
||||
3;
|
||||
uint32_t force_host :
|
||||
1;
|
||||
uint32_t force_dev :
|
||||
@ -376,7 +382,7 @@ uint32_t hsftrst :
|
||||
1;
|
||||
uint32_t hstfrm :
|
||||
1;
|
||||
uint32_t intknqflsh :
|
||||
uint32_t Reserved3 :
|
||||
1;
|
||||
uint32_t rxfflsh :
|
||||
1;
|
||||
@ -414,10 +420,8 @@ uint32_t ginnakeff :
|
||||
1;
|
||||
uint32_t goutnakeff :
|
||||
1;
|
||||
uint32_t Reserved8 :
|
||||
1;
|
||||
uint32_t i2cintr :
|
||||
1;
|
||||
uint32_t Reserved8_9 :
|
||||
2;
|
||||
uint32_t erlysuspend :
|
||||
1;
|
||||
uint32_t usbsuspend :
|
||||
@ -484,10 +488,8 @@ uint32_t ginnakeff :
|
||||
1;
|
||||
uint32_t goutnakeff :
|
||||
1;
|
||||
uint32_t Reserved8 :
|
||||
1;
|
||||
uint32_t i2cintr :
|
||||
1;
|
||||
uint32_t Reserved8_9 :
|
||||
2;
|
||||
uint32_t erlysuspend :
|
||||
1;
|
||||
uint32_t usbsuspend :
|
||||
@ -500,10 +502,8 @@ uint32_t isooutdrop :
|
||||
1;
|
||||
uint32_t eopframe :
|
||||
1;
|
||||
uint32_t intimerrx :
|
||||
1;
|
||||
uint32_t epmismatch :
|
||||
1;
|
||||
uint32_t Reserved16_17 :
|
||||
2;
|
||||
uint32_t inepint:
|
||||
1;
|
||||
uint32_t outepintr :
|
||||
@ -592,14 +592,15 @@ uint32_t nptxfspcavail :
|
||||
16;
|
||||
uint32_t nptxqspcavail :
|
||||
8;
|
||||
uint32_t nptxqtop_terminate :
|
||||
struct
|
||||
{
|
||||
uint32_t terminate :
|
||||
1;
|
||||
uint32_t nptxqtop_timer :
|
||||
2;
|
||||
uint32_t nptxqtop :
|
||||
uint32_t token :
|
||||
2;
|
||||
uint32_t chnum :
|
||||
2;
|
||||
4;
|
||||
} nptxqtop;
|
||||
uint32_t Reserved :
|
||||
1;
|
||||
}
|
||||
@ -617,36 +618,7 @@ uint32_t Reserved :
|
||||
}
|
||||
b;
|
||||
} USB_OTG_DTXFSTSn_TypeDef ;
|
||||
typedef union _USB_OTG_GI2CCTL_TypeDef
|
||||
{
|
||||
uint32_t d32;
|
||||
struct
|
||||
{
|
||||
uint32_t rwdata :
|
||||
8;
|
||||
uint32_t regaddr :
|
||||
8;
|
||||
uint32_t addr :
|
||||
7;
|
||||
uint32_t i2cen :
|
||||
1;
|
||||
uint32_t ack :
|
||||
1;
|
||||
uint32_t i2csuspctl :
|
||||
1;
|
||||
uint32_t i2cdevaddr :
|
||||
2;
|
||||
uint32_t dat_se0:
|
||||
1;
|
||||
uint32_t Reserved :
|
||||
1;
|
||||
uint32_t rw :
|
||||
1;
|
||||
uint32_t bsydne :
|
||||
1;
|
||||
}
|
||||
b;
|
||||
} USB_OTG_GI2CCTL_TypeDef ;
|
||||
|
||||
typedef union _USB_OTG_GCCFG_TypeDef
|
||||
{
|
||||
uint32_t d32;
|
||||
@ -656,7 +628,7 @@ uint32_t Reserved_in :
|
||||
16;
|
||||
uint32_t pwdn :
|
||||
1;
|
||||
uint32_t i2cifen :
|
||||
uint32_t Reserved_17 :
|
||||
1;
|
||||
uint32_t vbussensingA :
|
||||
1;
|
||||
@ -687,10 +659,8 @@ uint32_t devaddr :
|
||||
7;
|
||||
uint32_t perfrint :
|
||||
2;
|
||||
uint32_t Reserved13_17 :
|
||||
5;
|
||||
uint32_t epmscnt :
|
||||
4;
|
||||
uint32_t Reserved12_31 :
|
||||
19;
|
||||
}
|
||||
b;
|
||||
} USB_OTG_DCFG_TypeDef ;
|
||||
@ -717,8 +687,10 @@ uint32_t sgoutnak :
|
||||
1;
|
||||
uint32_t cgoutnak :
|
||||
1;
|
||||
uint32_t poprg_done :
|
||||
1;
|
||||
uint32_t Reserved :
|
||||
21;
|
||||
20;
|
||||
}
|
||||
b;
|
||||
} USB_OTG_DCTL_TypeDef ;
|
||||
@ -751,13 +723,13 @@ uint32_t xfercompl :
|
||||
1;
|
||||
uint32_t epdisabled :
|
||||
1;
|
||||
uint32_t ahberr :
|
||||
uint32_t Reserved2 :
|
||||
1;
|
||||
uint32_t timeout :
|
||||
1;
|
||||
uint32_t intktxfemp :
|
||||
1;
|
||||
uint32_t intknepmis :
|
||||
uint32_t Reserved5 :
|
||||
1;
|
||||
uint32_t inepnakeff :
|
||||
1;
|
||||
@ -765,7 +737,7 @@ uint32_t emptyintr :
|
||||
1;
|
||||
uint32_t txfifoundrn :
|
||||
1;
|
||||
uint32_t Reserved08_31 :
|
||||
uint32_t Reserved14_31 :
|
||||
23;
|
||||
}
|
||||
b;
|
||||
@ -780,7 +752,7 @@ uint32_t xfercompl :
|
||||
1;
|
||||
uint32_t epdisabled :
|
||||
1;
|
||||
uint32_t ahberr :
|
||||
uint32_t Reserved2 :
|
||||
1;
|
||||
uint32_t setup :
|
||||
1;
|
||||
@ -821,8 +793,12 @@ uint32_t rx_thr_en :
|
||||
1;
|
||||
uint32_t rx_thr_len :
|
||||
9;
|
||||
uint32_t Reserved26_31 :
|
||||
6;
|
||||
uint32_t Reserved26 :
|
||||
1;
|
||||
uint32_t arp_en :
|
||||
1;
|
||||
uint32_t Reserved28_31 :
|
||||
4;
|
||||
}
|
||||
b;
|
||||
} USB_OTG_DTHRCTL_TypeDef ;
|
||||
@ -945,16 +921,17 @@ uint32_t ptxfspcavail :
|
||||
16;
|
||||
uint32_t ptxqspcavail :
|
||||
8;
|
||||
uint32_t ptxqtop_terminate :
|
||||
struct
|
||||
{
|
||||
uint32_t terminate :
|
||||
1;
|
||||
uint32_t ptxqtop_timer :
|
||||
2;
|
||||
uint32_t ptxqtop :
|
||||
uint32_t token :
|
||||
2;
|
||||
uint32_t chnum :
|
||||
2;
|
||||
uint32_t ptxqtop_odd :
|
||||
4;
|
||||
uint32_t odd_even :
|
||||
1;
|
||||
} ptxqtop;
|
||||
}
|
||||
b;
|
||||
} USB_OTG_HPTXSTS_TypeDef ;
|
||||
@ -1118,7 +1095,7 @@ uint32_t dopng :
|
||||
}
|
||||
b;
|
||||
} USB_OTG_HCTSIZn_TypeDef ;
|
||||
typedef union _USB_OTG_HCGINTMSK_TypeDef
|
||||
typedef union _USB_OTG_HCINTMSK_TypeDef
|
||||
{
|
||||
uint32_t d32;
|
||||
struct
|
||||
@ -1149,7 +1126,8 @@ uint32_t Reserved :
|
||||
21;
|
||||
}
|
||||
b;
|
||||
} USB_OTG_HCGINTMSK_TypeDef ;
|
||||
} USB_OTG_HCINTMSK_TypeDef ;
|
||||
|
||||
typedef union _USB_OTG_PCGCCTL_TypeDef
|
||||
{
|
||||
uint32_t d32;
|
||||
@ -1159,8 +1137,12 @@ uint32_t stoppclk :
|
||||
1;
|
||||
uint32_t gatehclk :
|
||||
1;
|
||||
uint32_t Reserved :
|
||||
30;
|
||||
uint32_t Reserved2_3 :
|
||||
2;
|
||||
uint32_t phy_susp :
|
||||
1;
|
||||
uint32_t Reserved5_31 :
|
||||
27;
|
||||
}
|
||||
b;
|
||||
} USB_OTG_PCGCCTL_TypeDef ;
|
||||
|
||||
@ -2,21 +2,27 @@
|
||||
******************************************************************************
|
||||
* @file usb_bsp.c
|
||||
* @author MCD Application Team
|
||||
* @version V2.0.0
|
||||
* @date 22-July-2011
|
||||
* @version V2.1.0
|
||||
* @date 19-March-2012
|
||||
* @brief This file is responsible to offer board support package and is
|
||||
* configurable by user.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
@ -85,7 +91,7 @@
|
||||
* @retval None
|
||||
*/
|
||||
|
||||
void USB_OTG_BSP_Init(USB_OTG_CORE_HANDLE *pdev)
|
||||
void USB_OTG_BSP_Init(void)
|
||||
{
|
||||
|
||||
}
|
||||
@ -95,7 +101,7 @@ void USB_OTG_BSP_Init(USB_OTG_CORE_HANDLE *pdev)
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void USB_OTG_BSP_EnableInterrupt(USB_OTG_CORE_HANDLE *pdev)
|
||||
void USB_OTG_BSP_EnableInterrupt(void)
|
||||
{
|
||||
|
||||
}
|
||||
@ -108,7 +114,7 @@ void USB_OTG_BSP_EnableInterrupt(USB_OTG_CORE_HANDLE *pdev)
|
||||
* @retval None
|
||||
*/
|
||||
|
||||
void USB_OTG_BSP_DriveVBUS(USB_OTG_CORE_HANDLE *pdev, uint8_t state)
|
||||
void USB_OTG_BSP_DriveVBUS(uint32_t speed, uint8_t state)
|
||||
{
|
||||
|
||||
}
|
||||
@ -120,7 +126,7 @@ void USB_OTG_BSP_DriveVBUS(USB_OTG_CORE_HANDLE *pdev, uint8_t state)
|
||||
* @retval None
|
||||
*/
|
||||
|
||||
void USB_OTG_BSP_ConfigVBUS(USB_OTG_CORE_HANDLE *pdev)
|
||||
void USB_OTG_BSP_ConfigVBUS(uint32_t speed)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
@ -2,20 +2,26 @@
|
||||
******************************************************************************
|
||||
* @file usb_core.c
|
||||
* @author MCD Application Team
|
||||
* @version V2.0.0
|
||||
* @date 22-July-2011
|
||||
* @version V2.1.0
|
||||
* @date 19-March-2012
|
||||
* @brief USB-OTG Core Layer
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
@ -96,7 +102,7 @@ static void USB_OTG_EnableCommonInt(USB_OTG_CORE_HANDLE *pdev)
|
||||
USB_OTG_WRITE_REG32( &pdev->regs.GREGS->GOTGINT, 0xFFFFFFFF);
|
||||
#endif
|
||||
/* Clear any pending interrupts */
|
||||
USB_OTG_WRITE_REG32( &pdev->regs.GREGS->GINTSTS, 0xFFFFFFFF);
|
||||
USB_OTG_WRITE_REG32( &pdev->regs.GREGS->GINTSTS, 0xBFFFFFFF);
|
||||
/* Enable the interrupts in the INTMSK */
|
||||
int_mask.b.wkupintr = 1;
|
||||
int_mask.b.usbsuspend = 1;
|
||||
@ -255,10 +261,6 @@ USB_OTG_STS USB_OTG_SelectCore(USB_OTG_CORE_HANDLE *pdev,
|
||||
#else
|
||||
#ifdef USB_OTG_EMBEDDED_PHY_ENABLED
|
||||
pdev->cfg.phy_itface = USB_OTG_EMBEDDED_PHY;
|
||||
#else
|
||||
#ifdef USB_OTG_I2C_PHY_ENABLED
|
||||
pdev->cfg.phy_itface = USB_OTG_I2C_PHY;
|
||||
#endif
|
||||
#endif
|
||||
#endif
|
||||
|
||||
@ -323,7 +325,6 @@ USB_OTG_STS USB_OTG_CoreInit(USB_OTG_CORE_HANDLE *pdev)
|
||||
USB_OTG_STS status = USB_OTG_OK;
|
||||
USB_OTG_GUSBCFG_TypeDef usbcfg;
|
||||
USB_OTG_GCCFG_TypeDef gccfg;
|
||||
USB_OTG_GI2CCTL_TypeDef i2cctl;
|
||||
USB_OTG_GAHBCFG_TypeDef ahbcfg;
|
||||
|
||||
usbcfg.d32 = 0;
|
||||
@ -356,10 +357,6 @@ USB_OTG_STS USB_OTG_CoreInit(USB_OTG_CORE_HANDLE *pdev)
|
||||
#endif
|
||||
#endif
|
||||
usbcfg.b.term_sel_dl_pulse = 0; /* Data line pulsing using utmi_txvalid */
|
||||
usbcfg.b.ulpi_utmi_sel = 1; /* ULPI seleInterfacect */
|
||||
|
||||
usbcfg.b.phyif = 0; /* 8 bits */
|
||||
usbcfg.b.ddrsel = 0; /* single data rate */
|
||||
|
||||
usbcfg.b.ulpi_fsls = 0;
|
||||
usbcfg.b.ulpi_clk_sus_m = 0;
|
||||
@ -389,10 +386,6 @@ USB_OTG_STS USB_OTG_CoreInit(USB_OTG_CORE_HANDLE *pdev)
|
||||
gccfg.d32 = 0;
|
||||
gccfg.b.pwdn = 1;
|
||||
|
||||
if(pdev->cfg.phy_itface == USB_OTG_I2C_PHY)
|
||||
{
|
||||
gccfg.b.i2cifen = 1;
|
||||
}
|
||||
gccfg.b.vbussensingA = 1 ;
|
||||
gccfg.b.vbussensingB = 1 ;
|
||||
#ifndef VBUS_SENSING_ENABLED
|
||||
@ -406,32 +399,6 @@ USB_OTG_STS USB_OTG_CoreInit(USB_OTG_CORE_HANDLE *pdev)
|
||||
|
||||
USB_OTG_WRITE_REG32 (&pdev->regs.GREGS->GCCFG, gccfg.d32);
|
||||
USB_OTG_BSP_mDelay(20);
|
||||
/* Program GUSBCFG.OtgUtmifsSel to I2C*/
|
||||
usbcfg.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GUSBCFG);
|
||||
|
||||
if(pdev->cfg.phy_itface == USB_OTG_I2C_PHY)
|
||||
{
|
||||
usbcfg.b.otgutmifssel = 1;
|
||||
}
|
||||
|
||||
USB_OTG_WRITE_REG32 (&pdev->regs.GREGS->GUSBCFG, usbcfg.d32);
|
||||
|
||||
if(pdev->cfg.phy_itface == USB_OTG_I2C_PHY)
|
||||
{
|
||||
/*Program GI2CCTL.I2CEn*/
|
||||
i2cctl.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GI2CCTL);
|
||||
i2cctl.b.i2cdevaddr = 1;
|
||||
i2cctl.b.i2cen = 0;
|
||||
i2cctl.b.dat_se0 = 1;
|
||||
i2cctl.b.addr = 0x2D;
|
||||
USB_OTG_WRITE_REG32 (&pdev->regs.GREGS->GI2CCTL, i2cctl.d32);
|
||||
|
||||
USB_OTG_BSP_mDelay(200);
|
||||
|
||||
i2cctl.b.i2cen = 1;
|
||||
USB_OTG_WRITE_REG32 (&pdev->regs.GREGS->GI2CCTL, i2cctl.d32);
|
||||
USB_OTG_BSP_mDelay(200);
|
||||
}
|
||||
}
|
||||
/* case the HS core is working in FS mode */
|
||||
if(pdev->cfg.dma_enable == 1)
|
||||
@ -670,7 +637,15 @@ USB_OTG_STS USB_OTG_CoreInitHost(USB_OTG_CORE_HANDLE *pdev)
|
||||
USB_OTG_WRITE_REG32(pdev->regs.PCGCCTL, 0);
|
||||
|
||||
/* Initialize Host Configuration Register */
|
||||
if (pdev->cfg.phy_itface == USB_OTG_ULPI_PHY)
|
||||
{
|
||||
USB_OTG_InitFSLSPClkSel(pdev , HCFG_30_60_MHZ);
|
||||
}
|
||||
else
|
||||
{
|
||||
USB_OTG_InitFSLSPClkSel(pdev , HCFG_48_MHZ); /* in init phase */
|
||||
}
|
||||
USB_OTG_ResetPort(pdev);
|
||||
|
||||
hcfg.d32 = USB_OTG_READ_REG32(&pdev->regs.HREGS->HCFG);
|
||||
hcfg.b.fslssupp = 0;
|
||||
@ -722,7 +697,7 @@ USB_OTG_STS USB_OTG_CoreInitHost(USB_OTG_CORE_HANDLE *pdev)
|
||||
for (i = 0; i < pdev->cfg.host_channels; i++)
|
||||
{
|
||||
USB_OTG_WRITE_REG32( &pdev->regs.HC_REGS[i]->HCINT, 0xFFFFFFFF );
|
||||
USB_OTG_WRITE_REG32( &pdev->regs.HC_REGS[i]->HCGINTMSK, 0 );
|
||||
USB_OTG_WRITE_REG32( &pdev->regs.HC_REGS[i]->HCINTMSK, 0 );
|
||||
}
|
||||
#ifndef USE_OTG_MODE
|
||||
USB_OTG_DriveVbus(pdev, 1);
|
||||
@ -883,7 +858,7 @@ USB_OTG_STS USB_OTG_HC_Init(USB_OTG_CORE_HANDLE *pdev , uint8_t hc_num)
|
||||
{
|
||||
USB_OTG_STS status = USB_OTG_OK;
|
||||
uint32_t intr_enable = 0;
|
||||
USB_OTG_HCGINTMSK_TypeDef hcintmsk;
|
||||
USB_OTG_HCINTMSK_TypeDef hcintmsk;
|
||||
USB_OTG_GINTMSK_TypeDef gintmsk;
|
||||
USB_OTG_HCCHAR_TypeDef hcchar;
|
||||
USB_OTG_HCINTn_TypeDef hcint;
|
||||
@ -955,7 +930,7 @@ USB_OTG_STS USB_OTG_HC_Init(USB_OTG_CORE_HANDLE *pdev , uint8_t hc_num)
|
||||
}
|
||||
|
||||
|
||||
USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCGINTMSK, hcintmsk.d32);
|
||||
USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK, hcintmsk.d32);
|
||||
|
||||
|
||||
/* Enable the top level host channel interrupt. */
|
||||
@ -1405,7 +1380,7 @@ USB_OTG_STS USB_OTG_EnableDevInt(USB_OTG_CORE_HANDLE *pdev)
|
||||
/* Disable all interrupts. */
|
||||
USB_OTG_WRITE_REG32( &pdev->regs.GREGS->GINTMSK, 0);
|
||||
/* Clear any pending interrupts */
|
||||
USB_OTG_WRITE_REG32( &pdev->regs.GREGS->GINTSTS, 0xFFFFFFFF);
|
||||
USB_OTG_WRITE_REG32( &pdev->regs.GREGS->GINTSTS, 0xBFFFFFFF);
|
||||
/* Enable the common interrupts */
|
||||
USB_OTG_EnableCommonInt(pdev);
|
||||
|
||||
|
||||
@ -2,20 +2,26 @@
|
||||
******************************************************************************
|
||||
* @file usb_dcd.c
|
||||
* @author MCD Application Team
|
||||
* @version V2.0.0
|
||||
* @date 22-July-2011
|
||||
* @version V2.1.0
|
||||
* @date 19-March-2012
|
||||
* @brief Peripheral Device Interface Layer
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
|
||||
@ -2,20 +2,26 @@
|
||||
******************************************************************************
|
||||
* @file usb_dcd_int.c
|
||||
* @author MCD Application Team
|
||||
* @version V2.0.0
|
||||
* @date 22-July-2011
|
||||
* @version V2.1.0
|
||||
* @date 19-March-2012
|
||||
* @brief Peripheral Device interrupt subroutines
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
@ -140,11 +146,7 @@ uint32_t USBD_OTG_EP1OUT_ISR_Handler (USB_OTG_CORE_HANDLE *pdev)
|
||||
/* Clear the bit in DOEPINTn for this interrupt */
|
||||
CLEAR_OUT_EP_INTR(1, epdisabled);
|
||||
}
|
||||
/* AHB Error */
|
||||
if ( doepint.b.ahberr )
|
||||
{
|
||||
CLEAR_OUT_EP_INTR(1, ahberr);
|
||||
}
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
@ -173,10 +175,6 @@ uint32_t USBD_OTG_EP1IN_ISR_Handler (USB_OTG_CORE_HANDLE *pdev)
|
||||
/* TX COMPLETE */
|
||||
USBD_DCD_INT_fops->DataInStage(pdev , 1);
|
||||
}
|
||||
if ( diepint.b.ahberr )
|
||||
{
|
||||
CLEAR_IN_EP_INTR(1, ahberr);
|
||||
}
|
||||
if ( diepint.b.epdisabled )
|
||||
{
|
||||
CLEAR_IN_EP_INTR(1, epdisabled);
|
||||
@ -189,10 +187,6 @@ uint32_t USBD_OTG_EP1IN_ISR_Handler (USB_OTG_CORE_HANDLE *pdev)
|
||||
{
|
||||
CLEAR_IN_EP_INTR(1, intktxfemp);
|
||||
}
|
||||
if (diepint.b.intknepmis)
|
||||
{
|
||||
CLEAR_IN_EP_INTR(1, intknepmis);
|
||||
}
|
||||
if (diepint.b.inepnakeff)
|
||||
{
|
||||
CLEAR_IN_EP_INTR(1, inepnakeff);
|
||||
@ -390,7 +384,9 @@ static uint32_t DCD_HandleUSBSuspend_ISR(USB_OTG_CORE_HANDLE *pdev)
|
||||
USB_OTG_GINTSTS_TypeDef gintsts;
|
||||
USB_OTG_PCGCCTL_TypeDef power;
|
||||
USB_OTG_DSTS_TypeDef dsts;
|
||||
__IO uint8_t prev_status = 0;
|
||||
|
||||
prev_status = pdev->dev.device_status;
|
||||
USBD_DCD_INT_fops->Suspend (pdev);
|
||||
|
||||
dsts.d32 = USB_OTG_READ_REG32(&pdev->regs.DREGS->DSTS);
|
||||
@ -400,7 +396,9 @@ static uint32_t DCD_HandleUSBSuspend_ISR(USB_OTG_CORE_HANDLE *pdev)
|
||||
gintsts.b.usbsuspend = 1;
|
||||
USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GINTSTS, gintsts.d32);
|
||||
|
||||
if((pdev->cfg.low_power) && (dsts.b.suspsts == 1))
|
||||
if((pdev->cfg.low_power) && (dsts.b.suspsts == 1) &&
|
||||
(pdev->dev.connection_status == 1) &&
|
||||
(prev_status == USB_OTG_CONFIGURED))
|
||||
{
|
||||
/* switch-off the clocks */
|
||||
power.d32 = 0;
|
||||
@ -454,10 +452,6 @@ static uint32_t DCD_HandleInEP_ISR(USB_OTG_CORE_HANDLE *pdev)
|
||||
}
|
||||
}
|
||||
}
|
||||
if ( diepint.b.ahberr )
|
||||
{
|
||||
CLEAR_IN_EP_INTR(epnum, ahberr);
|
||||
}
|
||||
if ( diepint.b.timeout )
|
||||
{
|
||||
CLEAR_IN_EP_INTR(epnum, timeout);
|
||||
@ -466,10 +460,6 @@ static uint32_t DCD_HandleInEP_ISR(USB_OTG_CORE_HANDLE *pdev)
|
||||
{
|
||||
CLEAR_IN_EP_INTR(epnum, intktxfemp);
|
||||
}
|
||||
if (diepint.b.intknepmis)
|
||||
{
|
||||
CLEAR_IN_EP_INTR(epnum, intknepmis);
|
||||
}
|
||||
if (diepint.b.inepnakeff)
|
||||
{
|
||||
CLEAR_IN_EP_INTR(epnum, inepnakeff);
|
||||
@ -550,11 +540,6 @@ static uint32_t DCD_HandleOutEP_ISR(USB_OTG_CORE_HANDLE *pdev)
|
||||
CLEAR_OUT_EP_INTR(epnum, epdisabled);
|
||||
}
|
||||
/* AHB Error */
|
||||
if ( doepint.b.ahberr )
|
||||
{
|
||||
CLEAR_OUT_EP_INTR(epnum, ahberr);
|
||||
}
|
||||
/* Setup Phase Done (control EPs) */
|
||||
if ( doepint.b.setup )
|
||||
{
|
||||
|
||||
@ -670,6 +655,8 @@ static uint32_t DCD_WriteEmptyTxFifo(USB_OTG_CORE_HANDLE *pdev, uint32_t epnum)
|
||||
len32b = (len + 3) / 4;
|
||||
txstatus.d32 = USB_OTG_READ_REG32( &pdev->regs.INEP_REGS[epnum]->DTXFSTS);
|
||||
|
||||
|
||||
|
||||
while (txstatus.b.txfspcavail > len32b &&
|
||||
ep->xfer_count < ep->xfer_len &&
|
||||
ep->xfer_len != 0)
|
||||
@ -691,13 +678,6 @@ static uint32_t DCD_WriteEmptyTxFifo(USB_OTG_CORE_HANDLE *pdev, uint32_t epnum)
|
||||
txstatus.d32 = USB_OTG_READ_REG32(&pdev->regs.INEP_REGS[epnum]->DTXFSTS);
|
||||
}
|
||||
|
||||
if (ep->xfer_count == ep->xfer_len || ep->xfer_len == 0) {
|
||||
/* Turn off the Fifo Empty Interrupt */
|
||||
uint32_t fifoemptymsk;
|
||||
|
||||
fifoemptymsk = 0x1 << epnum;
|
||||
USB_OTG_MODIFY_REG32(&pdev->regs.DREGS->DIEPEMPMSK, fifoemptymsk, 0);
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
|
||||
@ -744,7 +724,6 @@ static uint32_t DCD_HandleUsbReset_ISR(USB_OTG_CORE_HANDLE *pdev)
|
||||
|
||||
doepmsk.b.setup = 1;
|
||||
doepmsk.b.xfercompl = 1;
|
||||
doepmsk.b.ahberr = 1;
|
||||
doepmsk.b.epdisabled = 1;
|
||||
USB_OTG_WRITE_REG32( &pdev->regs.DREGS->DOEPMSK, doepmsk.d32 );
|
||||
#ifdef USB_OTG_HS_DEDICATED_EP1_ENABLED
|
||||
@ -753,8 +732,7 @@ static uint32_t DCD_HandleUsbReset_ISR(USB_OTG_CORE_HANDLE *pdev)
|
||||
diepmsk.b.xfercompl = 1;
|
||||
diepmsk.b.timeout = 1;
|
||||
diepmsk.b.epdisabled = 1;
|
||||
diepmsk.b.ahberr = 1;
|
||||
diepmsk.b.intknepmis = 1;
|
||||
|
||||
USB_OTG_WRITE_REG32( &pdev->regs.DREGS->DIEPMSK, diepmsk.d32 );
|
||||
#ifdef USB_OTG_HS_DEDICATED_EP1_ENABLED
|
||||
USB_OTG_WRITE_REG32( &pdev->regs.DREGS->DINEP1MSK, diepmsk.d32 );
|
||||
|
||||
@ -2,20 +2,26 @@
|
||||
******************************************************************************
|
||||
* @file usb_hcd.c
|
||||
* @author MCD Application Team
|
||||
* @version V2.0.0
|
||||
* @date 22-July-2011
|
||||
* @version V2.1.0
|
||||
* @date 19-March-2012
|
||||
* @brief Host Interface Layer
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
|
||||
@ -2,20 +2,26 @@
|
||||
******************************************************************************
|
||||
* @file usb_hcd_int.c
|
||||
* @author MCD Application Team
|
||||
* @version V2.0.0
|
||||
* @date 22-July-2011
|
||||
* @version V2.1.0
|
||||
* @date 19-March-2012
|
||||
* @brief Host driver interrupt subroutines
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
@ -26,8 +32,6 @@
|
||||
|
||||
#if defined (__CC_ARM) /*!< ARM Compiler */
|
||||
#pragma O0
|
||||
#elif defined ( __ICCARM__ ) /*!< IAR Compiler */
|
||||
#pragma O0
|
||||
#elif defined (__GNUC__) /*!< GNU Compiler */
|
||||
#pragma GCC optimize ("O0")
|
||||
#elif defined (__TASKING__) /*!< TASKING Compiler */
|
||||
@ -220,9 +224,10 @@ static uint32_t USB_OTG_USBH_handle_hc_ISR (USB_OTG_CORE_HANDLE *pdev)
|
||||
static uint32_t USB_OTG_USBH_handle_sof_ISR (USB_OTG_CORE_HANDLE *pdev)
|
||||
{
|
||||
USB_OTG_GINTSTS_TypeDef gintsts;
|
||||
|
||||
|
||||
gintsts.d32 = 0;
|
||||
|
||||
USBH_HCD_INT_fops->SOF(pdev);
|
||||
|
||||
/* Clear interrupt */
|
||||
gintsts.b.sofintr = 1;
|
||||
USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GINTSTS, gintsts.d32);
|
||||
@ -240,10 +245,9 @@ static uint32_t USB_OTG_USBH_handle_Disconnect_ISR (USB_OTG_CORE_HANDLE *pdev)
|
||||
{
|
||||
USB_OTG_GINTSTS_TypeDef gintsts;
|
||||
|
||||
pdev->host.ConnSts = 0;
|
||||
gintsts.d32 = 0;
|
||||
|
||||
pdev->host.port_cb->Disconnect(pdev);
|
||||
USBH_HCD_INT_fops->DevDisconnected(pdev);
|
||||
|
||||
/* Clear interrupt */
|
||||
gintsts.b.disconnect = 1;
|
||||
@ -251,7 +255,9 @@ static uint32_t USB_OTG_USBH_handle_Disconnect_ISR (USB_OTG_CORE_HANDLE *pdev)
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
#if defined ( __ICCARM__ ) /*!< IAR Compiler */
|
||||
#pragma optimize = none
|
||||
#endif /* __CC_ARM */
|
||||
/**
|
||||
* @brief USB_OTG_USBH_handle_nptxfempty_ISR
|
||||
* Handles non periodic tx fifo empty.
|
||||
@ -266,38 +272,40 @@ static uint32_t USB_OTG_USBH_handle_nptxfempty_ISR (USB_OTG_CORE_HANDLE *pdev)
|
||||
|
||||
hnptxsts.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->HNPTXSTS);
|
||||
|
||||
len_words = (pdev->host.hc[hnptxsts.b.chnum].xfer_len + 3) / 4;
|
||||
len_words = (pdev->host.hc[hnptxsts.b.nptxqtop.chnum].xfer_len + 3) / 4;
|
||||
|
||||
while ((hnptxsts.b.nptxfspcavail > len_words)&&
|
||||
(pdev->host.hc[hnptxsts.b.chnum].xfer_len != 0))
|
||||
(pdev->host.hc[hnptxsts.b.nptxqtop.chnum].xfer_len != 0))
|
||||
{
|
||||
|
||||
len = hnptxsts.b.nptxfspcavail * 4;
|
||||
|
||||
if (len > pdev->host.hc[hnptxsts.b.chnum].xfer_len)
|
||||
if (len > pdev->host.hc[hnptxsts.b.nptxqtop.chnum].xfer_len)
|
||||
{
|
||||
/* Last packet */
|
||||
len = pdev->host.hc[hnptxsts.b.chnum].xfer_len;
|
||||
len = pdev->host.hc[hnptxsts.b.nptxqtop.chnum].xfer_len;
|
||||
|
||||
intmsk.d32 = 0;
|
||||
intmsk.b.nptxfempty = 1;
|
||||
USB_OTG_MODIFY_REG32( &pdev->regs.GREGS->GINTMSK, intmsk.d32, 0);
|
||||
}
|
||||
|
||||
len_words = (pdev->host.hc[hnptxsts.b.chnum].xfer_len + 3) / 4;
|
||||
len_words = (pdev->host.hc[hnptxsts.b.nptxqtop.chnum].xfer_len + 3) / 4;
|
||||
|
||||
USB_OTG_WritePacket (pdev , pdev->host.hc[hnptxsts.b.chnum].xfer_buff, hnptxsts.b.chnum, len);
|
||||
USB_OTG_WritePacket (pdev , pdev->host.hc[hnptxsts.b.nptxqtop.chnum].xfer_buff, hnptxsts.b.nptxqtop.chnum, len);
|
||||
|
||||
pdev->host.hc[hnptxsts.b.chnum].xfer_buff += len;
|
||||
pdev->host.hc[hnptxsts.b.chnum].xfer_len -= len;
|
||||
pdev->host.hc[hnptxsts.b.chnum].xfer_count += len;
|
||||
pdev->host.hc[hnptxsts.b.nptxqtop.chnum].xfer_buff += len;
|
||||
pdev->host.hc[hnptxsts.b.nptxqtop.chnum].xfer_len -= len;
|
||||
pdev->host.hc[hnptxsts.b.nptxqtop.chnum].xfer_count += len;
|
||||
|
||||
hnptxsts.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->HNPTXSTS);
|
||||
}
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
#if defined ( __ICCARM__ ) /*!< IAR Compiler */
|
||||
#pragma optimize = none
|
||||
#endif /* __CC_ARM */
|
||||
/**
|
||||
* @brief USB_OTG_USBH_handle_ptxfempty_ISR
|
||||
* Handles periodic tx fifo empty
|
||||
@ -312,30 +320,30 @@ static uint32_t USB_OTG_USBH_handle_ptxfempty_ISR (USB_OTG_CORE_HANDLE *pdev)
|
||||
|
||||
hptxsts.d32 = USB_OTG_READ_REG32(&pdev->regs.HREGS->HPTXSTS);
|
||||
|
||||
len_words = (pdev->host.hc[hptxsts.b.chnum].xfer_len + 3) / 4;
|
||||
len_words = (pdev->host.hc[hptxsts.b.ptxqtop.chnum].xfer_len + 3) / 4;
|
||||
|
||||
while ((hptxsts.b.ptxfspcavail > len_words)&&
|
||||
(pdev->host.hc[hptxsts.b.chnum].xfer_len != 0))
|
||||
(pdev->host.hc[hptxsts.b.ptxqtop.chnum].xfer_len != 0))
|
||||
{
|
||||
|
||||
len = hptxsts.b.ptxfspcavail * 4;
|
||||
|
||||
if (len > pdev->host.hc[hptxsts.b.chnum].xfer_len)
|
||||
if (len > pdev->host.hc[hptxsts.b.ptxqtop.chnum].xfer_len)
|
||||
{
|
||||
len = pdev->host.hc[hptxsts.b.chnum].xfer_len;
|
||||
len = pdev->host.hc[hptxsts.b.ptxqtop.chnum].xfer_len;
|
||||
/* Last packet */
|
||||
intmsk.d32 = 0;
|
||||
intmsk.b.ptxfempty = 1;
|
||||
USB_OTG_MODIFY_REG32( &pdev->regs.GREGS->GINTMSK, intmsk.d32, 0);
|
||||
}
|
||||
|
||||
len_words = (pdev->host.hc[hptxsts.b.chnum].xfer_len + 3) / 4;
|
||||
len_words = (pdev->host.hc[hptxsts.b.ptxqtop.chnum].xfer_len + 3) / 4;
|
||||
|
||||
USB_OTG_WritePacket (pdev , pdev->host.hc[hptxsts.b.chnum].xfer_buff, hptxsts.b.chnum, len);
|
||||
USB_OTG_WritePacket (pdev , pdev->host.hc[hptxsts.b.ptxqtop.chnum].xfer_buff, hptxsts.b.ptxqtop.chnum, len);
|
||||
|
||||
pdev->host.hc[hptxsts.b.chnum].xfer_buff += len;
|
||||
pdev->host.hc[hptxsts.b.chnum].xfer_len -= len;
|
||||
pdev->host.hc[hptxsts.b.chnum].xfer_count += len;
|
||||
pdev->host.hc[hptxsts.b.ptxqtop.chnum].xfer_buff += len;
|
||||
pdev->host.hc[hptxsts.b.ptxqtop.chnum].xfer_len -= len;
|
||||
pdev->host.hc[hptxsts.b.ptxqtop.chnum].xfer_count += len;
|
||||
|
||||
hptxsts.d32 = USB_OTG_READ_REG32(&pdev->regs.HREGS->HPTXSTS);
|
||||
}
|
||||
@ -349,6 +357,9 @@ static uint32_t USB_OTG_USBH_handle_ptxfempty_ISR (USB_OTG_CORE_HANDLE *pdev)
|
||||
* @param pdev: Selected device
|
||||
* @retval status
|
||||
*/
|
||||
#if defined ( __ICCARM__ ) /*!< IAR Compiler */
|
||||
#pragma optimize = none
|
||||
#endif /* __CC_ARM */
|
||||
static uint32_t USB_OTG_USBH_handle_port_ISR (USB_OTG_CORE_HANDLE *pdev)
|
||||
{
|
||||
USB_OTG_HPRT0_TypeDef hprt0;
|
||||
@ -374,9 +385,9 @@ static uint32_t USB_OTG_USBH_handle_port_ISR (USB_OTG_CORE_HANDLE *pdev)
|
||||
/* Port Connect Detected */
|
||||
if (hprt0.b.prtconndet)
|
||||
{
|
||||
pdev->host.port_cb->Connect(pdev);
|
||||
|
||||
hprt0_dup.b.prtconndet = 1;
|
||||
do_reset = 1;
|
||||
USBH_HCD_INT_fops->DevConnected(pdev);
|
||||
retval |= 1;
|
||||
}
|
||||
|
||||
@ -384,9 +395,11 @@ static uint32_t USB_OTG_USBH_handle_port_ISR (USB_OTG_CORE_HANDLE *pdev)
|
||||
if (hprt0.b.prtenchng)
|
||||
{
|
||||
hprt0_dup.b.prtenchng = 1;
|
||||
|
||||
if (hprt0.b.prtena == 1)
|
||||
{
|
||||
pdev->host.ConnSts = 1;
|
||||
|
||||
USBH_HCD_INT_fops->DevConnected(pdev);
|
||||
|
||||
if ((hprt0.b.prtspd == HPRT0_PRTSPD_LOW_SPEED) ||
|
||||
(hprt0.b.prtspd == HPRT0_PRTSPD_FULL_SPEED))
|
||||
@ -399,7 +412,7 @@ static uint32_t USB_OTG_USBH_handle_port_ISR (USB_OTG_CORE_HANDLE *pdev)
|
||||
USB_OTG_WRITE_REG32(&pdev->regs.HREGS->HFIR, 6000 );
|
||||
if (hcfg.b.fslspclksel != HCFG_6_MHZ)
|
||||
{
|
||||
if(pdev->cfg.coreID == USB_OTG_FS_CORE_ID)
|
||||
if(pdev->cfg.phy_itface == USB_OTG_EMBEDDED_PHY)
|
||||
{
|
||||
USB_OTG_InitFSLSPClkSel(pdev ,HCFG_6_MHZ );
|
||||
}
|
||||
@ -432,14 +445,15 @@ static uint32_t USB_OTG_USBH_handle_port_ISR (USB_OTG_CORE_HANDLE *pdev)
|
||||
if (do_reset)
|
||||
{
|
||||
USB_OTG_ResetPort(pdev);
|
||||
|
||||
}
|
||||
/* Clear Port Interrupts */
|
||||
USB_OTG_WRITE_REG32(pdev->regs.HPRT0, hprt0_dup.d32);
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
||||
#if defined ( __ICCARM__ ) /*!< IAR Compiler */
|
||||
#pragma optimize = none
|
||||
#endif /* __CC_ARM */
|
||||
/**
|
||||
* @brief USB_OTG_USBH_handle_hc_n_Out_ISR
|
||||
* Handles interrupt for a specific Host Channel
|
||||
@ -451,13 +465,13 @@ uint32_t USB_OTG_USBH_handle_hc_n_Out_ISR (USB_OTG_CORE_HANDLE *pdev , uint32_t
|
||||
{
|
||||
|
||||
USB_OTG_HCINTn_TypeDef hcint;
|
||||
USB_OTG_HCGINTMSK_TypeDef hcintmsk;
|
||||
USB_OTG_HCINTMSK_TypeDef hcintmsk;
|
||||
USB_OTG_HC_REGS *hcreg;
|
||||
USB_OTG_HCCHAR_TypeDef hcchar;
|
||||
|
||||
hcreg = pdev->regs.HC_REGS[num];
|
||||
hcint.d32 = USB_OTG_READ_REG32(&hcreg->HCINT);
|
||||
hcintmsk.d32 = USB_OTG_READ_REG32(&hcreg->HCGINTMSK);
|
||||
hcintmsk.d32 = USB_OTG_READ_REG32(&hcreg->HCINTMSK);
|
||||
hcint.d32 = hcint.d32 & hcintmsk.d32;
|
||||
|
||||
hcchar.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[num]->HCCHAR);
|
||||
@ -471,7 +485,12 @@ uint32_t USB_OTG_USBH_handle_hc_n_Out_ISR (USB_OTG_CORE_HANDLE *pdev , uint32_t
|
||||
{
|
||||
CLEAR_HC_INT(hcreg , ack);
|
||||
}
|
||||
|
||||
else if (hcint.b.frmovrun)
|
||||
{
|
||||
UNMASK_HOST_INT_CHH (num);
|
||||
USB_OTG_HC_Halt(pdev, num);
|
||||
CLEAR_HC_INT(hcreg ,frmovrun);
|
||||
}
|
||||
else if (hcint.b.xfercompl)
|
||||
{
|
||||
pdev->host.ErrCnt[num] = 0;
|
||||
@ -567,7 +586,9 @@ uint32_t USB_OTG_USBH_handle_hc_n_Out_ISR (USB_OTG_CORE_HANDLE *pdev , uint32_t
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
#if defined ( __ICCARM__ ) /*!< IAR Compiler */
|
||||
#pragma optimize = none
|
||||
#endif /* __CC_ARM */
|
||||
/**
|
||||
* @brief USB_OTG_USBH_handle_hc_n_In_ISR
|
||||
* Handles interrupt for a specific Host Channel
|
||||
@ -578,7 +599,7 @@ uint32_t USB_OTG_USBH_handle_hc_n_Out_ISR (USB_OTG_CORE_HANDLE *pdev , uint32_t
|
||||
uint32_t USB_OTG_USBH_handle_hc_n_In_ISR (USB_OTG_CORE_HANDLE *pdev , uint32_t num)
|
||||
{
|
||||
USB_OTG_HCINTn_TypeDef hcint;
|
||||
USB_OTG_HCGINTMSK_TypeDef hcintmsk;
|
||||
USB_OTG_HCINTMSK_TypeDef hcintmsk;
|
||||
USB_OTG_HCCHAR_TypeDef hcchar;
|
||||
USB_OTG_HCTSIZn_TypeDef hctsiz;
|
||||
USB_OTG_HC_REGS *hcreg;
|
||||
@ -586,7 +607,7 @@ uint32_t USB_OTG_USBH_handle_hc_n_In_ISR (USB_OTG_CORE_HANDLE *pdev , uint32_t n
|
||||
|
||||
hcreg = pdev->regs.HC_REGS[num];
|
||||
hcint.d32 = USB_OTG_READ_REG32(&hcreg->HCINT);
|
||||
hcintmsk.d32 = USB_OTG_READ_REG32(&hcreg->HCGINTMSK);
|
||||
hcintmsk.d32 = USB_OTG_READ_REG32(&hcreg->HCINTMSK);
|
||||
hcint.d32 = hcint.d32 & hcintmsk.d32;
|
||||
hcchar.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[num]->HCCHAR);
|
||||
hcintmsk.d32 = 0;
|
||||
@ -704,7 +725,6 @@ uint32_t USB_OTG_USBH_handle_hc_n_In_ISR (USB_OTG_CORE_HANDLE *pdev , uint32_t n
|
||||
{
|
||||
UNMASK_HOST_INT_CHH (num);
|
||||
USB_OTG_HC_Halt(pdev, num);
|
||||
CLEAR_HC_INT(hcreg , nak);
|
||||
}
|
||||
else if ((hcchar.b.eptype == EP_TYPE_CTRL)||
|
||||
(hcchar.b.eptype == EP_TYPE_BULK))
|
||||
@ -715,6 +735,7 @@ uint32_t USB_OTG_USBH_handle_hc_n_In_ISR (USB_OTG_CORE_HANDLE *pdev , uint32_t n
|
||||
USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[num]->HCCHAR, hcchar.d32);
|
||||
}
|
||||
pdev->host.HC_Status[num] = HC_NAK;
|
||||
CLEAR_HC_INT(hcreg , nak);
|
||||
}
|
||||
|
||||
|
||||
@ -728,7 +749,9 @@ uint32_t USB_OTG_USBH_handle_hc_n_In_ISR (USB_OTG_CORE_HANDLE *pdev , uint32_t n
|
||||
* @param pdev: Selected device
|
||||
* @retval status
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ ) /*!< IAR Compiler */
|
||||
#pragma optimize = none
|
||||
#endif /* __CC_ARM */
|
||||
static uint32_t USB_OTG_USBH_handle_rx_qlvl_ISR (USB_OTG_CORE_HANDLE *pdev)
|
||||
{
|
||||
USB_OTG_GRXFSTS_TypeDef grxsts;
|
||||
@ -794,6 +817,9 @@ static uint32_t USB_OTG_USBH_handle_rx_qlvl_ISR (USB_OTG_CORE_HANDLE *pdev)
|
||||
* @param pdev: Selected device
|
||||
* @retval status
|
||||
*/
|
||||
#if defined ( __ICCARM__ ) /*!< IAR Compiler */
|
||||
#pragma optimize = none
|
||||
#endif /* __CC_ARM */
|
||||
static uint32_t USB_OTG_USBH_handle_IncompletePeriodicXfer_ISR (USB_OTG_CORE_HANDLE *pdev)
|
||||
{
|
||||
|
||||
|
||||
@ -2,20 +2,26 @@
|
||||
******************************************************************************
|
||||
* @file usb_otg.c
|
||||
* @author MCD Application Team
|
||||
* @version V2.0.0
|
||||
* @date 22-July-2011
|
||||
* @version V2.1.0
|
||||
* @date 19-March-2012
|
||||
* @brief OTG Core Layer
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
@ -72,6 +78,10 @@
|
||||
* @{
|
||||
*/
|
||||
|
||||
uint32_t USB_OTG_HandleOTG_ISR(USB_OTG_CORE_HANDLE *pdev);
|
||||
|
||||
static uint32_t USB_OTG_HandleConnectorIDStatusChange_ISR(USB_OTG_CORE_HANDLE *pdev);
|
||||
static uint32_t USB_OTG_HandleSessionRequest_ISR(USB_OTG_CORE_HANDLE *pdev);
|
||||
static uint32_t USB_OTG_Read_itr(USB_OTG_CORE_HANDLE *pdev);
|
||||
|
||||
/**
|
||||
@ -106,15 +116,15 @@ uint32_t STM32_USBO_OTG_ISR_Handler(USB_OTG_CORE_HANDLE *pdev)
|
||||
}
|
||||
if (gintsts.b.otgintr)
|
||||
{
|
||||
retval |= 1;//USB_OTG_HandleOTG_ISR(pdev);
|
||||
retval |= USB_OTG_HandleOTG_ISR(pdev);
|
||||
}
|
||||
if (gintsts.b.conidstschng)
|
||||
{
|
||||
retval |= 2;//USB_OTG_HandleConnectorIDStatusChange_ISR(pdev);
|
||||
retval |= USB_OTG_HandleConnectorIDStatusChange_ISR(pdev);
|
||||
}
|
||||
if (gintsts.b.sessreqintr)
|
||||
{
|
||||
retval |= 3;//USB_OTG_HandleSessionRequest_ISR(pdev);
|
||||
retval |= USB_OTG_HandleSessionRequest_ISR(pdev);
|
||||
}
|
||||
return retval;
|
||||
}
|
||||
@ -148,6 +158,239 @@ static uint32_t USB_OTG_Read_itr(USB_OTG_CORE_HANDLE *pdev)
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief USB_OTG_HandleOTG_ISR
|
||||
* handles the OTG Interrupts
|
||||
* @param None
|
||||
* @retval : status
|
||||
*/
|
||||
static uint32_t USB_OTG_HandleOTG_ISR(USB_OTG_CORE_HANDLE *pdev)
|
||||
{
|
||||
USB_OTG_GOTGINT_TypeDef gotgint;
|
||||
USB_OTG_GOTGCTL_TypeDef gotgctl;
|
||||
|
||||
|
||||
gotgint.d32 = 0;
|
||||
gotgctl.d32 = 0;
|
||||
|
||||
gotgint.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GOTGINT);
|
||||
gotgctl.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GOTGCTL);
|
||||
|
||||
if (gotgint.b.sesenddet)
|
||||
{
|
||||
gotgctl.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GOTGCTL);
|
||||
|
||||
|
||||
if (USB_OTG_IsDeviceMode(pdev))
|
||||
{
|
||||
|
||||
}
|
||||
else if (USB_OTG_IsHostMode(pdev))
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
/* ----> SRP SUCCESS or FAILURE INTERRUPT <---- */
|
||||
if (gotgint.b.sesreqsucstschng)
|
||||
{
|
||||
gotgctl.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GOTGCTL);
|
||||
if (gotgctl.b.sesreqscs) /* Session request success */
|
||||
{
|
||||
if (USB_OTG_IsDeviceMode(pdev))
|
||||
{
|
||||
|
||||
}
|
||||
/* Clear Session Request */
|
||||
gotgctl.d32 = 0;
|
||||
gotgctl.b.sesreq = 1;
|
||||
USB_OTG_MODIFY_REG32(&pdev->regs.GREGS->GOTGCTL, gotgctl.d32, 0);
|
||||
}
|
||||
else /* Session request failure */
|
||||
{
|
||||
if (USB_OTG_IsDeviceMode(pdev))
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
}
|
||||
/* ----> HNP SUCCESS or FAILURE INTERRUPT <---- */
|
||||
if (gotgint.b.hstnegsucstschng)
|
||||
{
|
||||
gotgctl.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GOTGCTL);
|
||||
|
||||
if (gotgctl.b.hstnegscs) /* Host negotiation success */
|
||||
{
|
||||
if (USB_OTG_IsHostMode(pdev)) /* The core AUTOMATICALLY sets the Host mode */
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
else /* Host negotiation failure */
|
||||
{
|
||||
|
||||
}
|
||||
gotgint.b.hstnegsucstschng = 1; /* Ack "Host Negotiation Success Status Change" interrupt. */
|
||||
}
|
||||
/* ----> HOST NEGOTIATION DETECTED INTERRUPT <---- */
|
||||
if (gotgint.b.hstnegdet)
|
||||
{
|
||||
if (USB_OTG_IsDeviceMode(pdev)) /* The core AUTOMATICALLY sets the Host mode */
|
||||
{
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
|
||||
}
|
||||
}
|
||||
if (gotgint.b.adevtoutchng)
|
||||
{}
|
||||
if (gotgint.b.debdone)
|
||||
{
|
||||
USB_OTG_ResetPort(pdev);
|
||||
}
|
||||
/* Clear OTG INT */
|
||||
USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GOTGINT, gotgint.d32);
|
||||
return 1;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief USB_OTG_HandleConnectorIDStatusChange_ISR
|
||||
* handles the Connector ID Status Change Interrupt
|
||||
* @param None
|
||||
* @retval : status
|
||||
*/
|
||||
static uint32_t USB_OTG_HandleConnectorIDStatusChange_ISR(USB_OTG_CORE_HANDLE *pdev)
|
||||
{
|
||||
USB_OTG_GINTMSK_TypeDef gintmsk;
|
||||
USB_OTG_GOTGCTL_TypeDef gotgctl;
|
||||
USB_OTG_GINTSTS_TypeDef gintsts;
|
||||
|
||||
gintsts.d32 = 0 ;
|
||||
gintmsk.d32 = 0 ;
|
||||
gotgctl.d32 = 0 ;
|
||||
gintmsk.b.sofintr = 1;
|
||||
|
||||
USB_OTG_MODIFY_REG32(&pdev->regs.GREGS->GINTMSK, gintmsk.d32, 0);
|
||||
gotgctl.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GOTGCTL);
|
||||
|
||||
/* B-Device connector (Device Mode) */
|
||||
if (gotgctl.b.conidsts)
|
||||
{
|
||||
USB_OTG_DisableGlobalInt(pdev);
|
||||
USB_OTG_CoreInitDev(pdev);
|
||||
USB_OTG_EnableGlobalInt(pdev);
|
||||
pdev->otg.OTG_State = B_PERIPHERAL;
|
||||
}
|
||||
else
|
||||
{
|
||||
USB_OTG_DisableGlobalInt(pdev);
|
||||
USB_OTG_CoreInitHost(pdev);
|
||||
USB_OTG_EnableGlobalInt(pdev);
|
||||
pdev->otg.OTG_State = A_HOST;
|
||||
}
|
||||
/* Set flag and clear interrupt */
|
||||
gintsts.b.conidstschng = 1;
|
||||
USB_OTG_WRITE_REG32 (&pdev->regs.GREGS->GINTSTS, gintsts.d32);
|
||||
return 1;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief USB_OTG_HandleSessionRequest_ISR
|
||||
* Initiating the Session Request Protocol
|
||||
* @param None
|
||||
* @retval : status
|
||||
*/
|
||||
static uint32_t USB_OTG_HandleSessionRequest_ISR(USB_OTG_CORE_HANDLE *pdev)
|
||||
{
|
||||
USB_OTG_GINTSTS_TypeDef gintsts;
|
||||
USB_OTG_GOTGCTL_TypeDef gotgctl;
|
||||
|
||||
|
||||
gotgctl.d32 = 0;
|
||||
gintsts.d32 = 0;
|
||||
|
||||
gotgctl.d32 = USB_OTG_READ_REG32( &pdev->regs.GREGS->GOTGCTL );
|
||||
if (USB_OTG_IsDeviceMode(pdev) && (gotgctl.b.bsesvld))
|
||||
{
|
||||
|
||||
}
|
||||
else if (gotgctl.b.asesvld)
|
||||
{
|
||||
}
|
||||
/* Clear interrupt */
|
||||
gintsts.d32 = 0;
|
||||
gintsts.b.sessreqintr = 1;
|
||||
USB_OTG_WRITE_REG32 (&pdev->regs.GREGS->GINTSTS, gintsts.d32);
|
||||
return 1;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief USB_OTG_InitiateSRP
|
||||
* Initiate an srp session
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
void USB_OTG_InitiateSRP(USB_OTG_CORE_HANDLE *pdev)
|
||||
{
|
||||
USB_OTG_GOTGCTL_TypeDef otgctl;
|
||||
|
||||
otgctl.d32 = 0;
|
||||
|
||||
otgctl.d32 = USB_OTG_READ_REG32( &pdev->regs.GREGS->GOTGCTL );
|
||||
if (otgctl.b.sesreq)
|
||||
{
|
||||
return; /* SRP in progress */
|
||||
}
|
||||
otgctl.b.sesreq = 1;
|
||||
USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GOTGCTL, otgctl.d32);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief USB_OTG_InitiateHNP
|
||||
* Initiate HNP
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
void USB_OTG_InitiateHNP(USB_OTG_CORE_HANDLE *pdev , uint8_t state, uint8_t mode)
|
||||
{
|
||||
USB_OTG_GOTGCTL_TypeDef otgctl;
|
||||
USB_OTG_HPRT0_TypeDef hprt0;
|
||||
|
||||
otgctl.d32 = 0;
|
||||
hprt0.d32 = 0;
|
||||
|
||||
otgctl.d32 = USB_OTG_READ_REG32( &pdev->regs.GREGS->GOTGCTL );
|
||||
if (mode)
|
||||
{ /* Device mode */
|
||||
if (state)
|
||||
{
|
||||
|
||||
otgctl.b.devhnpen = 1; /* B-Dev has been enabled to perform HNP */
|
||||
otgctl.b.hnpreq = 1; /* Initiate an HNP req. to the connected USB host*/
|
||||
USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GOTGCTL, otgctl.d32);
|
||||
}
|
||||
}
|
||||
else
|
||||
{ /* Host mode */
|
||||
if (state)
|
||||
{
|
||||
otgctl.b.hstsethnpen = 1; /* A-Dev has enabled B-device for HNP */
|
||||
USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GOTGCTL, otgctl.d32);
|
||||
/* Suspend the bus so that B-dev will disconnect indicating the initial condition for HNP to DWC_Core */
|
||||
hprt0.d32 = USB_OTG_ReadHPRT0(pdev);
|
||||
hprt0.b.prtsusp = 1; /* The core clear this bit when disconnect interrupt generated (GINTSTS.DisconnInt = '1') */
|
||||
USB_OTG_WRITE_REG32(pdev->regs.HPRT0, hprt0.d32);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief USB_OTG_GetCurrentState
|
||||
* Return current OTG State
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user