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https://bitbucket.org/librepilot/librepilot.git
synced 2024-12-01 09:24:10 +01:00
Uses Internal flash for system settings storage repourposing external flash for "User" storage
This commit is contained in:
parent
511283c608
commit
d555bd0673
@ -24,7 +24,8 @@ OPENOCD_CONFIG := stm32f4xx.stlink.cfg
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# 6 0x0804 0000 128k FW
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# 6 0x0804 0000 128k FW
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# 7 0x0806 0000 128k FW
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# 7 0x0806 0000 128k FW
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# 8 0x0808 0000 128k Unused
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# 8 0x0808 0000 128k Unused
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# .. ..
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# 9 0x080A 0000 128k Unused
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# 10 0x080C 0000 128k Unused ..
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# 11 0x080E 0000 128k Unused
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# 11 0x080E 0000 128k Unused
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# Note: These must match the values in link_$(BOARD)_memory.ld
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# Note: These must match the values in link_$(BOARD)_memory.ld
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@ -100,8 +100,6 @@ else
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SRC += $(OPTESTS)/$(TESTAPP).c
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SRC += $(OPTESTS)/$(TESTAPP).c
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endif
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endif
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CDEFS += -DEE_BANK_BASE=$(EE_BANK_BASE)
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CDEFS += -DEE_BANK_SIZE=$(EE_BANK_SIZE)
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# Optional component libraries
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# Optional component libraries
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@ -12,11 +12,31 @@ MODEL_SUFFIX :=
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OPENOCD_JTAG_CONFIG := stlink-v2.cfg
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OPENOCD_JTAG_CONFIG := stlink-v2.cfg
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OPENOCD_CONFIG := stm32f4xx.stlink.cfg
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OPENOCD_CONFIG := stm32f4xx.stlink.cfg
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# Flash memory map for Revolution:
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# Sector start size use
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# 0 0x0800 0000 16k BL
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# 1 0x0800 4000 16k BL
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# 2 0x0800 8000 16k EE
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# 3 0x0800 C000 16k EE
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# 4 0x0801 0000 64k Unused
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# 5 0x0802 0000 128k FW
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# 6 0x0804 0000 128k FW
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# 7 0x0806 0000 128k FW
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# 8 0x0808 0000 128k Unused
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# 9 0x080A 0000 128k Unused
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# 10 0x080C 0000 128k Unused ..
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# 11 0x080E 0000 128k Unused
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# Note: These must match the values in link_$(BOARD)_memory.ld
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# Note: These must match the values in link_$(BOARD)_memory.ld
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BL_BANK_BASE := 0x08000000 # Start of bootloader flash
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BL_BANK_BASE := 0x08000000 # Start of bootloader flash
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BL_BANK_SIZE := 0x00008000 # Should include BD_INFO region
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BL_BANK_SIZE := 0x00008000 # Should include BD_INFO region
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# Leave the remaining 16KB and 64KB sectors for other uses
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# 16KB for settings storage
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EE_BANK_BASE := 0x08008000 # EEPROM storage area
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EE_BANK_SIZE := 0x00008000 # Size of EEPROM storage area
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# Leave the remaining 64KB sectors for other uses
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FW_BANK_BASE := 0x08020000 # Start of firmware flash
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FW_BANK_BASE := 0x08020000 # Start of firmware flash
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FW_BANK_SIZE := 0x00060000 # Should include FW_DESC_SIZE
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FW_BANK_SIZE := 0x00060000 # Should include FW_DESC_SIZE
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@ -665,8 +665,9 @@ const struct pios_rfm22b_cfg * PIOS_BOARD_HW_DEFS_GetRfm22Cfg (uint32_t board_re
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#if defined(PIOS_INCLUDE_FLASH)
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#if defined(PIOS_INCLUDE_FLASH)
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#include "pios_flashfs_logfs_priv.h"
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#include "pios_flashfs_logfs_priv.h"
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#include "pios_flash_jedec_priv.h"
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#include "pios_flash_jedec_priv.h"
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#include "pios_flash_internal_priv.h"
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static const struct flashfs_logfs_cfg flashfs_m25p_cfg = {
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static const struct flashfs_logfs_cfg flashfs_external_cfg = {
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.fs_magic = 0x99abceef,
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.fs_magic = 0x99abceef,
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.total_fs_size = 0x00200000, /* 2M bytes (32 sectors = entire chip) */
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.total_fs_size = 0x00200000, /* 2M bytes (32 sectors = entire chip) */
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.arena_size = 0x00010000, /* 256 * slot size */
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.arena_size = 0x00010000, /* 256 * slot size */
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@ -677,6 +678,20 @@ static const struct flashfs_logfs_cfg flashfs_m25p_cfg = {
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.page_size = 0x00000100, /* 256 bytes */
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.page_size = 0x00000100, /* 256 bytes */
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};
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};
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static const struct pios_flash_internal_cfg flash_internal_cfg = { };
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static const struct flashfs_logfs_cfg flashfs_internal_cfg = {
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.fs_magic = 0x99abcfef,
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.total_fs_size = EE_BANK_SIZE, /* 32K bytes (2x16KB sectors) */
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.arena_size = 0x00004000, /* 64 * slot size = 16K bytes = 1 sector */
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.slot_size = 0x00000100, /* 256 bytes */
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.start_offset = EE_BANK_BASE, /* start after the bootloader */
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.sector_size = 0x00004000, /* 16K bytes */
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.page_size = 0x00004000, /* 16K bytes */
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};
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#endif /* PIOS_INCLUDE_FLASH */
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#endif /* PIOS_INCLUDE_FLASH */
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#include <pios_usart_priv.h>
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#include <pios_usart_priv.h>
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@ -106,6 +106,7 @@
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/* #define PIOS_INCLUDE_SDCARD */
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/* #define PIOS_INCLUDE_SDCARD */
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/* #define LOG_FILENAME "startup.log" */
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/* #define LOG_FILENAME "startup.log" */
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#define PIOS_INCLUDE_FLASH
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#define PIOS_INCLUDE_FLASH
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#define PIOS_INCLUDE_FLASH_INTERNAL
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#define PIOS_INCLUDE_FLASH_SECTOR_SETTINGS
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#define PIOS_INCLUDE_FLASH_SECTOR_SETTINGS
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#define FLASH_FREERTOS
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#define FLASH_FREERTOS
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/* #define PIOS_INCLUDE_FLASH_EEPROM */
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/* #define PIOS_INCLUDE_FLASH_EEPROM */
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@ -236,6 +236,7 @@ uint32_t pios_rfm22b_id = 0;
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#endif
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#endif
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uintptr_t pios_uavo_settings_fs_id;
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uintptr_t pios_uavo_settings_fs_id;
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uintptr_t pios_user_fs_id;
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/*
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/*
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* Setup a com port based on the passed cfg, driver and buffer sizes. tx size of -1 make the port rx only
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* Setup a com port based on the passed cfg, driver and buffer sizes. tx size of -1 make the port rx only
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@ -350,11 +351,22 @@ void PIOS_Board_Init(void) {
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#if defined(PIOS_INCLUDE_FLASH)
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#if defined(PIOS_INCLUDE_FLASH)
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/* Connect flash to the appropriate interface and configure it */
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/* Connect flash to the appropriate interface and configure it */
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uintptr_t flash_id;
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uintptr_t flash_id;
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// initialize the internal settings storage flash
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if (PIOS_Flash_Internal_Init(&flash_id, &flash_internal_cfg)) {
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PIOS_DEBUG_Assert(0);
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}
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if (PIOS_FLASHFS_Logfs_Init(&pios_uavo_settings_fs_id, &flashfs_internal_cfg, &pios_internal_flash_driver, flash_id)) {
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PIOS_DEBUG_Assert(0);
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}
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// Initialize the external USER flash
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if (PIOS_Flash_Jedec_Init(&flash_id, pios_spi_telem_flash_id, 1)) {
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if (PIOS_Flash_Jedec_Init(&flash_id, pios_spi_telem_flash_id, 1)) {
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PIOS_DEBUG_Assert(0);
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PIOS_DEBUG_Assert(0);
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}
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}
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if (PIOS_FLASHFS_Logfs_Init(&pios_uavo_settings_fs_id, &flashfs_m25p_cfg, &pios_jedec_flash_driver, flash_id)) {
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if (PIOS_FLASHFS_Logfs_Init(&pios_user_fs_id, &flashfs_external_cfg, &pios_jedec_flash_driver, flash_id)) {
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PIOS_DEBUG_Assert(0);
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PIOS_DEBUG_Assert(0);
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}
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}
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@ -16,7 +16,12 @@ OPENOCD_CONFIG := stm32f4xx.stlink.cfg
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BL_BANK_BASE := 0x08000000 # Start of bootloader flash
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BL_BANK_BASE := 0x08000000 # Start of bootloader flash
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BL_BANK_SIZE := 0x00008000 # Should include BD_INFO region
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BL_BANK_SIZE := 0x00008000 # Should include BD_INFO region
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# Leave the remaining 16KB and 64KB sectors for other uses
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# 16KB for settings storage
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EE_BANK_BASE := 0x08008000 # EEPROM storage area
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EE_BANK_SIZE := 0x00008000 # Size of EEPROM storage area
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# Leave the remaining 64KB sectors for other uses
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FW_BANK_BASE := 0x08020000 # Start of firmware flash
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FW_BANK_BASE := 0x08020000 # Start of firmware flash
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FW_BANK_SIZE := 0x00060000 # Should include FW_DESC_SIZE
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FW_BANK_SIZE := 0x00060000 # Should include FW_DESC_SIZE
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@ -448,8 +448,9 @@ void PIOS_SPI_flash_irq_handler(void)
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#if defined(PIOS_INCLUDE_FLASH)
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#if defined(PIOS_INCLUDE_FLASH)
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#include "pios_flashfs_logfs_priv.h"
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#include "pios_flashfs_logfs_priv.h"
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#include "pios_flash_jedec_priv.h"
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#include "pios_flash_jedec_priv.h"
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#include "pios_flash_internal_priv.h"
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static const struct flashfs_logfs_cfg flashfs_m25p_cfg = {
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static const struct flashfs_logfs_cfg flashfs_external_cfg = {
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.fs_magic = 0x99abceef,
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.fs_magic = 0x99abceef,
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.total_fs_size = 0x00200000, /* 2M bytes (32 sectors = entire chip) */
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.total_fs_size = 0x00200000, /* 2M bytes (32 sectors = entire chip) */
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.arena_size = 0x00010000, /* 256 * slot size */
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.arena_size = 0x00010000, /* 256 * slot size */
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@ -460,6 +461,20 @@ static const struct flashfs_logfs_cfg flashfs_m25p_cfg = {
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.page_size = 0x00000100, /* 256 bytes */
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.page_size = 0x00000100, /* 256 bytes */
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};
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};
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static const struct pios_flash_internal_cfg flash_internal_cfg = { };
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static const struct flashfs_logfs_cfg flashfs_internal_cfg = {
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.fs_magic = 0x99abcfef,
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.total_fs_size = EE_BANK_SIZE, /* 32K bytes (2x16KB sectors) */
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.arena_size = 0x00004000, /* 64 * slot size = 16K bytes = 1 sector */
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.slot_size = 0x00000100, /* 256 bytes */
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.start_offset = EE_BANK_BASE, /* start after the bootloader */
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.sector_size = 0x00004000, /* 16K bytes */
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.page_size = 0x00004000, /* 16K bytes */
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};
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#endif /* PIOS_INCLUDE_FLASH */
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#endif /* PIOS_INCLUDE_FLASH */
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#if defined(PIOS_OVERO_SPI)
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#if defined(PIOS_OVERO_SPI)
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@ -106,6 +106,7 @@
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/* #define PIOS_INCLUDE_SDCARD */
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/* #define PIOS_INCLUDE_SDCARD */
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/* #define LOG_FILENAME "startup.log" */
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/* #define LOG_FILENAME "startup.log" */
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#define PIOS_INCLUDE_FLASH
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#define PIOS_INCLUDE_FLASH
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#define PIOS_INCLUDE_FLASH_INTERNAL
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#define PIOS_INCLUDE_FLASH_SECTOR_SETTINGS
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#define PIOS_INCLUDE_FLASH_SECTOR_SETTINGS
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#define FLASH_FREERTOS
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#define FLASH_FREERTOS
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/* #define PIOS_INCLUDE_FLASH_EEPROM */
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/* #define PIOS_INCLUDE_FLASH_EEPROM */
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@ -306,6 +306,8 @@ uint32_t pios_com_overo_id = 0;
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uint32_t pios_com_hkosd_id = 0;
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uint32_t pios_com_hkosd_id = 0;
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uintptr_t pios_uavo_settings_fs_id;
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uintptr_t pios_uavo_settings_fs_id;
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uintptr_t pios_user_fs_id;
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/*
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/*
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* Setup a com port based on the passed cfg, driver and buffer sizes. tx size of -1 make the port rx only
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* Setup a com port based on the passed cfg, driver and buffer sizes. tx size of -1 make the port rx only
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@ -378,6 +380,18 @@ void PIOS_Board_Init(void) {
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PIOS_LED_Init(&pios_led_cfg);
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PIOS_LED_Init(&pios_led_cfg);
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/* Connect flash to the appropriate interface and configure it */
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uintptr_t flash_id;
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// initialize the internal settings storage flash
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if (PIOS_Flash_Internal_Init(&flash_id, &flash_internal_cfg)) {
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PIOS_DEBUG_Assert(0);
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}
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if (PIOS_FLASHFS_Logfs_Init(&pios_uavo_settings_fs_id, &flashfs_internal_cfg, &pios_internal_flash_driver, flash_id)) {
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PIOS_DEBUG_Assert(0);
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}
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/* Set up the SPI interface to the accelerometer*/
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/* Set up the SPI interface to the accelerometer*/
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if (PIOS_SPI_Init(&pios_spi_accel_id, &pios_spi_accel_cfg)) {
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if (PIOS_SPI_Init(&pios_spi_accel_id, &pios_spi_accel_cfg)) {
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PIOS_DEBUG_Assert(0);
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PIOS_DEBUG_Assert(0);
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@ -392,19 +406,18 @@ void PIOS_Board_Init(void) {
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if (PIOS_SPI_Init(&pios_spi_flash_id, &pios_spi_flash_cfg)) {
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if (PIOS_SPI_Init(&pios_spi_flash_id, &pios_spi_flash_cfg)) {
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PIOS_DEBUG_Assert(0);
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PIOS_DEBUG_Assert(0);
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}
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}
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/* Connect flash to the appropriate interface and configure it */
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/* Connect flash to the appropriate interface and configure it */
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uintptr_t flash_id;
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if (PIOS_Flash_Jedec_Init(&flash_id, pios_spi_flash_id, 0)) {
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if (PIOS_Flash_Jedec_Init(&flash_id, pios_spi_flash_id, 0)) {
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PIOS_DEBUG_Assert(0);
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PIOS_DEBUG_Assert(0);
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}
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}
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#else
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#else
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/* Connect flash to the appropriate interface and configure it */
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/* Connect flash to the appropriate interface and configure it */
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uintptr_t flash_id;
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if (PIOS_Flash_Jedec_Init(&flash_id, pios_spi_accel_id, 1)) {
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if (PIOS_Flash_Jedec_Init(&flash_id, pios_spi_accel_id, 1)) {
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PIOS_DEBUG_Assert(0);
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PIOS_DEBUG_Assert(0);
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}
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}
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#endif
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#endif
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if (PIOS_FLASHFS_Logfs_Init(&pios_uavo_settings_fs_id, &flashfs_m25p_cfg, &pios_jedec_flash_driver, flash_id)) {
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if (PIOS_FLASHFS_Logfs_Init(&pios_user_fs_id, &flashfs_external_cfg, &pios_jedec_flash_driver, flash_id)) {
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PIOS_DEBUG_Assert(0);
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PIOS_DEBUG_Assert(0);
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}
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}
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@ -137,6 +137,8 @@ BOARD_CDEFS += -DBL_BANK_BASE=$(BL_BANK_BASE)
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BOARD_CDEFS += -DBL_BANK_SIZE=$(BL_BANK_SIZE)
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BOARD_CDEFS += -DBL_BANK_SIZE=$(BL_BANK_SIZE)
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BOARD_CDEFS += -DBL_DESC_SIZE=$(BL_DESC_SIZE)
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BOARD_CDEFS += -DBL_DESC_SIZE=$(BL_DESC_SIZE)
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BOARD_CDEFS += -DEE_BANK_BASE=$(EE_BANK_BASE)
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BOARD_CDEFS += -DEE_BANK_SIZE=$(EE_BANK_SIZE)
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CDEFS += $(BOARD_CDEFS)
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CDEFS += $(BOARD_CDEFS)
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ifeq ($(DEBUG), YES)
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ifeq ($(DEBUG), YES)
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Block a user