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Code Issues Releases Activity

Make the Overo module use the new driver

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This commit is contained in:
James Cotton 2012-07-17 16:11:23 -05:00
parent a6ba379af9
commit db27653859
3 changed files with 46 additions and 80 deletions
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67
flight/Modules/OveroSync/overosync.c
View File

@ -55,8 +55,7 @@ static bool overoEnabled;
// Private functions
static void overoSyncTask(void *parameters);
static int32_t packData(uint8_t * data, int32_t length);
static int32_t transmitData();
static void transmitDataDone(bool crc_ok, uint8_t crc_val);
static void transmitDataDone();
static void registerObject(UAVObjHandle obj);
struct dma_transaction {
@ -197,6 +196,9 @@ static void overoSyncTask(void *parameters)
portTickType lastUpdateTime = xTaskGetTickCount();
portTickType updateTime;
// Set the comms callback
PIOS_Overo_SetCallback(transmitDataDone);
// Loop forever
while (1) {
// Wait for queue message
@ -229,26 +231,6 @@ static void overoSyncTask(void *parameters)
}
}
static void transmitDataDone(bool crc_ok, uint8_t crc_val)
{
uint8_t *rx_buffer;
static signed portBASE_TYPE xHigherPriorityTaskWoken;
rx_buffer = overosync->transactions[overosync->active_transaction_id].rx_buffer;
// Release the semaphore and start another transaction (which grabs semaphore again but then
// returns instantly). Because this is called by the DMA ISR we need to be aware of context
// switches.
xSemaphoreGiveFromISR(overosync->transaction_lock, &xHigherPriorityTaskWoken);
portEND_SWITCHING_ISR(xHigherPriorityTaskWoken);
overosync->transaction_done = true;
// Parse the data from overo
//for (uint32_t i = 0; rx_buffer[0] != 0 && i < sizeof(rx_buffer) ; i++)
// UAVTalkProcessInputStream(uavTalkCon, rx_buffer[i]);
}
/**
* Transmit data buffer to the modem or USB port.
* \param[in] data Data buffer to send
@ -256,7 +238,6 @@ static void transmitDataDone(bool crc_ok, uint8_t crc_val)
* \return -1 on failure
* \return number of bytes transmitted on success
*/
uint32_t too_long = 0;
static int32_t packData(uint8_t * data, int32_t length)
{
uint8_t *tx_buffer;
@ -285,37 +266,19 @@ static int32_t packData(uint8_t * data, int32_t length)
xSemaphoreGive(overosync->buffer_lock);
/* // When the NSS line rises while we are packing data then a transaction doesn't start
// because that means we will be here very shortly afterwards (priority of task making that
// not always perfectly true) schedule the transaction here.
if (buffer_swap_failed && (PIOS_DELAY_DiffuS(buffer_swap_timeval) < 50)) {
buffer_swap_failed = false;
transmitData();
} else if (buffer_swap_failed) {
buffer_swap_failed = false;
too_long++;
}
*/
return length;
}
static int32_t transmitData()
/**
* Callback from the overo spi driver at the end of each packet
*/
static void transmitDataDone()
{
uint8_t *tx_buffer, *rx_buffer;
static signed portBASE_TYPE xHigherPriorityTaskWoken;
// Get this lock first so we don't swap buffers and then fail
// to start
if (xSemaphoreTake(overosync->transaction_lock, 0) == pdFALSE)
return -1;
// Get lock to manipulate buffers
if(xSemaphoreTake(overosync->buffer_lock, 0) == pdFALSE) {
xSemaphoreGiveFromISR(overosync->transaction_lock, &xHigherPriorityTaskWoken);
portEND_SWITCHING_ISR(xHigherPriorityTaskWoken);
buffer_swap_failed = true;
buffer_swap_timeval = PIOS_DELAY_GetRaw();
return -2;
return;
}
overosync->transaction_done = false;
@ -325,18 +288,20 @@ static int32_t transmitData()
overosync->loading_transaction_id = (overosync->loading_transaction_id + 1) %
NELEMENTS(overosync->transactions);
// Release the buffer lock
xSemaphoreGive(overosync->buffer_lock);
// Get the new buffers and configure the overo driver
tx_buffer = overosync->transactions[overosync->active_transaction_id].tx_buffer;
rx_buffer = overosync->transactions[overosync->active_transaction_id].rx_buffer;
PIOS_Overo_SetNewBuffer((uint8_t *) tx_buffer, (uint8_t *) rx_buffer,
sizeof(overosync->transactions[overosync->active_transaction_id].tx_buffer));
// Prepare the new loading buffer
memset(overosync->transactions[overosync->loading_transaction_id].tx_buffer, 0xff,
sizeof(overosync->transactions[overosync->loading_transaction_id].tx_buffer));
overosync->write_pointer = 0;
xSemaphoreGiveFromISR(overosync->buffer_lock, &xHigherPriorityTaskWoken);
portEND_SWITCHING_ISR(xHigherPriorityTaskWoken);
return PIOS_Overo_SetNewBuffer((uint8_t *) tx_buffer, (uint8_t *) rx_buffer, sizeof(overosync->transactions[overosync->active_transaction_id].tx_buffer), &transmitDataDone) == 0 ? 0 : -3;
}
/**

26
flight/PiOS/STM32F4xx/pios_overo.c
View File

@ -103,8 +103,6 @@ struct pios_overo_dev * overo_dev;
*/
int32_t PIOS_Overo_Init(const struct pios_overo_cfg * cfg)
{
uint32_t init_ssel = 0;
PIOS_Assert(cfg);
overo_dev = (struct pios_overo_dev *) PIOS_OVERO_alloc();
@ -122,12 +120,10 @@ int32_t PIOS_Overo_Init(const struct pios_overo_cfg * cfg)
/* only legal for single-slave config */
PIOS_Assert(overo_dev->cfg->slave_count == 1);
init_ssel = 1;
SPI_SSOutputCmd(overo_dev->cfg->regs, (overo_dev->cfg->init.SPI_Mode == SPI_Mode_Master) ? ENABLE : DISABLE);
/* Initialize the GPIO pins */
/* note __builtin_ctz() due to the difference between GPIO_PinX and GPIO_PinSourceX */
if (overo_dev->cfg->remap) {
GPIO_PinAFConfig(overo_dev->cfg->sclk.gpio,
__builtin_ctz(overo_dev->cfg->sclk.init.GPIO_Pin),
overo_dev->cfg->remap);
@ -137,12 +133,10 @@ int32_t PIOS_Overo_Init(const struct pios_overo_cfg * cfg)
GPIO_PinAFConfig(overo_dev->cfg->miso.gpio,
__builtin_ctz(overo_dev->cfg->miso.init.GPIO_Pin),
overo_dev->cfg->remap);
for (uint32_t i = 0; i < init_ssel; i++) {
GPIO_PinAFConfig(overo_dev->cfg->ssel[i].gpio,
__builtin_ctz(overo_dev->cfg->ssel[i].init.GPIO_Pin),
GPIO_PinAFConfig(overo_dev->cfg->ssel[0].gpio,
__builtin_ctz(overo_dev->cfg->ssel[0].init.GPIO_Pin),
overo_dev->cfg->remap);
}
}
GPIO_Init(overo_dev->cfg->sclk.gpio, (GPIO_InitTypeDef*)&(overo_dev->cfg->sclk.init));
GPIO_Init(overo_dev->cfg->mosi.gpio, (GPIO_InitTypeDef*)&(overo_dev->cfg->mosi.init));
GPIO_Init(overo_dev->cfg->miso.gpio, (GPIO_InitTypeDef*)&(overo_dev->cfg->miso.init));
@ -202,7 +196,7 @@ out_fail:
* \return -1 if disabled SPI port selected
* \return -3 if function has been called during an ongoing DMA transfer
*/
int32_t PIOS_Overo_SetNewBuffer(const uint8_t *send_buffer, uint8_t *receive_buffer, uint16_t len, void *callback)
int32_t PIOS_Overo_SetNewBuffer(const uint8_t *send_buffer, uint8_t *receive_buffer, uint16_t len)
{
bool valid = PIOS_OVERO_validate(overo_dev);
PIOS_Assert(valid)
@ -212,13 +206,19 @@ int32_t PIOS_Overo_SetNewBuffer(const uint8_t *send_buffer, uint8_t *receive_buf
overo_dev->new_tx_buffer = (uint32_t) send_buffer;
overo_dev->new_rx_buffer = (uint32_t) receive_buffer;
/* Set callback function */
overo_dev->callback = callback;
/* No error */
return overrun ? -1 : 0;
}
/**
* Set the callback function
*/
int32_t PIOS_Overo_SetCallback(void *callback)
{
overo_dev->callback = callback;
return 0;
}
/**
* On the rising edge of NSS schedule a new transaction. This cannot be
* done by the DMA complete because there is 150 us between that and the

3
flight/PiOS/inc/pios_overo.h
View File

@ -54,7 +54,8 @@ struct pios_overo_dev {
};
extern int32_t PIOS_Overo_Init(const struct pios_overo_cfg * cfg);
extern int32_t PIOS_Overo_SetNewBuffer(const uint8_t *send_buffer, uint8_t *receive_buffer, uint16_t len, void *callback);
extern int32_t PIOS_Overo_SetCallback(void *callback);
extern int32_t PIOS_Overo_SetNewBuffer(const uint8_t *send_buffer, uint8_t *receive_buffer, uint16_t len);
#endif /* PIOS_OVERO_H */