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Code Issues Releases Activity

Get SPI closer to working. The flags in the pios_config should match the

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stream number, not channel number.  Also DeInit DMA section in the init process
which makes debugging and init behavior more reliable.
This commit is contained in:
James Cotton 2011-08-15 04:10:35 -05:00
parent c5ed82086d
commit db9c73db45
3 changed files with 44 additions and 25 deletions
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12
flight/INS/ins.c
View File

@ -529,13 +529,13 @@ int main()
}
*/
// Flash warning light while trying to connect
uint16_t time_val = PIOS_DELAY_GetuS();
uint16_t ms_count = 0;
uint32_t time_val = PIOS_DELAY_GetRaw();
uint32_t ms_count = 0;
while(!AhrsLinkReady()) {
AhrsPoll();
if(PIOS_DELAY_DiffuS(time_val) > 10000) {
ms_count += 10;
time_val = PIOS_DELAY_GetuS();
if(PIOS_DELAY_DiffuS(time_val) > 1000) {
ms_count += 1;
time_val = PIOS_DELAY_GetRaw();
}
if(ms_count > 100) {
PIOS_LED_Toggle(LED2);
@ -544,6 +544,8 @@ int main()
}
PIOS_LED_Off(LED2);
panic(8);
/* we didn't connect the callbacks before because we have to wait
for all data to be up to date before doing anything*/

35
flight/INS/pios_board.c
View File

@ -59,10 +59,9 @@ static const struct pios_spi_cfg pios_spi_op_cfg = {
},
.use_crc = true,
.dma = {
.ahb_clk = RCC_AHB1Periph_DMA1,
.irq = {
.flags = (DMA_IT_TCIF4 | DMA_IT_TEIF4 | DMA_IT_HTIF4),
// Note this is the stream ID that triggers interrupts (in this case RX)
.flags = (DMA_IT_TCIF3 | DMA_IT_TEIF3 | DMA_IT_HTIF3),
.init = {
.NVIC_IRQChannel = DMA1_Stream3_IRQn,
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGH,
@ -76,16 +75,16 @@ static const struct pios_spi_cfg pios_spi_op_cfg = {
.init = {
.DMA_Channel = DMA_Channel_0,
.DMA_PeripheralBaseAddr = (uint32_t) & (SPI2->DR),
.DMA_DIR = DMA_DIR_PeripheralToMemory,
.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
.DMA_MemoryInc = DMA_MemoryInc_Enable,
.DMA_DIR = DMA_DIR_PeripheralToMemory,
.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
.DMA_MemoryInc = DMA_MemoryInc_Enable,
.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
.DMA_Mode = DMA_Mode_Normal,
.DMA_Priority = DMA_Priority_Medium,
.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
.DMA_Mode = DMA_Mode_Normal,
.DMA_Priority = DMA_Priority_Medium,
//TODO: Enable FIFO
.DMA_FIFOMode = DMA_FIFOMode_Disable,
/* .DMA_FIFOThreshold */
.DMA_FIFOThreshold = DMA_FIFOThreshold_Full,
.DMA_MemoryBurst = DMA_MemoryBurst_Single,
.DMA_PeripheralBurst = DMA_PeripheralBurst_Single,
},
@ -95,15 +94,15 @@ static const struct pios_spi_cfg pios_spi_op_cfg = {
.init = {
.DMA_Channel = DMA_Channel_0,
.DMA_PeripheralBaseAddr = (uint32_t) & (SPI2->DR),
.DMA_DIR = DMA_DIR_MemoryToPeripheral,
.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
.DMA_MemoryInc = DMA_MemoryInc_Enable,
.DMA_DIR = DMA_DIR_MemoryToPeripheral,
.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
.DMA_MemoryInc = DMA_MemoryInc_Enable,
.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
.DMA_Mode = DMA_Mode_Normal,
.DMA_Priority = DMA_Priority_Medium,
.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
.DMA_Mode = DMA_Mode_Normal,
.DMA_Priority = DMA_Priority_Medium,
.DMA_FIFOMode = DMA_FIFOMode_Disable,
/* .DMA_FIFOThreshold */
.DMA_FIFOThreshold = DMA_FIFOThreshold_Full,
.DMA_MemoryBurst = DMA_MemoryBurst_Single,
.DMA_PeripheralBurst = DMA_PeripheralBurst_Single,
},
@ -182,7 +181,7 @@ static const struct pios_spi_cfg pios_spi_accel_cfg = {
.use_crc = false,
.dma = {
.irq = {
.flags = (DMA_IT_TCIF3 | DMA_IT_TEIF3 | DMA_IT_HTIF3),
.flags = (DMA_IT_TCIF0 | DMA_IT_TEIF0 | DMA_IT_HTIF0),
.init = {
.NVIC_IRQChannel = DMA2_Stream0_IRQn,
.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGH,

22
flight/PiOS/STM32F2xx/pios_spi.c
View File

@ -154,14 +154,17 @@ int32_t PIOS_SPI_Init(uint32_t * spi_id, const struct pios_spi_cfg * cfg)
}
/* Configure DMA for SPI Rx */
DMA_DeInit(spi_dev->cfg->dma.rx.channel);
DMA_Cmd(spi_dev->cfg->dma.rx.channel, DISABLE);
DMA_Init(spi_dev->cfg->dma.rx.channel, (DMA_InitTypeDef*)&(spi_dev->cfg->dma.rx.init));
/* Configure DMA for SPI Tx */
DMA_DeInit(spi_dev->cfg->dma.tx.channel);
DMA_Cmd(spi_dev->cfg->dma.tx.channel, DISABLE);
DMA_Init(spi_dev->cfg->dma.tx.channel, (DMA_InitTypeDef*)&(spi_dev->cfg->dma.tx.init));
/* Initialize the SPI block */
SPI_DeInit(spi_dev->cfg->regs);
SPI_Init(spi_dev->cfg->regs, (SPI_InitTypeDef*)&(spi_dev->cfg->init));
/* Configure CRC calculation */
@ -366,7 +369,9 @@ static int32_t SPI_DMA_TransferBlock(uint32_t spi_id, const uint8_t *send_buffer
/* Disable the DMA channels */
DMA_Cmd(spi_dev->cfg->dma.rx.channel, DISABLE);
while(DMA_GetCmdStatus(spi_dev->cfg->dma.rx.channel) != DISABLE);
DMA_Cmd(spi_dev->cfg->dma.tx.channel, DISABLE);
while(DMA_GetCmdStatus(spi_dev->cfg->dma.tx.channel) != DISABLE);
/* Set callback function */
spi_dev->callback = callback;
@ -587,9 +592,22 @@ void PIOS_SPI_IRQ_Handler(uint32_t spi_id)
bool valid = PIOS_SPI_validate(spi_dev);
PIOS_Assert(valid)
/* // Check valid flag is set
if(DMA_GetITStatus(spi_dev->cfg->dma.rx.channel, spi_dev->cfg->dma.irq.flags) != SET) {
// if(spi_dev->cfg->dma.rx.channel != DMA1_Stream3) {
//flags = DMA_GetFlagStatus(spi_dev->cfg->dma.rx.channel);
while(1) {
PIOS_DELAY_WaitmS(50);
PIOS_LED_Toggle(LED1);
PIOS_LED_Toggle(LED2);
}
}*/
flags++;
// FIXME XXX Only RX channel or better clear flags for both channels?
DMA_ClearFlag(spi_dev->cfg->dma.rx.channel, spi_dev->cfg->dma.irq.flags);
DMA_ClearITPendingBit(spi_dev->cfg->dma.rx.channel, spi_dev->cfg->dma.irq.flags);
/* Wait for the final bytes of the transfer to complete, including CRC byte(s). */
while (!(SPI_I2S_GetFlagStatus(spi_dev->cfg->regs, SPI_I2S_FLAG_TXE))) ;