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Code Issues Releases Activity

Moved RFM22B code from PipXtreme to pios_rfm22b.c driver. The radio is now passing data.

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This commit is contained in:
Brian Webb 2012-03-18 10:22:05 -07:00
parent 41c68a6f6b
commit ecdf150946
9 changed files with 5068 additions and 434 deletions
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8
flight/Libraries/inc/packet_handler.h
View File

@ -65,10 +65,11 @@ typedef struct {
uint8_t txWinSize;
uint16_t maxConnections;
uint32_t id;
uint8_t (*output_stream)(PHPacketHandle packet);
void *dev;
uint8_t (*output_stream)(void *dev, PHPacketHandle packet);
void (*set_baud)(uint32_t baud);
void (*data_handler)(uint8_t *data, uint8_t len);
void (*receiver_handler)(uint8_t *data, uint8_t len);
void (*data_handler)(void *dev, uint8_t *data, uint8_t len);
void (*receiver_handler)(void *dev, uint8_t *data, uint8_t len);
} PacketHandlerConfig;
typedef int32_t (*PHOutputStream)(PHPacketHandle packet);
@ -78,6 +79,7 @@ typedef void* PHInstHandle;
// Public functions
PHInstHandle PHInitialize(PacketHandlerConfig *cfg);
uint32_t PHConnect(PHInstHandle h, uint32_t dest_id);
PHPacketHandle PHGetRXPacket(PHInstHandle h);
PHPacketHandle PHGetTXPacket(PHInstHandle h);
PHPacketHandle PHReserveTXPacket(PHInstHandle h);
void PHReleaseLock(PHInstHandle h, bool keep_packet);

23
flight/Libraries/packet_handler.c
View File

@ -157,6 +157,17 @@ PHPacketHandle PHGetTXPacket(PHInstHandle h)
return p;
}
/**
* Get a pointer to the the receive buffer.
* \param[in] h The packet handler instance data pointer.
* \return PHPacketHandle A pointer to the packet buffer.
*/
PHPacketHandle PHGetRXPacket(PHInstHandle h)
{
PHPacketDataHandle data = (PHPacketDataHandle)h;
return &(data->rx_packet);
}
/**
* Release a packet from the transmit packet buffer window.
* \param[in] h The packet handler instance data pointer.
@ -229,15 +240,19 @@ uint8_t PHReceivePacket(PHInstHandle h, PHPacketHandle p)
// Pass on the data.
if(data->cfg.data_handler)
data->cfg.data_handler(p->data, p->header.data_size);
data->cfg.data_handler(data->cfg.dev, p->data, p->header.data_size);
break;
case PACKET_TYPE_RECEIVER:
break;
default:
// Pass on the data to the receiver handler.
if(data->cfg.receiver_handler)
data->cfg.receiver_handler(p->data, p->header.data_size);
if(data->cfg.data_handler)
data->cfg.data_handler(data->cfg.dev, p->data, p->header.data_size);
break;
}
@ -259,7 +274,7 @@ static uint8_t PHLTransmitPacket(PHPacketDataHandle data, PHPacketHandle p)
p->header.tx_seq = data->tx_seq_id++;
// Transmit the packet using the output stream.
if(!data->cfg.output_stream(p))
if(!data->cfg.output_stream(data->cfg.dev, p))
return 0;
return 1;

42
flight/PiOS/Boards/STM32103CB_PIPXTREME_Rev1.h
View File

@ -130,12 +130,13 @@ TIM4 | RC In 1 | Servo 3 | Servo 2 | Servo 1
extern uint32_t pios_i2c_flexi_adapter_id;
#define PIOS_I2C_MAIN_ADAPTER (pios_i2c_flexi_adapter_id)
//-------------------------
// SPI
//
//------------------------
// PIOS_SPI
// See also pios_board.c
//-------------------------
#define PIOS_SPI_MAX_DEVS 2
//------------------------
#define PIOS_SPI_MAX_DEVS 1
extern uint32_t pios_spi_port_id;
#define PIOS_SPI_PORT (pios_spi_port_id)
//-------------------------
// PIOS_USART
@ -161,14 +162,20 @@ extern uint32_t pios_com_rfm22b_id;
#define PIOS_COM_RFM22B_RF (pios_com_rfm22b_id)
/*
#define PIOS_COM_DEBUG PIOS_COM_TELEM_SERIAL
#define PIOS_COM_RADIO_TEMP PIOS_COM_FLEXI
#define PIOS_COM_BRIDGE_COM PIOS_COM_TELEM_USB
*/
#define PIOS_COM_DEBUG PIOS_COM_TELEM_SERIAL
#define PIOS_COM_RADIO_TEMP PIOS_COM_FLEXI
#define PIOS_COM_DEBUG PIOS_COM_FLEXI
#define PIOS_COM_BRIDGE_COM PIOS_COM_TELEM_SERIAL
#define PIOS_COM_BRIDGE_RADIO PIOS_COM_RFM22B_RF
#define DEBUG_LEVEL 1
#if DEBUG_LEVEL > 0
#define DEBUG_PRINTF(level, ...) if(level <= DEBUG_LEVEL) { PIOS_COM_SendFormattedStringNonBlocking(PIOS_COM_DEBUG, __VA_ARGS__); }
#else
#define DEBUG_PRINTF(...)
#endif
#define RFM22_DEBUG 1
//------------------------
// PIOS_RCVR
// See also pios_board.c
@ -218,4 +225,23 @@ extern uint32_t pios_com_rfm22b_id;
#define PIOS_USB_DETECT_GPIO_PIN GPIO_Pin_15
#define PIOS_USB_DETECT_EXTI_LINE EXTI_Line15
//-------------------------
// RFM22
//-------------------------
//#define RFM22_EXT_INT_USE
#define RFM22_PIOS_SPI PIOS_SPI_PORT // SPIx
#if defined(RFM22_EXT_INT_USE)
#define RFM22_EXT_INT_PORT_SOURCE GPIO_PortSourceGPIOA
#define RFM22_EXT_INT_PIN_SOURCE GPIO_PinSource2
#define RFM22_EXT_INT_LINE EXTI_Line2
#define RFM22_EXT_INT_IRQn EXTI2_IRQn
#define RFM22_EXT_INT_FUNC EXTI2_IRQHandler
#define RFM22_EXT_INT_PRIORITY 1
#endif
#endif /* STM32103CB_PIPXTREME_H_ */

2770
flight/PiOS/Common/pios_rfm22b.c
View File

@ -1,17 +1,17 @@
/**
******************************************************************************
* @addtogroup PIOS PIOS Core hardware abstraction layer
* @{
* @addtogroup PIOS_RFM22B Radio Functions
* @brief PIOS interface for for the RFM22B radio
* @{
*
* @file pios_rfm22b.c
* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2012.
* @brief Implements a driver the the RFM22B driver
* @see The GNU Public License (GPL) Version 3
*
*****************************************************************************/
******************************************************************************
* @addtogroup PIOS PIOS Core hardware abstraction layer
* @{
* @addtogroup PIOS_RFM22B Radio Functions
* @brief PIOS interface for for the RFM22B radio
* @{
*
* @file pios_rfm22b.c
* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2012.
* @brief Implements a driver the the RFM22B driver
* @see The GNU Public License (GPL) Version 3
*
*****************************************************************************/
/*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -28,35 +28,118 @@
* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
// *****************************************************************
// RFM22B hardware layer
//
// This module uses the RFM22B's internal packet handling hardware to
// encapsulate our own packet data.
//
// The RFM22B internal hardware packet handler configuration is as follows ..
//
// 4-byte (32-bit) preamble .. alternating 0's & 1's
// 4-byte (32-bit) sync
// 1-byte packet length (number of data bytes to follow)
// 0 to 255 user data bytes
//
// Our own packet data will also contain it's own header and 32-bit CRC
// as a single 16-bit CRC is not sufficient for wireless comms.
//
// *****************************************************************
/* Project Includes */
#include "pios.h"
#if defined(PIOS_INCLUDE_RFM22B)
#include <string.h> // memmove
#include <stm32f10x.h>
#include <stopwatch.h>
#include <packet_handler.h>
#include <pios_rfm22b_priv.h>
/* Provide a COM driver */
static void PIOS_RFM22B_ChangeBaud(uint32_t rfm22b_id, uint32_t baud);
static void PIOS_RFM22B_RegisterRxCallback(uint32_t rfm22b_id, pios_com_callback rx_in_cb, uint32_t context);
static void PIOS_RFM22B_RegisterTxCallback(uint32_t rfm22b_id, pios_com_callback tx_out_cb, uint32_t context);
static void PIOS_RFM22B_TxStart(uint32_t rfm22b_id, uint16_t tx_bytes_avail);
static void PIOS_RFM22B_RxStart(uint32_t rfm22b_id, uint16_t rx_bytes_avail);
/* Local Defines */
#define STACK_SIZE_BYTES 200
static uint8_t PIOS_RFM22B_send_packet(PHPacketHandle packet);
static void PIOS_RFM22B_receive_data(uint8_t *data, uint8_t len);
// this is too adjust the RF module so that it is on frequency
#define OSC_LOAD_CAP 0x7F // cap = 12.5pf .. default
#define OSC_LOAD_CAP_1 0x7D // board 1
#define OSC_LOAD_CAP_2 0x7B // board 2
#define OSC_LOAD_CAP_3 0x7E // board 3
#define OSC_LOAD_CAP_4 0x7F // board 4
static void PIOS_RFM22B_Timer_Callback(uint32_t dev_id);
// ************************************
const struct pios_com_driver pios_rfm22b_com_driver = {
.set_baud = PIOS_RFM22B_ChangeBaud,
.tx_start = PIOS_RFM22B_TxStart,
.rx_start = PIOS_RFM22B_RxStart,
.bind_tx_cb = PIOS_RFM22B_RegisterTxCallback,
.bind_rx_cb = PIOS_RFM22B_RegisterRxCallback,
};
#define TX_TEST_MODE_TIMELIMIT_MS 30000 // TX test modes time limit (in ms)
//#define TX_PREAMBLE_NIBBLES 8 // 7 to 511 (number of nibbles)
//#define RX_PREAMBLE_NIBBLES 5 // 5 to 31 (number of nibbles)
#define TX_PREAMBLE_NIBBLES 12 // 7 to 511 (number of nibbles)
#define RX_PREAMBLE_NIBBLES 6 // 5 to 31 (number of nibbles)
#define FIFO_SIZE 64 // the size of the rf modules internal FIFO buffers
#define TX_FIFO_HI_WATERMARK 62 // 0-63
#define TX_FIFO_LO_WATERMARK 32 // 0-63
#define RX_FIFO_HI_WATERMARK 32 // 0-63
#define PREAMBLE_BYTE 0x55 // preamble byte (preceeds SYNC_BYTE's)
#define SYNC_BYTE_1 0x2D // RF sync bytes (32-bit in all)
#define SYNC_BYTE_2 0xD4 //
#define SYNC_BYTE_3 0x4B //
#define SYNC_BYTE_4 0x59 //
// ************************************
// the default TX power level
#define RFM22_DEFAULT_RF_POWER RFM22_tx_pwr_txpow_0 // +1dBm ... 1.25mW
//#define RFM22_DEFAULT_RF_POWER RFM22_tx_pwr_txpow_1 // +2dBm ... 1.6mW
//#define RFM22_DEFAULT_RF_POWER RFM22_tx_pwr_txpow_2 // +5dBm ... 3.16mW
//#define RFM22_DEFAULT_RF_POWER RFM22_tx_pwr_txpow_3 // +8dBm ... 6.3mW
//#define RFM22_DEFAULT_RF_POWER RFM22_tx_pwr_txpow_4 // +11dBm .. 12.6mW
//#define RFM22_DEFAULT_RF_POWER RFM22_tx_pwr_txpow_5 // +14dBm .. 25mW
//#define RFM22_DEFAULT_RF_POWER RFM22_tx_pwr_txpow_6 // +17dBm .. 50mW
//#define RFM22_DEFAULT_RF_POWER RFM22_tx_pwr_txpow_7 // +20dBm .. 100mW
// ************************************
// the default RF datarate
//#define RFM22_DEFAULT_RF_DATARATE 500 // 500 bits per sec
//#define RFM22_DEFAULT_RF_DATARATE 1000 // 1k bits per sec
//#define RFM22_DEFAULT_RF_DATARATE 2000 // 2k bits per sec
//#define RFM22_DEFAULT_RF_DATARATE 4000 // 4k bits per sec
//#define RFM22_DEFAULT_RF_DATARATE 8000 // 8k bits per sec
//#define RFM22_DEFAULT_RF_DATARATE 9600 // 9.6k bits per sec
//#define RFM22_DEFAULT_RF_DATARATE 16000 // 16k bits per sec
//#define RFM22_DEFAULT_RF_DATARATE 19200 // 19k2 bits per sec
//#define RFM22_DEFAULT_RF_DATARATE 24000 // 24k bits per sec
//#define RFM22_DEFAULT_RF_DATARATE 32000 // 32k bits per sec
//#define RFM22_DEFAULT_RF_DATARATE 64000 // 64k bits per sec
#define RFM22_DEFAULT_RF_DATARATE 128000 // 128k bits per sec
//#define RFM22_DEFAULT_RF_DATARATE 192000 // 192k bits per sec
//#define RFM22_DEFAULT_RF_DATARATE 256000 // 256k bits per sec .. NOT YET WORKING
// ************************************
#define RFM22_DEFAULT_SS_RF_DATARATE 125 // 128bps
// ************************************
// Normal data streaming
// GFSK modulation
// no manchester encoding
// data whitening
// FIFO mode
// 5-nibble rx preamble length detection
// 10-nibble tx preamble length
// AFC enabled
#define LOOKUP_SIZE 14
/* Local type definitions */
enum pios_rfm22b_dev_magic {
PIOS_RFM22B_DEV_MAGIC = 0x68e971b6,
};
@ -65,7 +148,9 @@ struct pios_rfm22b_dev {
enum pios_rfm22b_dev_magic magic;
const struct pios_rfm22b_cfg *cfg;
uint32_t countdown_timer;
xTaskHandle taskHandle;
uint32_t countdownTimer;
pios_com_callback rx_in_cb;
uint32_t rx_in_context;
@ -76,6 +161,189 @@ struct pios_rfm22b_dev {
PHPacketHandle cur_tx_packet;
};
uint32_t random32 = 0x459ab8d8;
/* Local function forwared declarations */
static uint8_t PIOS_RFM22B_send_packet(void *rfm22b, PHPacketHandle packet);
static void PIOS_RFM22B_receive_data(void *rfm22b, uint8_t *data, uint8_t len);
static void PIOS_RFM22B_Task(void *parameters);
void rfm22_processInt(void);
/* Provide a COM driver */
static void PIOS_RFM22B_ChangeBaud(uint32_t rfm22b_id, uint32_t baud);
static void PIOS_RFM22B_RegisterRxCallback(uint32_t rfm22b_id, pios_com_callback rx_in_cb, uint32_t context);
static void PIOS_RFM22B_RegisterTxCallback(uint32_t rfm22b_id, pios_com_callback tx_out_cb, uint32_t context);
static void PIOS_RFM22B_TxStart(uint32_t rfm22b_id, uint16_t tx_bytes_avail);
static void PIOS_RFM22B_RxStart(uint32_t rfm22b_id, uint16_t rx_bytes_avail);
/* Local variables */
const struct pios_com_driver pios_rfm22b_com_driver = {
.set_baud = PIOS_RFM22B_ChangeBaud,
.tx_start = PIOS_RFM22B_TxStart,
.rx_start = PIOS_RFM22B_RxStart,
.bind_tx_cb = PIOS_RFM22B_RegisterTxCallback,
.bind_rx_cb = PIOS_RFM22B_RegisterRxCallback,
};
// xtal 10 ppm, 434MHz
const uint32_t data_rate[LOOKUP_SIZE] = { 500, 1000, 2000, 4000, 8000, 9600, 16000, 19200, 24000, 32000, 64000, 128000, 192000, 256000};
const uint8_t modulation_index[LOOKUP_SIZE] = { 16, 8, 4, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1};
const uint32_t freq_deviation[LOOKUP_SIZE] = { 4000, 4000, 4000, 4000, 4000, 4800, 8000, 9600, 12000, 16000, 32000, 64000, 96000, 128000};
const uint32_t rx_bandwidth[LOOKUP_SIZE] = { 17500, 17500, 17500, 17500, 17500, 19400, 32200, 38600, 51200, 64100, 137900, 269300, 420200, 518800};
const int8_t est_rx_sens_dBm[LOOKUP_SIZE] = { -118, -118, -117, -116, -115, -115, -112, -112, -110, -109, -106, -103, -101, -100}; // estimated receiver sensitivity for BER = 1E-3
const uint8_t reg_1C[LOOKUP_SIZE] = { 0x37, 0x37, 0x37, 0x37, 0x3A, 0x3B, 0x26, 0x28, 0x2E, 0x16, 0x07, 0x83, 0x8A, 0x8C}; // rfm22_if_filter_bandwidth
const uint8_t reg_1D[LOOKUP_SIZE] = { 0x44, 0x44, 0x44, 0x44, 0x44, 0x44, 0x44, 0x44, 0x44, 0x44, 0x44, 0x44, 0x44, 0x44}; // rfm22_afc_loop_gearshift_override
const uint8_t reg_1E[LOOKUP_SIZE] = { 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x02}; // rfm22_afc_timing_control
const uint8_t reg_1F[LOOKUP_SIZE] = { 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03}; // rfm22_clk_recovery_gearshift_override
const uint8_t reg_20[LOOKUP_SIZE] = { 0xE8, 0xF4, 0xFA, 0x70, 0x3F, 0x34, 0x3F, 0x34, 0x2A, 0x3F, 0x3F, 0x5E, 0x3F, 0x2F}; // rfm22_clk_recovery_oversampling_ratio
const uint8_t reg_21[LOOKUP_SIZE] = { 0x60, 0x20, 0x00, 0x01, 0x02, 0x02, 0x02, 0x02, 0x03, 0x02, 0x02, 0x01, 0x02, 0x02}; // rfm22_clk_recovery_offset2
const uint8_t reg_22[LOOKUP_SIZE] = { 0x20, 0x41, 0x83, 0x06, 0x0C, 0x75, 0x0C, 0x75, 0x12, 0x0C, 0x0C, 0x5D, 0x0C, 0xBB}; // rfm22_clk_recovery_offset1
const uint8_t reg_23[LOOKUP_SIZE] = { 0xC5, 0x89, 0x12, 0x25, 0x4A, 0x25, 0x4A, 0x25, 0x6F, 0x4A, 0x4A, 0x86, 0x4A, 0x0D}; // rfm22_clk_recovery_offset0
const uint8_t reg_24[LOOKUP_SIZE] = { 0x00, 0x00, 0x00, 0x02, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x05, 0x07, 0x07}; // rfm22_clk_recovery_timing_loop_gain1
const uint8_t reg_25[LOOKUP_SIZE] = { 0x0A, 0x23, 0x85, 0x0E, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x74, 0xFF, 0xFF}; // rfm22_clk_recovery_timing_loop_gain0
const uint8_t reg_2A[LOOKUP_SIZE] = { 0x0E, 0x0E, 0x0E, 0x0E, 0x0E, 0x0D, 0x0D, 0x0E, 0x12, 0x17, 0x31, 0x50, 0x50, 0x50}; // rfm22_afc_limiter .. AFC_pull_in_range = ±AFCLimiter[7:0] x (hbsel+1) x 625 Hz
const uint8_t reg_6E[LOOKUP_SIZE] = { 0x04, 0x08, 0x10, 0x20, 0x41, 0x4E, 0x83, 0x9D, 0xC4, 0x08, 0x10, 0x20, 0x31, 0x41}; // rfm22_tx_data_rate1
const uint8_t reg_6F[LOOKUP_SIZE] = { 0x19, 0x31, 0x62, 0xC5, 0x89, 0xA5, 0x12, 0x49, 0x9C, 0x31, 0x62, 0xC5, 0x27, 0x89}; // rfm22_tx_data_rate0
const uint8_t reg_70[LOOKUP_SIZE] = { 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x0D, 0x0D, 0x0D, 0x0D, 0x0D}; // rfm22_modulation_mode_control1
const uint8_t reg_71[LOOKUP_SIZE] = { 0x23, 0x23, 0x23, 0x23, 0x23, 0x23, 0x23, 0x23, 0x23, 0x23, 0x23, 0x23, 0x23, 0x23}; // rfm22_modulation_mode_control2
const uint8_t reg_72[LOOKUP_SIZE] = { 0x06, 0x06, 0x06, 0x06, 0x06, 0x08, 0x0D, 0x0F, 0x13, 0x1A, 0x33, 0x66, 0x9A, 0xCD}; // rfm22_frequency_deviation
// ************************************
// Scan Spectrum settings
// GFSK modulation
// no manchester encoding
// data whitening
// FIFO mode
// 5-nibble rx preamble length detection
// 10-nibble tx preamble length
// AFC disabled
#define SS_LOOKUP_SIZE 2
// xtal 1 ppm, 434MHz
const uint32_t ss_rx_bandwidth[SS_LOOKUP_SIZE] = { 2600, 10600};
const uint8_t ss_reg_1C[SS_LOOKUP_SIZE] = { 0x51, 0x32}; // rfm22_if_filter_bandwidth
const uint8_t ss_reg_1D[SS_LOOKUP_SIZE] = { 0x00, 0x00}; // rfm22_afc_loop_gearshift_override
const uint8_t ss_reg_20[SS_LOOKUP_SIZE] = { 0xE8, 0x38}; // rfm22_clk_recovery_oversampling_ratio
const uint8_t ss_reg_21[SS_LOOKUP_SIZE] = { 0x60, 0x02}; // rfm22_clk_recovery_offset2
const uint8_t ss_reg_22[SS_LOOKUP_SIZE] = { 0x20, 0x4D}; // rfm22_clk_recovery_offset1
const uint8_t ss_reg_23[SS_LOOKUP_SIZE] = { 0xC5, 0xD3}; // rfm22_clk_recovery_offset0
const uint8_t ss_reg_24[SS_LOOKUP_SIZE] = { 0x00, 0x07}; // rfm22_clk_recovery_timing_loop_gain1
const uint8_t ss_reg_25[SS_LOOKUP_SIZE] = { 0x0F, 0xFF}; // rfm22_clk_recovery_timing_loop_gain0
const uint8_t ss_reg_2A[SS_LOOKUP_SIZE] = { 0xFF, 0xFF}; // rfm22_afc_limiter .. AFC_pull_in_range = ±AFCLimiter[7:0] x (hbsel+1) x 625 Hz
const uint8_t ss_reg_70[SS_LOOKUP_SIZE] = { 0x24, 0x2D}; // rfm22_modulation_mode_control1
const uint8_t ss_reg_71[SS_LOOKUP_SIZE] = { 0x2B, 0x23}; // rfm22_modulation_mode_control2
// ************************************
volatile bool initialized = false;
#if defined(RFM22_EXT_INT_USE)
volatile bool exec_using_spi; // set this if you want to access the SPI bus outside of the interrupt
volatile bool inside_ext_int; // this is set whenever we are inside the interrupt
#endif
uint8_t device_type; // the RF chips device ID number
uint8_t device_version; // the RF chips revision number
volatile uint8_t rf_mode; // holds our current RF mode
uint32_t lower_carrier_frequency_limit_Hz; // the minimum RF frequency we can use
uint32_t upper_carrier_frequency_limit_Hz; // the maximum RF frequency we can use
uint32_t carrier_frequency_hz; // the current RF frequency we are on
uint32_t carrier_datarate_bps; // the RF data rate we are using
uint32_t rf_bandwidth_used; // the RF bandwidth currently used
uint32_t ss_rf_bandwidth_used; // the RF bandwidth currently used
uint8_t hbsel; // holds the hbsel (1 or 2)
float frequency_step_size; // holds the minimum frequency step size
uint8_t frequency_hop_channel; // current frequency hop channel
uint8_t frequency_hop_step_size_reg; //
uint8_t adc_config; // holds the adc config reg value
volatile uint8_t device_status; // device status register
volatile uint8_t int_status1; // interrupt status register 1
volatile uint8_t int_status2; // interrupt status register 2
volatile uint8_t ezmac_status; // ezmac status register
volatile int16_t afc_correction; // afc correction reading
volatile int32_t afc_correction_Hz; // afc correction reading (in Hz)
volatile int16_t temperature_reg; // the temperature sensor reading
#if defined(RFM22_DEBUG)
volatile uint8_t prev_device_status; // just for debugging
volatile uint8_t prev_int_status1; // " "
volatile uint8_t prev_int_status2; // " "
volatile uint8_t prev_ezmac_status; // " "
bool debug_outputted;
#endif
volatile uint8_t osc_load_cap; // xtal frequency calibration value
volatile uint8_t rssi; // the current RSSI (register value)
volatile int16_t rssi_dBm; // dBm value
uint8_t tx_power; // the transmit power to use for data transmissions
volatile uint8_t tx_pwr; // the tx power register read back
volatile uint8_t rx_buffer_current; // the current receive buffer in use (double buffer)
volatile uint8_t rx_buffer[256] __attribute__ ((aligned(4))); // the receive buffer .. received packet data is saved here
volatile uint16_t rx_buffer_wr; // the receive buffer write index
volatile uint8_t rx_packet_buf[256] __attribute__ ((aligned(4))); // the received packet
volatile uint16_t rx_packet_wr; // the receive packet write index
volatile int16_t rx_packet_start_rssi_dBm; //
volatile int32_t rx_packet_start_afc_Hz; //
volatile int16_t rx_packet_rssi_dBm; // the received packet signal strength
volatile int32_t rx_packet_afc_Hz; // the receive packet frequency offset
volatile uint8_t *tx_data_addr; // the address of the data we send in the transmitted packets
volatile uint16_t tx_data_rd; // the tx data read index
volatile uint16_t tx_data_wr; // the tx data write index
//volatile uint8_t tx_fifo[FIFO_SIZE]; //
volatile uint8_t rx_fifo[FIFO_SIZE]; //
volatile uint8_t rx_fifo_wr; //
int lookup_index;
int ss_lookup_index;
volatile bool power_on_reset; // set if the RF module has reset itself
volatile uint16_t rfm22_int_timer; // used to detect if the RF module stops responding. thus act accordingly if it does stop responding.
volatile uint16_t rfm22_int_time_outs; // counter
volatile uint16_t prev_rfm22_int_time_outs; //
uint32_t clear_channel_count = (TX_PREAMBLE_NIBBLES + 4) * 2; // minimum clear channel time before allowing transmit
uint16_t timeout_ms = 20000; //
uint16_t timeout_sync_ms = 3; //
uint16_t timeout_data_ms = 20; //
t_rfm22_TxDataByteCallback tx_data_byte_callback_function = NULL;
t_rfm22_RxDataCallback rx_data_callback_function = NULL;
static bool PIOS_RFM22B_validate(struct pios_rfm22b_dev * rfm22b_dev)
{
return (rfm22b_dev->magic == PIOS_RFM22B_DEV_MAGIC);
@ -99,9 +367,8 @@ static struct pios_rfm22b_dev * PIOS_RFM22B_alloc(void)
{
struct pios_rfm22b_dev * rfm22b_dev;
if (pios_rfm22b_num_devs >= PIOS_RFM22B_MAX_DEVS) {
return (NULL);
}
if (pios_rfm22b_num_devs >= PIOS_RFM22B_MAX_DEVS)
return NULL;
rfm22b_dev = &pios_rfm22b_devs[pios_rfm22b_num_devs++];
rfm22b_dev->magic = PIOS_RFM22B_DEV_MAGIC;
@ -111,8 +378,8 @@ static struct pios_rfm22b_dev * PIOS_RFM22B_alloc(void)
#endif
/**
* Initialise an RFM22B device
*/
* Initialise an RFM22B device
*/
int32_t PIOS_RFM22B_Init(uint32_t *rfm22b_id, const struct pios_rfm22b_cfg *cfg)
{
PIOS_DEBUG_Assert(rfm22b_id);
@ -133,6 +400,7 @@ int32_t PIOS_RFM22B_Init(uint32_t *rfm22b_id, const struct pios_rfm22b_cfg *cfg)
.txWinSize = cfg->txWinSize,
.maxConnections = cfg->maxConnections,
.id = cfg->id,
.dev = (void*) rfm22b_dev,
.output_stream = PIOS_RFM22B_send_packet,
.set_baud = 0,
.data_handler = PIOS_RFM22B_receive_data,
@ -140,15 +408,60 @@ int32_t PIOS_RFM22B_Init(uint32_t *rfm22b_id, const struct pios_rfm22b_cfg *cfg)
};
rfm22b_dev->packet_handler = PHInitialize(&phcfg);
rfm22b_dev->cur_tx_packet = 0;
// Configure the countdown timer and register the tick callback.
rfm22b_dev->countdown_timer = (uint32_t)((float)(rfm22b_dev->cfg->sendTimeout) / 0.625);
if (!PIOS_RTC_RegisterTickCallback(PIOS_RFM22B_Timer_Callback, (uint32_t)rfm22b_dev)) {
PIOS_DEBUG_Assert(0);
}
*rfm22b_id = (uint32_t)rfm22b_dev;
// Initialize the radio device.
PIOS_COM_SendString(PIOS_COM_DEBUG, "Init Radio\n\r");
int initval = rfm22_init_normal(cfg->minFrequencyHz, cfg->maxFrequencyHz, 50000);
if (initval < 0)
{
// RF module error .. flash the LED's
#if defined(PIOS_COM_DEBUG)
DEBUG_PRINTF(2, "RF ERROR res: %d\n\r\n\r", initval);
#endif
for(unsigned int j = 0; j < 16; j++)
{
USB_LED_ON;
LINK_LED_ON;
RX_LED_OFF;
TX_LED_OFF;
PIOS_DELAY_WaitmS(200);
USB_LED_OFF;
LINK_LED_OFF;
RX_LED_ON;
TX_LED_ON;
PIOS_DELAY_WaitmS(200);
#if defined(PIOS_INCLUDE_WDG)
processWatchdog();
#endif
}
PIOS_DELAY_WaitmS(1000);
return initval;
}
rfm22_setFreqCalibration(cfg->RFXtalCap);
rfm22_setNominalCarrierFrequency(cfg->frequencyHz);
rfm22_setDatarate(cfg->maxRFBandwidth, TRUE);
rfm22_setTxPower(cfg->maxTxPower);
DEBUG_PRINTF(2, "\n\r");
DEBUG_PRINTF(2, "RF datarate: %dbps\n\r", rfm22_getDatarate());
DEBUG_PRINTF(2, "RF frequency: %dHz\n\r", rfm22_getNominalCarrierFrequency());
DEBUG_PRINTF(2, "RF TX power: %d\n\r", rfm22_getTxPower());
// Start the data handeling task.
xTaskCreate(PIOS_RFM22B_Task, (signed char *)"RFM22BTask", STACK_SIZE_BYTES, (void*)rfm22b_dev, tskIDLE_PRIORITY + 2, &(rfm22b_dev->taskHandle));
return(0);
}
@ -164,45 +477,16 @@ static void PIOS_RFM22B_RxStart(uint32_t rfm22b_id, uint16_t rx_bytes_avail)
static void PIOS_RFM22B_TxStart(uint32_t rfm22b_id, uint16_t tx_bytes_avail)
{
struct pios_rfm22b_dev * rfm22b_dev = (struct pios_rfm22b_dev *)rfm22b_id;
bool valid = PIOS_RFM22B_validate(rfm22b_dev);
PIOS_Assert(valid);
// Get a TX packet if necessary
PHPacketHandle p = rfm22b_dev->cur_tx_packet;
if (p == NULL) {
p = PHGetTXPacket(rfm22b_dev->packet_handler);
// If we couldn't get a packet, we can't transmit anything.
if (!p)
return;
// Initialize the packet.
p->header.type = PACKET_TYPE_DATA;
p->header.data_size = 0;
rfm22b_dev->cur_tx_packet = p;
}
// Get some data.
bool need_yield = false;
uint16_t bytes_to_send = (rfm22b_dev->tx_out_cb)(rfm22b_dev->tx_out_context, p->data + p->header.data_size, PH_MAX_DATA - p->header.data_size, NULL, &need_yield);
p->header.data_size += bytes_to_send;
// Send the packet if the data size is over the minimum threshold.
if (p->header.data_size >= rfm22b_dev->cfg->minPacketSize) {
PHTransmitPacket(rfm22b_dev->packet_handler, p);
rfm22b_dev->cur_tx_packet = NULL;
// Reset the countdown timer.
rfm22b_dev->countdown_timer = (uint32_t)((float)(rfm22b_dev->cfg->sendTimeout) / 0.625);
}
}
/**
* Changes the baud rate of the RFM22B peripheral without re-initialising.
* \param[in] rfm22b_id RFM22B name (GPS, TELEM, AUX)
* \param[in] baud Requested baud rate
*/
* Changes the baud rate of the RFM22B peripheral without re-initialising.
* \param[in] rfm22b_id RFM22B name (GPS, TELEM, AUX)
* \param[in] baud Requested baud rate
*/
static void PIOS_RFM22B_ChangeBaud(uint32_t rfm22b_id, uint32_t baud)
{
struct pios_rfm22b_dev * rfm22b_dev = (struct pios_rfm22b_dev *)rfm22b_id;
@ -242,58 +526,2326 @@ static void PIOS_RFM22B_RegisterTxCallback(uint32_t rfm22b_id, pios_com_callback
rfm22b_dev->tx_out_cb = tx_out_cb;
}
static uint8_t PIOS_RFM22B_send_packet(PHPacketHandle packet)
static uint8_t PIOS_RFM22B_send_packet(void *rfm22b, PHPacketHandle packet)
{
PIOS_COM_SendBuffer(PIOS_COM_RADIO_TEMP, packet->data, packet->header.data_size);
return 1;
//struct pios_rfm22b_dev * rfm22b_dev = (struct pios_rfm22b_dev *)rfm22b;
uint16_t len = packet->header.data_size + sizeof(PHPacketHeader);
DEBUG_PRINTF(1, "Sending: %d %d %x\n\r", len, packet->header.data_size, (int)(packet->data[0]));
return rfm22_sendData(packet, len, 1);
}
static void PIOS_RFM22B_receive_data(uint8_t *data, uint8_t len)
static void PIOS_RFM22B_receive_data(void *rfm22b, uint8_t *data, uint8_t len)
{
}
static void PIOS_RFM22B_Timer_Callback(uint32_t dev_id) {
/* Recover our device context */
struct pios_rfm22b_dev *rfm22b_dev = (struct pios_rfm22b_dev *)dev_id;
if (!PIOS_RFM22B_validate(rfm22b_dev)) {
/* Invalid device specified */
return;
}
struct pios_rfm22b_dev * rfm22b_dev = (struct pios_rfm22b_dev *)rfm22b;
DEBUG_PRINTF(1, "Data: %d %x\n\r", len, (int)(data[0]));
// Pass the received data the the receive callback.
bool need_yield = false;
if (rfm22b_dev->rx_in_cb) {
uint8_t buf[16];
uint32_t rx_bytes = PIOS_COM_ReceiveBuffer(PIOS_COM_RADIO_TEMP, buf, 16, 0);
if (rx_bytes > 0)
(rfm22b_dev->rx_in_cb)(rfm22b_dev->rx_in_context, buf, rx_bytes, NULL, &need_yield);
}
if (rfm22b_dev->rx_in_cb)
(rfm22b_dev->rx_in_cb)(rfm22b_dev->rx_in_context, data, len, NULL, &need_yield);
#if defined(PIOS_INCLUDE_FREERTOS)
if (need_yield)
vPortYieldFromISR();
#endif /* PIOS_INCLUDE_FREERTOS */
}
/*
* RTC runs at 625Hz.
*/
if(--rfm22b_dev->countdown_timer > 0)
return;
rfm22b_dev->countdown_timer = (uint32_t)((float)(rfm22b_dev->cfg->sendTimeout) / 0.625);
static void PIOS_RFM22B_Task(void *parameters)
{
struct pios_rfm22b_dev * rfm22b_dev = (struct pios_rfm22b_dev *)parameters;
bool valid = PIOS_RFM22B_validate(rfm22b_dev);
PIOS_Assert(valid);
// Send the current packet if there is one.
if (rfm22b_dev->cur_tx_packet) {
PHTransmitPacket(rfm22b_dev->packet_handler, rfm22b_dev->cur_tx_packet);
rfm22b_dev->cur_tx_packet = NULL;
// Loop forever
while (1)
{
// Recieve data to transmit if it's available.
// Reserve a TX packet if necessary
PHPacketHandle p = rfm22b_dev->cur_tx_packet;
bool reserve = (p == NULL);
if (reserve)
{
if((p = PHReserveTXPacket(rfm22b_dev->packet_handler)))
p->header.data_size = 0;
}
// Do we have a packet to receive into?
if (p != NULL)
{
// Try to get some data.
bool need_yield = false;
uint16_t bytes_to_send = (rfm22b_dev->tx_out_cb)(rfm22b_dev->tx_out_context, p->data + p->header.data_size, PH_MAX_DATA - p->header.data_size, NULL, &need_yield);
p->header.data_size += bytes_to_send;
// Did we just reserve this packet?
if (reserve)
{
if(bytes_to_send == 0)
{
// If there's no data available, just unlock our reserve on the packet.
PHReleaseLock(p, 0);
p = NULL;
}
else
{
// Keep the packet and release the lock.
PHReleaseLock(p, 1);
// Set the time so that we will send this data at least by the send timout.
rfm22b_dev->countdownTimer = rfm22b_dev->cfg->sendTimeout;
// Initialize the packet.
p->header.type = PACKET_TYPE_DATA;
rfm22b_dev->cur_tx_packet = p;
}
}
}
// Do we have data to send?
if (p != NULL)
{
// Send the packet if the data size is over the minimum threshold
// or if this packet is older than the send timeout.
if((p->header.data_size >= rfm22b_dev->cfg->minPacketSize) || (rfm22b_dev->countdownTimer == 0))
{
// Transmit the packet
PHTransmitPacket(rfm22b_dev->packet_handler, p);
// Clear our link to the old packet.
rfm22b_dev->cur_tx_packet = NULL;
}
else
// Decrement the packet timer if we didn't send the packet.
rfm22b_dev->countdownTimer--;
}
rfm22_process();
// See if a packet was received.
uint16_t packet_size = rfm22_receivedLength();
if (packet_size != 0)
{
// copy the received packet into our own buffer
// Get the receive packet buffer.
PHPacketHandle p = PHGetRXPacket(rfm22b_dev->packet_handler);
memmove(p, rfm22_receivedPointer(), packet_size);
DEBUG_PRINTF(1, "Received: %d %d\n\r", packet_size, p->header.data_size);
// Process the received packet with the packet handler.
PHReceivePacket(rfm22b_dev->packet_handler, p);
// the received packet has been saved
rfm22_receivedDone();
}
vTaskDelay(1);
}
}
// ************************************
// SPI read/write
void rfm22_startBurstWrite(uint8_t addr)
{
// wait 1us .. so we don't toggle the CS line to quickly
PIOS_DELAY_WaituS(1);
// chip select line LOW
PIOS_SPI_RC_PinSet(RFM22_PIOS_SPI, 0);
PIOS_SPI_TransferByte(RFM22_PIOS_SPI, 0x80 | addr);
}
inline void rfm22_burstWrite(uint8_t data)
{
PIOS_SPI_TransferByte(RFM22_PIOS_SPI, data);
}
void rfm22_endBurstWrite(void)
{
// chip select line HIGH
PIOS_SPI_RC_PinSet(RFM22_PIOS_SPI, 1);
}
void rfm22_write(uint8_t addr, uint8_t data)
{
// wait 1us .. so we don't toggle the CS line to quickly
PIOS_DELAY_WaituS(1);
// chip select line LOW
PIOS_SPI_RC_PinSet(RFM22_PIOS_SPI, 0);
PIOS_SPI_TransferByte(RFM22_PIOS_SPI, 0x80 | addr);
PIOS_SPI_TransferByte(RFM22_PIOS_SPI, data);
// chip select line HIGH
PIOS_SPI_RC_PinSet(RFM22_PIOS_SPI, 1);
}
void rfm22_startBurstRead(uint8_t addr)
{
// wait 1us .. so we don't toggle the CS line to quickly
PIOS_DELAY_WaituS(1);
// chip select line LOW
PIOS_SPI_RC_PinSet(RFM22_PIOS_SPI, 0);
PIOS_SPI_TransferByte(RFM22_PIOS_SPI, addr & 0x7f);
}
inline uint8_t rfm22_burstRead(void)
{
return PIOS_SPI_TransferByte(RFM22_PIOS_SPI, 0xff);
}
void rfm22_endBurstRead(void)
{
// chip select line HIGH
PIOS_SPI_RC_PinSet(RFM22_PIOS_SPI, 1);
}
uint8_t rfm22_read(uint8_t addr)
{
uint8_t rdata;
// wait 1us .. so we don't toggle the CS line to quickly
PIOS_DELAY_WaituS(1);
// chip select line LOW
PIOS_SPI_RC_PinSet(RFM22_PIOS_SPI, 0);
PIOS_SPI_TransferByte(RFM22_PIOS_SPI, addr & 0x7f);
rdata = PIOS_SPI_TransferByte(RFM22_PIOS_SPI, 0xff);
// chip select line HIGH
PIOS_SPI_RC_PinSet(RFM22_PIOS_SPI, 1);
return rdata;
}
// ************************************
// external interrupt
#if defined(RFM22_EXT_INT_USE)
void RFM22_EXT_INT_FUNC(void)
{
inside_ext_int = TRUE;
if (EXTI_GetITStatus(RFM22_EXT_INT_LINE) != RESET)
{
// Clear the EXTI line pending bit
EXTI_ClearITPendingBit(RFM22_EXT_INT_LINE);
// USB_LED_TOGGLE; // TEST ONLY
if (!exec_using_spi)
{
// while (!GPIO_IN(RF_INT_PIN) && !exec_using_spi)
{
// stay here until the interrupt line returns HIGH
rfm22_processInt();
}
}
}
inside_ext_int = FALSE;
}
void rfm22_disableExtInt(void)
{
// Configure the external interrupt
GPIO_EXTILineConfig(RFM22_EXT_INT_PORT_SOURCE, RFM22_EXT_INT_PIN_SOURCE);
EXTI_InitTypeDef EXTI_InitStructure;
EXTI_InitStructure.EXTI_Line = RFM22_EXT_INT_LINE;
EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling;
EXTI_InitStructure.EXTI_LineCmd = DISABLE;
EXTI_Init(&EXTI_InitStructure);
EXTI_ClearFlag(RFM22_EXT_INT_LINE);
}
void rfm22_enableExtInt(void)
{
// Configure the external interrupt
GPIO_EXTILineConfig(RFM22_EXT_INT_PORT_SOURCE, RFM22_EXT_INT_PIN_SOURCE);
EXTI_InitTypeDef EXTI_InitStructure;
EXTI_InitStructure.EXTI_Line = RFM22_EXT_INT_LINE;
EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling;
EXTI_InitStructure.EXTI_LineCmd = ENABLE;
EXTI_Init(&EXTI_InitStructure);
EXTI_ClearFlag(RFM22_EXT_INT_LINE);
// Enable and set the external interrupt
NVIC_InitTypeDef NVIC_InitStructure;
NVIC_InitStructure.NVIC_IRQChannel = RFM22_EXT_INT_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = RFM22_EXT_INT_PRIORITY;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
}
#endif
// ************************************
// set/get the current tx power setting
void rfm22_setTxPower(uint8_t tx_pwr)
{
switch (tx_pwr)
{
case 0: tx_power = RFM22_tx_pwr_txpow_0; break; // +1dBm ... 1.25mW
case 1: tx_power = RFM22_tx_pwr_txpow_1; break; // +2dBm ... 1.6mW
case 2: tx_power = RFM22_tx_pwr_txpow_2; break; // +5dBm ... 3.16mW
case 3: tx_power = RFM22_tx_pwr_txpow_3; break; // +8dBm ... 6.3mW
case 4: tx_power = RFM22_tx_pwr_txpow_4; break; // +11dBm .. 12.6mW
case 5: tx_power = RFM22_tx_pwr_txpow_5; break; // +14dBm .. 25mW
case 6: tx_power = RFM22_tx_pwr_txpow_6; break; // +17dBm .. 50mW
case 7: tx_power = RFM22_tx_pwr_txpow_7; break; // +20dBm .. 100mW
default: break;
}
}
uint8_t rfm22_getTxPower(void)
{
return tx_power;
}
// ************************************
uint32_t rfm22_minFrequency(void)
{
return lower_carrier_frequency_limit_Hz;
}
uint32_t rfm22_maxFrequency(void)
{
return upper_carrier_frequency_limit_Hz;
}
void rfm22_setNominalCarrierFrequency(uint32_t frequency_hz)
{
#if defined(RFM22_EXT_INT_USE)
exec_using_spi = TRUE;
#endif
// *******
if (frequency_hz < lower_carrier_frequency_limit_Hz) frequency_hz = lower_carrier_frequency_limit_Hz;
else
if (frequency_hz > upper_carrier_frequency_limit_Hz) frequency_hz = upper_carrier_frequency_limit_Hz;
if (frequency_hz < 480000000)
hbsel = 1;
else
hbsel = 2;
uint8_t fb = (uint8_t)(frequency_hz / (10000000 * hbsel));
uint32_t fc = (uint32_t)(frequency_hz - (10000000 * hbsel * fb));
fc = (fc * 64u) / (10000ul * hbsel);
fb -= 24;
// carrier_frequency_hz = frequency_hz;
carrier_frequency_hz = ((uint32_t)fb + 24 + ((float)fc / 64000)) * 10000000 * hbsel;
if (hbsel > 1)
fb |= RFM22_fbs_hbsel;
fb |= RFM22_fbs_sbse; // is this the RX LO polarity?
frequency_step_size = 156.25f * hbsel;
rfm22_write(RFM22_frequency_hopping_channel_select, frequency_hop_channel); // frequency hopping channel (0-255)
rfm22_write(RFM22_frequency_offset1, 0); // no frequency offset
rfm22_write(RFM22_frequency_offset2, 0); // no frequency offset
rfm22_write(RFM22_frequency_band_select, fb); // set the carrier frequency
rfm22_write(RFM22_nominal_carrier_frequency1, fc >> 8); // " "
rfm22_write(RFM22_nominal_carrier_frequency0, fc & 0xff); // " "
// *******
#if defined(RFM22_DEBUG)
DEBUG_PRINTF(2, "rf setFreq: %u\n\r", carrier_frequency_hz);
// DEBUG_PRINTF(2, "rf setFreq frequency_step_size: %0.2f\n\r", frequency_step_size);
#endif
#if defined(RFM22_EXT_INT_USE)
exec_using_spi = FALSE;
#endif
}
uint32_t rfm22_getNominalCarrierFrequency(void)
{
return carrier_frequency_hz;
}
float rfm22_getFrequencyStepSize(void)
{
return frequency_step_size;
}
void rfm22_setFreqHopChannel(uint8_t channel)
{ // set the frequency hopping channel
frequency_hop_channel = channel;
rfm22_write(RFM22_frequency_hopping_channel_select, frequency_hop_channel);
}
uint8_t rfm22_freqHopChannel(void)
{ // return the current frequency hopping channel
return frequency_hop_channel;
}
uint32_t rfm22_freqHopSize(void)
{ // return the frequency hopping step size
return ((uint32_t)frequency_hop_step_size_reg * 10000);
}
// ************************************
// radio datarate about 19200 Baud
// radio frequency deviation 45kHz
// radio receiver bandwidth 67kHz.
//
// Carson's rule:
// The signal bandwidth is about 2(Delta-f + fm) ..
//
// Delta-f = frequency deviation
// fm = maximum frequency of the signal
//
// This gives 2(45 + 9.6) = 109.2kHz.
void rfm22_setDatarate(uint32_t datarate_bps, bool data_whitening)
{
#if defined(RFM22_EXT_INT_USE)
exec_using_spi = TRUE;
#endif
// *******
lookup_index = 0;
while (lookup_index < (LOOKUP_SIZE - 1) && data_rate[lookup_index] < datarate_bps)
lookup_index++;
carrier_datarate_bps = datarate_bps = data_rate[lookup_index];
rf_bandwidth_used = rx_bandwidth[lookup_index];
// ********************************
#if defined(RFM22_DEBUG)
uint32_t frequency_deviation = freq_deviation[lookup_index]; // Hz
uint32_t modulation_bandwidth = datarate_bps + (2 * frequency_deviation);
#endif
rfm22_write(0x1C, reg_1C[lookup_index]); // rfm22_if_filter_bandwidth
rfm22_write(0x1D, reg_1D[lookup_index]); // rfm22_afc_loop_gearshift_override
rfm22_write(0x1E, reg_1E[lookup_index]); // RFM22_afc_timing_control
rfm22_write(0x1F, reg_1F[lookup_index]); // RFM22_clk_recovery_gearshift_override
rfm22_write(0x20, reg_20[lookup_index]); // rfm22_clk_recovery_oversampling_ratio
rfm22_write(0x21, reg_21[lookup_index]); // rfm22_clk_recovery_offset2
rfm22_write(0x22, reg_22[lookup_index]); // rfm22_clk_recovery_offset1
rfm22_write(0x23, reg_23[lookup_index]); // rfm22_clk_recovery_offset0
rfm22_write(0x24, reg_24[lookup_index]); // rfm22_clk_recovery_timing_loop_gain1
rfm22_write(0x25, reg_25[lookup_index]); // rfm22_clk_recovery_timing_loop_gain0
rfm22_write(0x2A, reg_2A[lookup_index]); // rfm22_afc_limiter
if (carrier_datarate_bps < 100000)
rfm22_write(0x58, 0x80); // rfm22_chargepump_current_trimming_override
else
rfm22_write(0x58, 0xC0); // rfm22_chargepump_current_trimming_override
rfm22_write(0x6E, reg_6E[lookup_index]); // rfm22_tx_data_rate1
rfm22_write(0x6F, reg_6F[lookup_index]); // rfm22_tx_data_rate0
// Enable data whitening
// uint8_t txdtrtscale_bit = rfm22_read(RFM22_modulation_mode_control1) & RFM22_mmc1_txdtrtscale;
// rfm22_write(RFM22_modulation_mode_control1, txdtrtscale_bit | RFM22_mmc1_enwhite);
if (!data_whitening)
rfm22_write(0x70, reg_70[lookup_index] & ~RFM22_mmc1_enwhite); // rfm22_modulation_mode_control1
else
rfm22_write(0x70, reg_70[lookup_index] | RFM22_mmc1_enwhite); // rfm22_modulation_mode_control1
rfm22_write(0x71, reg_71[lookup_index]); // rfm22_modulation_mode_control2
rfm22_write(0x72, reg_72[lookup_index]); // rfm22_frequency_deviation
rfm22_write(RFM22_ook_counter_value1, 0x00);
rfm22_write(RFM22_ook_counter_value2, 0x00);
// ********************************
// calculate the TX register values
/*
uint16_t fd = frequency_deviation / 625;
uint8_t mmc1 = RFM22_mmc1_enphpwdn | RFM22_mmc1_manppol;
uint16_t txdr;
if (datarate_bps < 30000)
{
txdr = (datarate_bps * 20972) / 10000;
mmc1 |= RFM22_mmc1_txdtrtscale;
}
else
txdr = (datarate_bps * 6553) / 100000;
uint8_t mmc2 = RFM22_mmc2_dtmod_fifo | RFM22_mmc2_modtyp_gfsk; // FIFO mode, GFSK
// uint8_t mmc2 = RFM22_mmc2_dtmod_pn9 | RFM22_mmc2_modtyp_gfsk; // PN9 mode, GFSK .. TX TEST MODE
if (fd & 0x100) mmc2 |= RFM22_mmc2_fd;
rfm22_write(RFM22_frequency_deviation, fd); // set the TX peak frequency deviation
rfm22_write(RFM22_modulation_mode_control1, mmc1);
rfm22_write(RFM22_modulation_mode_control2, mmc2);
rfm22_write(RFM22_tx_data_rate1, txdr >> 8); // set the TX data rate
rfm22_write(RFM22_tx_data_rate0, txdr); // " "
*/
// ********************************
// determine a clear channel time
// initialise the stopwatch with a suitable resolution for the datarate
//STOPWATCH_init(4000000ul / carrier_datarate_bps); // set resolution to the time for 1 nibble (4-bits) at rf datarate
// ********************************
// determine suitable time-out periods
timeout_sync_ms = (8000ul * 16) / carrier_datarate_bps; // milliseconds
if (timeout_sync_ms < 3)
timeout_sync_ms = 3; // because out timer resolution is only 1ms
timeout_data_ms = (8000ul * 100) / carrier_datarate_bps; // milliseconds
if (timeout_data_ms < 3)
timeout_data_ms = 3; // because out timer resolution is only 1ms
// ********************************
#if defined(RFM22_DEBUG)
DEBUG_PRINTF(2, "rf datarate_bps: %d\n\r", datarate_bps);
DEBUG_PRINTF(2, "rf frequency_deviation: %d\n\r", frequency_deviation);
DEBUG_PRINTF(2, "rf modulation_bandwidth: %u\n\r", modulation_bandwidth);
DEBUG_PRINTF(2, "rf_rx_bandwidth[%u]: %u\n\r", lookup_index, rx_bandwidth[lookup_index]);
DEBUG_PRINTF(2, "rf est rx sensitivity[%u]: %ddBm\n\r", lookup_index, est_rx_sens_dBm[lookup_index]);
#endif
// *******
#if defined(RFM22_EXT_INT_USE)
exec_using_spi = FALSE;
#endif
}
uint32_t rfm22_getDatarate(void)
{
return carrier_datarate_bps;
}
// ************************************
void rfm22_setSSBandwidth(uint32_t bandwidth_index)
{
#if defined(RFM22_EXT_INT_USE)
exec_using_spi = TRUE;
#endif
// *******
ss_lookup_index = bandwidth_index;
ss_rf_bandwidth_used = ss_rx_bandwidth[lookup_index];
// ********************************
rfm22_write(0x1C, ss_reg_1C[ss_lookup_index]); // rfm22_if_filter_bandwidth
rfm22_write(0x1D, ss_reg_1D[ss_lookup_index]); // rfm22_afc_loop_gearshift_override
rfm22_write(0x20, ss_reg_20[ss_lookup_index]); // rfm22_clk_recovery_oversampling_ratio
rfm22_write(0x21, ss_reg_21[ss_lookup_index]); // rfm22_clk_recovery_offset2
rfm22_write(0x22, ss_reg_22[ss_lookup_index]); // rfm22_clk_recovery_offset1
rfm22_write(0x23, ss_reg_23[ss_lookup_index]); // rfm22_clk_recovery_offset0
rfm22_write(0x24, ss_reg_24[ss_lookup_index]); // rfm22_clk_recovery_timing_loop_gain1
rfm22_write(0x25, ss_reg_25[ss_lookup_index]); // rfm22_clk_recovery_timing_loop_gain0
rfm22_write(0x2A, ss_reg_2A[ss_lookup_index]); // rfm22_afc_limiter
rfm22_write(0x58, 0x80); // rfm22_chargepump_current_trimming_override
rfm22_write(0x70, ss_reg_70[ss_lookup_index]); // rfm22_modulation_mode_control1
rfm22_write(0x71, ss_reg_71[ss_lookup_index]); // rfm22_modulation_mode_control2
rfm22_write(RFM22_ook_counter_value1, 0x00);
rfm22_write(RFM22_ook_counter_value2, 0x00);
// ********************************
#if defined(RFM22_DEBUG)
DEBUG_PRINTF(2, "ss_rf_rx_bandwidth[%u]: %u\n\r", ss_lookup_index, ss_rx_bandwidth[ss_lookup_index]);
#endif
// *******
#if defined(RFM22_EXT_INT_USE)
exec_using_spi = FALSE;
#endif
}
// ************************************
void rfm22_setRxMode(uint8_t mode, bool multi_packet_mode)
{
#if defined(RFM22_EXT_INT_USE)
exec_using_spi = TRUE;
#endif
// disable interrupts
rfm22_write(RFM22_interrupt_enable1, 0x00);
rfm22_write(RFM22_interrupt_enable2, 0x00);
// disable the receiver and transmitter
// rfm22_write(RFM22_op_and_func_ctrl1, RFM22_opfc1_xton); // READY mode
rfm22_write(RFM22_op_and_func_ctrl1, RFM22_opfc1_pllon); // TUNE mode
RX_LED_OFF;
TX_LED_OFF;
// rfm22_write(RFM22_rx_fifo_control, RX_FIFO_HI_WATERMARK); // RX FIFO Almost Full Threshold (0 - 63)
if (rf_mode == TX_CARRIER_MODE || rf_mode == TX_PN_MODE)
{
// FIFO mode, GFSK modulation
uint8_t fd_bit = rfm22_read(RFM22_modulation_mode_control2) & RFM22_mmc2_fd;
rfm22_write(RFM22_modulation_mode_control2, fd_bit | RFM22_mmc2_dtmod_fifo | RFM22_mmc2_modtyp_gfsk);
}
rx_buffer_wr = 0; // empty the rx buffer
rfm22_int_timer = 0; // reset the timer
rf_mode = mode;
if (mode != RX_SCAN_SPECTRUM)
{
//STOPWATCH_reset(); // reset clear channel detect timer
// enable RX interrupts
rfm22_write(RFM22_interrupt_enable1, RFM22_ie1_encrcerror | RFM22_ie1_enpkvalid | RFM22_ie1_enrxffafull | RFM22_ie1_enfferr);
rfm22_write(RFM22_interrupt_enable2, RFM22_ie2_enpreainval | RFM22_ie2_enpreaval | RFM22_ie2_enswdet);
}
// read interrupt status - clear interrupts
rfm22_read(RFM22_interrupt_status1);
rfm22_read(RFM22_interrupt_status2);
// clear FIFOs
if (!multi_packet_mode)
{
rfm22_write(RFM22_op_and_func_ctrl2, RFM22_opfc2_ffclrrx | RFM22_opfc2_ffclrtx);
rfm22_write(RFM22_op_and_func_ctrl2, 0x00);
} else {
rfm22_write(RFM22_op_and_func_ctrl2, RFM22_opfc2_rxmpk | RFM22_opfc2_ffclrrx | RFM22_opfc2_ffclrtx);
rfm22_write(RFM22_op_and_func_ctrl2, RFM22_opfc2_rxmpk);
}
// enable the receiver
// rfm22_write(RFM22_op_and_func_ctrl1, RFM22_opfc1_xton | RFM22_opfc1_rxon);
rfm22_write(RFM22_op_and_func_ctrl1, RFM22_opfc1_pllon | RFM22_opfc1_rxon);
#if defined(RFM22_EXT_INT_USE)
exec_using_spi = FALSE;
#endif
#if defined(RFM22_DEBUG)
DEBUG_PRINTF(2, " RX Mode\n\r");
#endif
}
// ************************************
uint16_t rfm22_addHeader()
{
uint16_t i = 0;
for (uint16_t j = (TX_PREAMBLE_NIBBLES + 1) / 2; j > 0; j--)
{
rfm22_burstWrite(PREAMBLE_BYTE);
i++;
}
rfm22_burstWrite(SYNC_BYTE_1); i++;
rfm22_burstWrite(SYNC_BYTE_2); i++;
return i;
}
// ************************************
void rfm22_setTxMode(uint8_t mode)
{
if (mode != TX_DATA_MODE && mode != TX_STREAM_MODE && mode != TX_CARRIER_MODE && mode != TX_PN_MODE)
return; // invalid mode
#if defined(RFM22_EXT_INT_USE)
exec_using_spi = TRUE;
#endif
// *******************
// disable interrupts
rfm22_write(RFM22_interrupt_enable1, 0x00);
rfm22_write(RFM22_interrupt_enable2, 0x00);
// rfm22_write(RFM22_op_and_func_ctrl1, RFM22_opfc1_xton); // READY mode
rfm22_write(RFM22_op_and_func_ctrl1, RFM22_opfc1_pllon); // TUNE mode
RX_LED_OFF;
// set the tx power
// rfm22_write(RFM22_tx_power, RFM22_tx_pwr_lna_sw | tx_power);
// rfm22_write(RFM22_tx_power, RFM22_tx_pwr_papeaken | RFM22_tx_pwr_papeaklvl_0 | RFM22_tx_pwr_lna_sw | tx_power);
rfm22_write(RFM22_tx_power, RFM22_tx_pwr_papeaken | RFM22_tx_pwr_papeaklvl_1 | RFM22_tx_pwr_papeaklvl_0 | RFM22_tx_pwr_lna_sw | tx_power);
uint8_t fd_bit = rfm22_read(RFM22_modulation_mode_control2) & RFM22_mmc2_fd;
if (mode == TX_CARRIER_MODE)
// blank carrier mode - for testing
rfm22_write(RFM22_modulation_mode_control2, fd_bit | RFM22_mmc2_dtmod_pn9 | RFM22_mmc2_modtyp_none); // FIFO mode, Blank carrier
else if (mode == TX_PN_MODE)
// psuedo random data carrier mode - for testing
rfm22_write(RFM22_modulation_mode_control2, fd_bit | RFM22_mmc2_dtmod_pn9 | RFM22_mmc2_modtyp_gfsk); // FIFO mode, PN9 carrier
else
// data transmission
rfm22_write(RFM22_modulation_mode_control2, fd_bit | RFM22_mmc2_dtmod_fifo | RFM22_mmc2_modtyp_gfsk); // FIFO mode, GFSK modulation
// rfm22_write(0x72, reg_72[lookup_index]); // rfm22_frequency_deviation
// clear FIFOs
rfm22_write(RFM22_op_and_func_ctrl2, RFM22_opfc2_ffclrrx | RFM22_opfc2_ffclrtx);
rfm22_write(RFM22_op_and_func_ctrl2, 0x00);
// *******************
// add some data to the chips TX FIFO before enabling the transmitter
{
uint16_t rd = 0;
uint16_t wr = tx_data_wr;
if (!tx_data_addr) wr = 0;
if (mode == TX_DATA_MODE)
rfm22_write(RFM22_transmit_packet_length, wr); // set the total number of data bytes we are going to transmit
uint16_t max_bytes = FIFO_SIZE - 1;
uint16_t i = 0;
rfm22_startBurstWrite(RFM22_fifo_access);
if (mode == TX_STREAM_MODE) {
if (rd >= wr) {
// no data to send - yet .. just send preamble pattern
while (true) {
rfm22_burstWrite(PREAMBLE_BYTE);
if (++i >= max_bytes) break;
}
} else // add the RF heaader
i += rfm22_addHeader();
}
// add some data
for (uint16_t j = wr - rd; j > 0; j--) {
rfm22_burstWrite(tx_data_addr[rd++]);
if (++i >= max_bytes)
break;
}
rfm22_endBurstWrite();
tx_data_rd = rd;
}
// *******************
rfm22_int_timer = 0; // reset the timer
rf_mode = mode;
// enable TX interrupts
// rfm22_write(RFM22_interrupt_enable1, RFM22_ie1_enpksent | RFM22_ie1_entxffaem | RFM22_ie1_enfferr);
rfm22_write(RFM22_interrupt_enable1, RFM22_ie1_enpksent | RFM22_ie1_entxffaem);
// read interrupt status - clear interrupts
rfm22_read(RFM22_interrupt_status1);
rfm22_read(RFM22_interrupt_status2);
// enable the transmitter
// rfm22_write(RFM22_op_and_func_ctrl1, RFM22_opfc1_xton | RFM22_opfc1_txon);
rfm22_write(RFM22_op_and_func_ctrl1, RFM22_opfc1_pllon | RFM22_opfc1_txon);
TX_LED_ON;
// *******************
// create new slightly random clear channel detector count value
uint32_t ccc = (TX_PREAMBLE_NIBBLES + 8) + 4; // minimum clear channel time before allowing transmit
clear_channel_count = ccc + (random32 % (ccc * 2)); // plus a some randomness
// *******************
#if defined(RFM22_EXT_INT_USE)
exec_using_spi = FALSE;
#endif
#if defined(RFM22_DEBUG)
switch (rf_mode)
{
case TX_DATA_MODE:
DEBUG_PRINTF(2, " TX_Data_Mode\n\r");
break;
case TX_STREAM_MODE:
DEBUG_PRINTF(2, " TX_Stream_Mode\n\r");
break;
case TX_CARRIER_MODE:
DEBUG_PRINTF(2, " TX_Carrier_Mode\n\r");
break;
case TX_PN_MODE:
DEBUG_PRINTF(2, " TX_PN_Mode\n\r");
break;
}
#endif
}
// ************************************
// external interrupt line triggered (or polled) from the rf chip
void rfm22_processRxInt(void)
{
register uint8_t int_stat1 = int_status1;
register uint8_t int_stat2 = int_status2;
if (int_stat2 & RFM22_is2_ipreaval)
{ // Valid preamble detected
if (rf_mode == RX_WAIT_PREAMBLE_MODE)
{
rfm22_int_timer = 0; // reset the timer
rf_mode = RX_WAIT_SYNC_MODE;
RX_LED_ON;
#if defined(RFM22_DEBUG) && !defined(RFM22_EXT_INT_USE)
DEBUG_PRINTF(2, " pream_det");
debug_outputted = true;
#endif
}
}
/* else
if (int_stat2 & RFM22_is2_ipreainval)
{ // Invalid preamble detected
if (rf_mode == RX_WAIT_SYNC_MODE)
{
#if defined(RFM22_DEBUG) && !defined(RFM22_EXT_INT_USE)
DEBUG_PRINTF(2, " invalid_preamble");
debug_outputted = true;
#endif
rfm22_setRxMode(RX_WAIT_PREAMBLE_MODE, false);
return;
}
else
{
}
}
*/
if (int_stat2 & RFM22_is2_iswdet)
{ // Sync word detected
//STOPWATCH_reset(); // reset timer
if (rf_mode == RX_WAIT_PREAMBLE_MODE || rf_mode == RX_WAIT_SYNC_MODE)
{
rfm22_int_timer = 0; // reset the timer
rf_mode = RX_DATA_MODE;
RX_LED_ON;
// read the 10-bit signed afc correction value
afc_correction = (uint16_t)rfm22_read(RFM22_afc_correction_read) << 8; // bits 9 to 2
afc_correction |= (uint16_t)rfm22_read(RFM22_ook_counter_value1) & 0x00c0; // bits 1 & 0
afc_correction >>= 6;
afc_correction_Hz = (int32_t)(frequency_step_size * afc_correction + 0.5f); // convert the afc value to Hz
rx_packet_start_rssi_dBm = rssi_dBm; // remember the rssi for this packet
rx_packet_start_afc_Hz = afc_correction_Hz; // remember the afc value for this packet
#if defined(RFM22_DEBUG) && !defined(RFM22_EXT_INT_USE)
DEBUG_PRINTF(2, " sync_det");
DEBUG_PRINTF(2, " AFC_%d_%dHz", afc_correction, afc_correction_Hz);
debug_outputted = true;
#endif
}
}
if (int_stat1 & RFM22_is1_irxffafull)
{ // RX FIFO almost full, it needs emptying
if (rf_mode == RX_DATA_MODE)
{ // read data from the rf chips FIFO buffer
rfm22_int_timer = 0; // reset the timer
register uint16_t len = rfm22_read(RFM22_received_packet_length); // read the total length of the packet data
register uint16_t wr = rx_buffer_wr;
if ((wr + RX_FIFO_HI_WATERMARK) > len)
{ // some kind of error in the RF module
#if defined(RFM22_DEBUG) && !defined(RFM22_EXT_INT_USE)
DEBUG_PRINTF(2, " r_size_error1");
debug_outputted = true;
#endif
rfm22_setRxMode(RX_WAIT_PREAMBLE_MODE, false);
return;
}
if (((wr + RX_FIFO_HI_WATERMARK) >= len) && !(int_stat1 & RFM22_is1_ipkvalid))
{ // some kind of error in the RF module
#if defined(RFM22_DEBUG) && !defined(RFM22_EXT_INT_USE)
DEBUG_PRINTF(2, " r_size_error2");
debug_outputted = true;
#endif
rfm22_setRxMode(RX_WAIT_PREAMBLE_MODE, false);
return;
}
// fetch the rx'ed data from the rf chips RX FIFO
rfm22_startBurstRead(RFM22_fifo_access);
rx_fifo_wr = 0;
for (register uint8_t i = RX_FIFO_HI_WATERMARK; i > 0; i--)
rx_fifo[rx_fifo_wr++] = rfm22_burstRead(); // read a byte from the rf modules RX FIFO buffer
rfm22_endBurstRead();
uint16_t i = rx_fifo_wr;
if (wr + i > sizeof(rx_buffer)) i = sizeof(rx_buffer) - wr;
memcpy((void *)(rx_buffer + wr), (void *)rx_fifo, i); // save the new bytes into our rx buffer
wr += i;
rx_buffer_wr = wr;
if (rx_data_callback_function)
{ // pass the new data onto whoever wanted it
if (!rx_data_callback_function((void *)rx_fifo, rx_fifo_wr))
{
rfm22_setRxMode(RX_WAIT_PREAMBLE_MODE, false);
return;
}
}
#if defined(RFM22_DEBUG) && !defined(RFM22_EXT_INT_USE)
// DEBUG_PRINTF(2, " r_data_%u/%u", rx_buffer_wr, len);
// debug_outputted = true;
#endif
}
else
{ // just clear the RX FIFO
rfm22_startBurstRead(RFM22_fifo_access);
for (register uint16_t i = RX_FIFO_HI_WATERMARK; i > 0; i--)
rfm22_burstRead(); // read a byte from the rf modules RX FIFO buffer
rfm22_endBurstRead();
}
}
if (int_stat1 & RFM22_is1_icrerror)
{ // CRC error .. discard the received data
if (rf_mode == RX_DATA_MODE)
{
rfm22_int_timer = 0; // reset the timer
#if defined(RFM22_DEBUG) && !defined(RFM22_EXT_INT_USE)
DEBUG_PRINTF(2, " CRC_ERR");
debug_outputted = true;
#endif
rfm22_setRxMode(RX_WAIT_PREAMBLE_MODE, false); // reset the receiver
return;
}
}
// if (int_stat2 & RFM22_is2_irssi)
// { // RSSI level is >= the set threshold
// }
// if (device_status & RFM22_ds_rxffem)
// { // RX FIFO empty
// }
// if (device_status & RFM22_ds_headerr)
// { // Header check error
// }
if (int_stat1 & RFM22_is1_ipkvalid)
{ // Valid packet received
if (rf_mode == RX_DATA_MODE)
{
rfm22_int_timer = 0; // reset the timer
// disable the receiver
// rfm22_write(RFM22_op_and_func_ctrl1, RFM22_opfc1_xton); // READY mode
rfm22_write(RFM22_op_and_func_ctrl1, RFM22_opfc1_pllon); // TUNE mode
register uint16_t len = rfm22_read(RFM22_received_packet_length); // read the total length of the packet data
register uint16_t wr = rx_buffer_wr;
if (wr < len)
{ // their must still be data in the RX FIFO we need to get
// fetch the rx'ed data from the rf chips RX FIFO
rfm22_startBurstRead(RFM22_fifo_access);
rx_fifo_wr = 0;
for (register uint8_t i = len - wr; i > 0; i--)
rx_fifo[rx_fifo_wr++] = rfm22_burstRead(); // read a byte from the rf modules RX FIFO buffer
rfm22_endBurstRead();
uint16_t i = rx_fifo_wr;
if (wr + i > sizeof(rx_buffer)) i = sizeof(rx_buffer) - wr;
memcpy((void *)(rx_buffer + wr), (void *)rx_fifo, i); // save the new bytes into our rx buffer
wr += i;
rx_buffer_wr = wr;
if (rx_data_callback_function)
{ // pass the new data onto whoever wanted it
if (!rx_data_callback_function((void *)rx_fifo, rx_fifo_wr))
{
// rfm22_setRxMode(RX_WAIT_PREAMBLE_MODE, false);
// return;
}
}
}
rfm22_setRxMode(RX_WAIT_PREAMBLE_MODE, false); // reset the receiver
if (wr != len)
{ // we have a packet length error .. discard the packet
#if defined(RFM22_DEBUG) && !defined(RFM22_EXT_INT_USE)
DEBUG_PRINTF(2, " r_pack_len_error_%u_%u", len, wr);
debug_outputted = true;
#endif
return;
}
// we have a valid received packet
#if defined(RFM22_DEBUG) && !defined(RFM22_EXT_INT_USE)
DEBUG_PRINTF(2, " VALID_R_PACKET_%u", wr);
debug_outputted = true;
#endif
if (rx_packet_wr == 0)
{ // save the received packet for further processing
rx_packet_rssi_dBm = rx_packet_start_rssi_dBm; // remember the rssi for this packet
rx_packet_afc_Hz = rx_packet_start_afc_Hz; // remember the afc offset for this packet
memmove((void *)rx_packet_buf, (void *)rx_buffer, wr); // copy the packet data
rx_packet_wr = wr; // save the length of the data
}
else
{ // the save buffer is still in use .. nothing we can do but to drop the packet
}
// return;
}
else
{
// rfm22_setRxMode(RX_WAIT_PREAMBLE_MODE, false); // reset the receiver
// return;
}
}
}
uint8_t rfm22_topUpRFTxFIFO(void)
{
rfm22_int_timer = 0; // reset the timer
uint16_t rd = tx_data_rd;
uint16_t wr = tx_data_wr;
if (rf_mode == TX_DATA_MODE && (!tx_data_addr || rd >= wr))
return 0; // no more data to send
uint16_t max_bytes = FIFO_SIZE - TX_FIFO_LO_WATERMARK - 1;
uint16_t i = 0;
// top-up the rf chips TX FIFO buffer
rfm22_startBurstWrite(RFM22_fifo_access);
// add some data
for (uint16_t j = wr - rd; j > 0; j--)
{
// int16_t b = -1;
// if (tx_data_byte_callback_function)
// b = tx_data_byte_callback_function();
rfm22_burstWrite(tx_data_addr[rd++]);
if (++i >= max_bytes) break;
}
tx_data_rd = rd;
if (rf_mode == TX_STREAM_MODE && rd >= wr)
{ // all data sent .. need to start sending RF header again
tx_data_addr = NULL;
tx_data_rd = tx_data_wr = 0;
while (i < max_bytes)
{
rfm22_burstWrite(PREAMBLE_BYTE); // preamble byte
i++;
}
// todo:
// add the RF heaader
// i += rfm22_addHeader();
}
rfm22_endBurstWrite();
#if defined(RFM22_DEBUG) && !defined(RFM22_EXT_INT_USE)
// DEBUG_PRINTF(2, " added_%d_bytes", i);
// debug_outputted = true;
#endif
return i;
}
void rfm22_processTxInt(void)
{
register uint8_t int_stat1 = int_status1;
// register uint8_t int_stat2 = int_status2;
/*
if (int_stat1 & RFM22_is1_ifferr)
{ // FIFO underflow/overflow error
rfm22_setRxMode(RX_WAIT_PREAMBLE_MODE, false);
tx_data_addr = NULL;
tx_data_rd = tx_data_wr = 0;
return;
}
*/
if (int_stat1 & RFM22_is1_ixtffaem)
{ // TX FIFO almost empty, it needs filling up
#if defined(RFM22_DEBUG) && !defined(RFM22_EXT_INT_USE)
// DEBUG_PRINTF(2, " T_FIFO_AE");
// debug_outputted = true;
#endif
// uint8_t bytes_added = rfm22_topUpRFTxFIFO();
rfm22_topUpRFTxFIFO();
}
if (int_stat1 & RFM22_is1_ipksent)
{ // Packet has been sent
#if defined(RFM22_DEBUG) && !defined(RFM22_EXT_INT_USE)
DEBUG_PRINTF(2, " T_Sent");
debug_outputted = true;
#endif
if (rf_mode == TX_DATA_MODE)
{
rfm22_setRxMode(RX_WAIT_PREAMBLE_MODE, false); // back to receive mode
tx_data_addr = NULL;
tx_data_rd = tx_data_wr = 0;
return;
}
else
if (rf_mode == TX_STREAM_MODE)
{
tx_data_addr = NULL;
tx_data_rd = tx_data_wr = 0;
rfm22_setTxMode(TX_STREAM_MODE);
return;
}
}
// if (int_stat1 & RFM22_is1_itxffafull)
// { // TX FIFO almost full, it needs to be transmitted
// }
}
void rfm22_processInt(void)
{
// this is called from the external interrupt handler
#if !defined(RFM22_EXT_INT_USE)
// if (GPIO_IN(RF_INT_PIN))
//return; // the external int line is high (no signalled interrupt)
#endif
if (!initialized || power_on_reset)
return; // we haven't yet been initialized
#if defined(RFM22_DEBUG)
debug_outputted = false;
#endif
// ********************************
// read the RF modules current status registers
// read device status register
device_status = rfm22_read(RFM22_device_status);
// read ezmac status register
ezmac_status = rfm22_read(RFM22_ezmac_status);
// read interrupt status registers - clears the interrupt line
int_status1 = rfm22_read(RFM22_interrupt_status1);
int_status2 = rfm22_read(RFM22_interrupt_status2);
if (rf_mode != TX_DATA_MODE && rf_mode != TX_STREAM_MODE && rf_mode != TX_CARRIER_MODE && rf_mode != TX_PN_MODE)
{
rssi = rfm22_read(RFM22_rssi); // read rx signal strength .. 45 = -100dBm, 205 = -20dBm
rssi_dBm = ((int16_t)rssi / 2) - 122; // convert to dBm
// calibrate the RSSI value (rf bandwidth appears to affect it)
// if (rf_bandwidth_used > 0)
// rssi_dBm -= 10000 / rf_bandwidth_used;
}
else
{
tx_pwr = rfm22_read(RFM22_tx_power); // read the tx power register
}
if (int_status2 & RFM22_is2_ipor)
{ // the RF module has gone and done a reset - we need to re-initialize the rf module
initialized = FALSE;
power_on_reset = TRUE;
return;
}
// ********************************
// debug stuff
#if defined(RFM22_DEBUG) && !defined(RFM22_EXT_INT_USE)
if (prev_device_status != device_status || prev_int_status1 != int_status1 || prev_int_status2 != int_status2 || prev_ezmac_status != ezmac_status)
{
DEBUG_PRINTF(2, "%02x %02x %02x %02x %dC", device_status, int_status1, int_status2, ezmac_status, temperature_reg);
if ((device_status & RFM22_ds_cps_mask) == RFM22_ds_cps_rx)
{
DEBUG_PRINTF(2, " %ddBm", rssi_dBm); // rx mode
}
else
if ((device_status & RFM22_ds_cps_mask) == RFM22_ds_cps_tx)
{
DEBUG_PRINTF(2, " %s", (tx_pwr & RFM22_tx_pwr_papeakval) ? "ANT_MISMATCH" : "ant_ok"); // tx mode
}
debug_outputted = true;
prev_device_status = device_status;
prev_int_status1 = int_status1;
prev_int_status2 = int_status2;
prev_ezmac_status = ezmac_status;
}
#endif
// ********************************
// read the ADC - temperature sensor .. this can only be used in IDLE mode
/*
if (!(rfm22_read(RFM22_adc_config) & RFM22_ac_adcstartbusy))
{ // the ADC has completed it's conversion
// read the ADC sample
temperature_reg = (int16_t)rfm22_read(RFM22_adc_value) * 0.5f - 64;
// start a new ADC conversion
rfm22_write(RFM22_adc_config, adc_config | RFM22_ac_adcstartbusy);
#if defined(RFM22_DEBUG) && !defined(RFM22_EXT_INT_USE)
DEBUG_PRINTF(2, ", %dC", temperature_reg);
debug_outputted = true;
#endif
}
*/
// ********************************
register uint16_t timer_ms = rfm22_int_timer;
switch (rf_mode)
{
case RX_SCAN_SPECTRUM:
break;
case RX_WAIT_PREAMBLE_MODE:
case RX_WAIT_SYNC_MODE:
case RX_DATA_MODE:
if (device_status & (RFM22_ds_ffunfl | RFM22_ds_ffovfl))
{ // FIFO under/over flow error
#if defined(RFM22_DEBUG) && !defined(RFM22_EXT_INT_USE)
DEBUG_PRINTF(2, " R_UNDER/OVERRUN");
debug_outputted = true;
#endif
rfm22_setRxMode(RX_WAIT_PREAMBLE_MODE, false); // reset the receiver
tx_data_rd = tx_data_wr = 0; // wipe TX buffer
break;
}
if (rf_mode == RX_WAIT_SYNC_MODE && timer_ms >= timeout_sync_ms)
{
rfm22_int_time_outs++;
#if defined(RFM22_DEBUG) && !defined(RFM22_EXT_INT_USE)
DEBUG_PRINTF(2, " R_SYNC_TIMEOUT");
debug_outputted = true;
#endif
rfm22_setRxMode(RX_WAIT_PREAMBLE_MODE, false); // reset the receiver
tx_data_rd = tx_data_wr = 0; // wipe TX buffer
break;
}
if (rf_mode == RX_DATA_MODE && timer_ms >= timeout_data_ms)
{ // missing interrupts
rfm22_int_time_outs++;
rfm22_setRxMode(RX_WAIT_PREAMBLE_MODE, false); // reset the receiver
tx_data_rd = tx_data_wr = 0; // wipe TX buffer
break;
}
if ((device_status & RFM22_ds_cps_mask) != RFM22_ds_cps_rx)
{ // the rf module is not in rx mode
if (timer_ms >= 100)
{
rfm22_int_time_outs++;
#if defined(RFM22_DEBUG) && !defined(RFM22_EXT_INT_USE)
DEBUG_PRINTF(2, " R_TIMEOUT");
debug_outputted = true;
#endif
rfm22_setRxMode(RX_WAIT_PREAMBLE_MODE, false); // reset the receiver
tx_data_rd = tx_data_wr = 0; // wipe TX buffer
break;
}
}
rfm22_processRxInt(); // process the interrupt
break;
case TX_DATA_MODE:
if (device_status & (RFM22_ds_ffunfl | RFM22_ds_ffovfl))
{ // FIFO under/over flow error
#if defined(RFM22_DEBUG) && !defined(RFM22_EXT_INT_USE)
DEBUG_PRINTF(2, " T_UNDER/OVERRUN");
debug_outputted = true;
#endif
rfm22_setRxMode(RX_WAIT_PREAMBLE_MODE, false); // back to rx mode
tx_data_rd = tx_data_wr = 0; // wipe TX buffer
break;
}
if (timer_ms >= timeout_data_ms)
{
rfm22_int_time_outs++;
rfm22_setRxMode(RX_WAIT_PREAMBLE_MODE, false); // back to rx mode
tx_data_rd = tx_data_wr = 0; // wipe TX buffer
break;
}
if ((device_status & RFM22_ds_cps_mask) != RFM22_ds_cps_tx)
{ // the rf module is not in tx mode
if (timer_ms >= 100)
{
rfm22_int_time_outs++;
#if defined(RFM22_DEBUG) && !defined(RFM22_EXT_INT_USE)
DEBUG_PRINTF(2, " T_TIMEOUT");
debug_outputted = true;
#endif
rfm22_setRxMode(RX_WAIT_PREAMBLE_MODE, false); // back to rx mode
tx_data_rd = tx_data_wr = 0; // wipe TX buffer
break;
}
}
rfm22_processTxInt(); // process the interrupt
break;
case TX_STREAM_MODE:
// todo:
rfm22_processTxInt(); // process the interrupt
break;
case TX_CARRIER_MODE:
case TX_PN_MODE:
// if (timer_ms >= TX_TEST_MODE_TIMELIMIT_MS) // 'nn'ms limit
// {
// rfm22_setRxMode(RX_WAIT_PREAMBLE_MODE, false); // back to rx mode
// tx_data_rd = tx_data_wr = 0; // wipe TX buffer
// break;
// }
break;
default: // unknown mode - this should NEVER happen, maybe we should do a complete CPU reset here
rfm22_setRxMode(RX_WAIT_PREAMBLE_MODE, false); // to rx mode
tx_data_rd = tx_data_wr = 0; // wipe TX buffer
break;
}
// ********************************
#if defined(RFM22_DEBUG) && !defined(RFM22_EXT_INT_USE)
if (debug_outputted)
{
switch (rf_mode)
{
case RX_SCAN_SPECTRUM:
DEBUG_PRINTF(2, " R_SCAN_SPECTRUM\n\r");
break;
case RX_WAIT_PREAMBLE_MODE:
DEBUG_PRINTF(2, " R_WAIT_PREAMBLE\n\r");
break;
case RX_WAIT_SYNC_MODE:
DEBUG_PRINTF(2, " R_WAIT_SYNC\n\r");
break;
case RX_DATA_MODE:
DEBUG_PRINTF(2, " R_DATA\n\r");
break;
case TX_DATA_MODE:
DEBUG_PRINTF(2, " T_DATA\n\r");
break;
case TX_STREAM_MODE:
DEBUG_PRINTF(2, " T_STREAM\n\r");
break;
case TX_CARRIER_MODE:
DEBUG_PRINTF(2, " T_CARRIER\n\r");
break;
case TX_PN_MODE:
DEBUG_PRINTF(2, " T_PN\n\r");
break;
default:
DEBUG_PRINTF(2, " UNKNOWN_MODE\n\r");
break;
}
}
#endif
// ********************************
}
// ************************************
int16_t rfm22_getRSSI(void)
{
#if defined(RFM22_EXT_INT_USE)
exec_using_spi = TRUE;
#endif
rssi = rfm22_read(RFM22_rssi); // read rx signal strength .. 45 = -100dBm, 205 = -20dBm
rssi_dBm = ((int16_t)rssi / 2) - 122; // convert to dBm
#if defined(RFM22_EXT_INT_USE)
exec_using_spi = FALSE;
#endif
return rssi_dBm;
}
int16_t rfm22_receivedRSSI(void)
{ // return the packets signal strength
if (!initialized)
return -200;
else
return rx_packet_rssi_dBm;
}
int32_t rfm22_receivedAFCHz(void)
{ // return the packets offset frequency
if (!initialized)
return 0;
else
return rx_packet_afc_Hz;
}
uint16_t rfm22_receivedLength(void)
{ // return the size of the data received
if (!initialized)
return 0;
else
return rx_packet_wr;
}
uint8_t * rfm22_receivedPointer(void)
{ // return the address of the data
return (uint8_t *)&rx_packet_buf;
}
void rfm22_receivedDone(void)
{ // empty the rx packet buffer
rx_packet_wr = 0;
}
// ************************************
int32_t rfm22_sendData(void *data, uint16_t length, bool send_immediately)
{
if (!initialized)
return -1; // we are not yet initialized
if (length == 0)
return -2; // no data to send
if (!data || length > 255)
return -3; // no data or too much data to send
if (tx_data_wr > 0)
return -4; // already have data to be sent
if (rf_mode == TX_DATA_MODE || rf_mode == TX_STREAM_MODE || rf_mode == TX_CARRIER_MODE || rf_mode == TX_PN_MODE || rf_mode == RX_SCAN_SPECTRUM)
return -5; // we are currently transmitting or scanning the spectrum
tx_data_addr = data;
tx_data_rd = 0;
tx_data_wr = length;
#if defined(RFM22_DEBUG)
DEBUG_PRINTF(2, "rf sendData(0x%08x %u)\n\r", (uint32_t)tx_data_addr, tx_data_wr);
#endif
if (send_immediately || rfm22_channelIsClear()) // is the channel clear to transmit on?
rfm22_setTxMode(TX_DATA_MODE); // transmit NOW
return tx_data_wr;
}
// ************************************
void rfm22_setTxStream(void) // TEST ONLY
{
if (!initialized)
return;
tx_data_rd = tx_data_wr = 0;
rfm22_setTxMode(TX_STREAM_MODE);
}
// ************************************
void rfm22_setTxNormal(void)
{
if (!initialized)
return;
// if (rf_mode == TX_CARRIER_MODE || rf_mode == TX_PN_MODE)
if (rf_mode != RX_SCAN_SPECTRUM)
{
rfm22_setRxMode(RX_WAIT_PREAMBLE_MODE, false);
tx_data_rd = tx_data_wr = 0;
rx_packet_wr = 0;
rx_packet_start_rssi_dBm = 0;
rx_packet_start_afc_Hz = 0;
rx_packet_rssi_dBm = 0;
rx_packet_afc_Hz = 0;
}
}
// enable a blank tx carrier (for frequency alignment)
void rfm22_setTxCarrierMode(void)
{
if (!initialized)
return;
if (rf_mode != TX_CARRIER_MODE && rf_mode != RX_SCAN_SPECTRUM)
rfm22_setTxMode(TX_CARRIER_MODE);
}
// enable a psuedo random data tx carrier (for spectrum inspection)
void rfm22_setTxPNMode(void)
{
if (!initialized)
return;
if (rf_mode != TX_PN_MODE && rf_mode != RX_SCAN_SPECTRUM)
rfm22_setTxMode(TX_PN_MODE);
}
// ************************************
// return the current mode
int8_t rfm22_currentMode(void)
{
return rf_mode;
}
// return TRUE if we are transmitting
bool rfm22_transmitting(void)
{
return (rf_mode == TX_DATA_MODE || rf_mode == TX_STREAM_MODE || rf_mode == TX_CARRIER_MODE || rf_mode == TX_PN_MODE);
}
// return TRUE if the channel is clear to transmit on
bool rfm22_channelIsClear(void)
{
if (!initialized)
return FALSE; // we haven't yet been initialized
if (rf_mode != RX_WAIT_PREAMBLE_MODE && rf_mode != RX_WAIT_SYNC_MODE)
return FALSE; // we are receiving something or we are transmitting or we are scanning the spectrum
return TRUE;
}
// return TRUE if the transmiter is ready for use
bool rfm22_txReady(void)
{
if (!initialized)
return FALSE; // we haven't yet been initialized
return (tx_data_rd == 0 && tx_data_wr == 0 && rf_mode != TX_DATA_MODE && rf_mode != TX_STREAM_MODE && rf_mode != TX_CARRIER_MODE && rf_mode != TX_PN_MODE && rf_mode != RX_SCAN_SPECTRUM);
}
// ************************************
// set/get the frequency calibration value
void rfm22_setFreqCalibration(uint8_t value)
{
osc_load_cap = value;
if (!initialized || power_on_reset)
return; // we haven't yet been initialized
uint8_t prev_rf_mode = rf_mode;
if (rf_mode == TX_CARRIER_MODE || rf_mode == TX_PN_MODE)
{
rfm22_setRxMode(RX_WAIT_PREAMBLE_MODE, false);
tx_data_rd = tx_data_wr = 0;
}
#if defined(RFM22_EXT_INT_USE)
exec_using_spi = TRUE;
#endif
rfm22_write(RFM22_xtal_osc_load_cap, osc_load_cap);
#if defined(RFM22_EXT_INT_USE)
exec_using_spi = FALSE;
#endif
if (prev_rf_mode == TX_CARRIER_MODE || prev_rf_mode == TX_PN_MODE)
rfm22_setTxMode(prev_rf_mode);
}
uint8_t rfm22_getFreqCalibration(void)
{
return osc_load_cap;
}
// ************************************
// can be called from an interrupt if you wish
void rfm22_1ms_tick(void)
{ // call this once every ms
if (!initialized) return; // we haven't yet been initialized
if (rf_mode != RX_SCAN_SPECTRUM)
{
if (rfm22_int_timer < 0xffff) rfm22_int_timer++;
}
}
// *****************************************************************************
// call this as often as possible - not from an interrupt
void rfm22_process(void)
{
#if !defined(RFM22_EXT_INT_USE)
if (rf_mode != RX_SCAN_SPECTRUM)
rfm22_processInt(); // manually poll the interrupt line routine
#endif
{
static int cntr = 0;
if (cntr >= 500) {
DEBUG_PRINTF(2, "Process\n\r");
cntr = 0;
} else
++cntr;
}
if (power_on_reset) {
// we need to re-initialize the RF module - it told us it's reset itself
if (rf_mode != RX_SCAN_SPECTRUM) {
// normal data mode
uint32_t current_freq = carrier_frequency_hz; // fetch current rf nominal frequency
rfm22_init_normal(lower_carrier_frequency_limit_Hz, upper_carrier_frequency_limit_Hz, rfm22_freqHopSize());
rfm22_setNominalCarrierFrequency(current_freq); // restore the nominal carrier frequency
} else
// we are scanning the spectrum
rfm22_init_scan_spectrum(lower_carrier_frequency_limit_Hz, upper_carrier_frequency_limit_Hz);
return;
}
switch (rf_mode) {
case RX_SCAN_SPECTRUM: // we are scanning the spectrum
// read device status register
device_status = rfm22_read(RFM22_device_status);
// read ezmac status register
ezmac_status = rfm22_read(RFM22_ezmac_status);
// read interrupt status registers - clears the interrupt line
int_status1 = rfm22_read(RFM22_interrupt_status1);
int_status2 = rfm22_read(RFM22_interrupt_status2);
if (int_status2 & RFM22_is2_ipor) {
// the RF module has gone and done a reset - we need to re-initialize the rf module
initialized = FALSE;
power_on_reset = TRUE;
return;
}
break;
case RX_WAIT_PREAMBLE_MODE:
if (rfm22_int_timer >= timeout_ms)
{
// assume somethings locked up
rfm22_int_time_outs++;
rfm22_setRxMode(RX_WAIT_PREAMBLE_MODE, false); // reset the RF module to rx mode
tx_data_rd = tx_data_wr = 0; // wipe TX buffer
break;
}
// go to transmit mode if we have data to send and the channel is clear to transmit on
if (tx_data_rd == 0 && tx_data_wr > 0 && rfm22_channelIsClear()) {
rfm22_setTxMode(TX_DATA_MODE); // transmit packet NOW
break;
}
break;
case RX_WAIT_SYNC_MODE:
if (rfm22_int_timer >= timeout_sync_ms)
{
// assume somethings locked up
rfm22_int_time_outs++;
rfm22_setRxMode(RX_WAIT_PREAMBLE_MODE, false); // reset the RF module to rx mode
tx_data_rd = tx_data_wr = 0; // wipe TX buffer
break;
}
// go to transmit mode if we have data to send and the channel is clear to transmit on
if (tx_data_rd == 0 && tx_data_wr > 0 && rfm22_channelIsClear()) {
// transmit packet NOW
rfm22_setTxMode(TX_DATA_MODE);
break;
}
break;
case RX_DATA_MODE:
case TX_DATA_MODE:
if (rfm22_int_timer >= timeout_data_ms)
{
// assume somethings locked up
rfm22_int_time_outs++;
rfm22_setRxMode(RX_WAIT_PREAMBLE_MODE, false); // reset the RF module to rx mode
tx_data_rd = tx_data_wr = 0; // wipe TX buffer
break;
}
break;
case TX_STREAM_MODE:
// todo:
break;
case TX_CARRIER_MODE:
case TX_PN_MODE:
// if (rfm22_int_timer >= TX_TEST_MODE_TIMELIMIT_MS)
// {
// rfm22_setRxMode(RX_WAIT_PREAMBLE_MODE, false); // back to rx mode
// tx_data_rd = tx_data_wr = 0; // wipe TX buffer
// break;
// }
break;
default:
// unknown mode - this should never happen, maybe we should do a complete CPU reset here?
rfm22_setRxMode(RX_WAIT_PREAMBLE_MODE, false); // to rx mode
tx_data_rd = tx_data_wr = 0; // wipe TX buffer
break;
}
#if defined(RFM22_INT_TIMEOUT_DEBUG)
if (prev_rfm22_int_time_outs != rfm22_int_time_outs) {
prev_rfm22_int_time_outs = rfm22_int_time_outs;
DEBUG_PRINTF(2, "rf int timeouts %d\n\r", rfm22_int_time_outs);
}
#endif
}
// ************************************
void rfm22_TxDataByte_SetCallback(t_rfm22_TxDataByteCallback new_function)
{
tx_data_byte_callback_function = new_function;
}
void rfm22_RxData_SetCallback(t_rfm22_RxDataCallback new_function)
{
rx_data_callback_function = new_function;
}
// ************************************
// reset the RF module
int rfm22_resetModule(uint8_t mode, uint32_t min_frequency_hz, uint32_t max_frequency_hz)
{
initialized = false;
#if defined(RFM22_EXT_INT_USE)
rfm22_disableExtInt();
#endif
power_on_reset = false;
// ****************
#if defined(RFM22_EXT_INT_USE)
exec_using_spi = TRUE;
#endif
// ****************
// setup the SPI port
// chip select line HIGH
PIOS_SPI_RC_PinSet(RFM22_PIOS_SPI, 1);
// set SPI port SCLK frequency .. 4.5MHz
PIOS_SPI_SetClockSpeed(RFM22_PIOS_SPI, PIOS_SPI_PRESCALER_16);
// set SPI port SCLK frequency .. 2.25MHz
// PIOS_SPI_SetClockSpeed(RFM22_PIOS_SPI, PIOS_SPI_PRESCALER_32);
// set SPI port SCLK frequency .. 285kHz .. purely for hardware fault finding
// PIOS_SPI_SetClockSpeed(RFM22_PIOS_SPI, PIOS_SPI_PRESCALER_256);
// ****************
// software reset the RF chip .. following procedure according to Si4x3x Errata (rev. B)
rfm22_write(RFM22_op_and_func_ctrl1, RFM22_opfc1_swres); // software reset the radio
PIOS_DELAY_WaitmS(26); // wait 26ms
for (int i = 50; i > 0; i--)
{
PIOS_DELAY_WaitmS(1); // wait 1ms
// read the status registers
int_status1 = rfm22_read(RFM22_interrupt_status1);
int_status2 = rfm22_read(RFM22_interrupt_status2);
if (int_status2 & RFM22_is2_ichiprdy) break;
}
// ****************
// read status - clears interrupt
device_status = rfm22_read(RFM22_device_status);
int_status1 = rfm22_read(RFM22_interrupt_status1);
int_status2 = rfm22_read(RFM22_interrupt_status2);
ezmac_status = rfm22_read(RFM22_ezmac_status);
// disable all interrupts
rfm22_write(RFM22_interrupt_enable1, 0x00);
rfm22_write(RFM22_interrupt_enable2, 0x00);
// ****************
#if defined(RFM22_EXT_INT_USE)
exec_using_spi = FALSE;
#endif
// ****************
#if defined(RFM22_EXT_INT_USE)
inside_ext_int = FALSE;
#endif
rf_mode = mode;
device_status = int_status1 = int_status2 = ezmac_status = 0;
rssi = 0;
rssi_dBm = -200;
tx_data_byte_callback_function = NULL;
rx_data_callback_function = NULL;
rx_buffer_current = 0;
rx_buffer_wr = 0;
rx_packet_wr = 0;
rx_packet_rssi_dBm = -200;
rx_packet_afc_Hz = 0;
tx_data_addr = NULL;
tx_data_rd = tx_data_wr = 0;
lookup_index = 0;
ss_lookup_index = 0;
rf_bandwidth_used = 0;
ss_rf_bandwidth_used = 0;
rfm22_int_timer = 0;
rfm22_int_time_outs = 0;
prev_rfm22_int_time_outs = 0;
hbsel = 0;
frequency_step_size = 0.0f;
frequency_hop_channel = 0;
afc_correction = 0;
afc_correction_Hz = 0;
temperature_reg = 0;
// set the TX power
tx_power = RFM22_DEFAULT_RF_POWER;
tx_pwr = 0;
// ****************
// read the RF chip ID bytes
device_type = rfm22_read(RFM22_DEVICE_TYPE) & RFM22_DT_MASK; // read the device type
device_version = rfm22_read(RFM22_DEVICE_VERSION) & RFM22_DV_MASK; // read the device version
#if defined(RFM22_DEBUG)
DEBUG_PRINTF(2, "rf device type: %d\n\r", device_type);
DEBUG_PRINTF(2, "rf device version: %d\n\r", device_version);
#endif
if (device_type != 0x08)
{
#if defined(RFM22_DEBUG)
DEBUG_PRINTF(2, "rf device type: INCORRECT - should be 0x08\n\r");
#endif
return -1; // incorrect RF module type
}
// if (device_version != RFM22_DEVICE_VERSION_V2) // V2
// return -2; // incorrect RF module version
// if (device_version != RFM22_DEVICE_VERSION_A0) // A0
// return -2; // incorrect RF module version
if (device_version != RFM22_DEVICE_VERSION_B1) // B1
{
#if defined(RFM22_DEBUG)
DEBUG_PRINTF(2, "rf device version: INCORRECT\n\r");
#endif
return -2; // incorrect RF module version
}
// ****************
// set the minimum and maximum carrier frequency allowed
if (min_frequency_hz < RFM22_MIN_CARRIER_FREQUENCY_HZ) min_frequency_hz = RFM22_MIN_CARRIER_FREQUENCY_HZ;
else
if (min_frequency_hz > RFM22_MAX_CARRIER_FREQUENCY_HZ) min_frequency_hz = RFM22_MAX_CARRIER_FREQUENCY_HZ;
if (max_frequency_hz < RFM22_MIN_CARRIER_FREQUENCY_HZ) max_frequency_hz = RFM22_MIN_CARRIER_FREQUENCY_HZ;
else
if (max_frequency_hz > RFM22_MAX_CARRIER_FREQUENCY_HZ) max_frequency_hz = RFM22_MAX_CARRIER_FREQUENCY_HZ;
if (min_frequency_hz > max_frequency_hz)
{ // swap them over
uint32_t tmp = min_frequency_hz;
min_frequency_hz = max_frequency_hz;
max_frequency_hz = tmp;
}
lower_carrier_frequency_limit_Hz = min_frequency_hz;
upper_carrier_frequency_limit_Hz = max_frequency_hz;
// ****************
// calibrate our RF module to be exactly on frequency .. different for every module
osc_load_cap = OSC_LOAD_CAP; // default
rfm22_write(RFM22_xtal_osc_load_cap, osc_load_cap);
// ****************
// disable Low Duty Cycle Mode
rfm22_write(RFM22_op_and_func_ctrl2, 0x00);
rfm22_write(RFM22_cpu_output_clk, RFM22_coc_1MHz); // 1MHz clock output
rfm22_write(RFM22_op_and_func_ctrl1, RFM22_opfc1_xton); // READY mode
// rfm22_write(RFM22_op_and_func_ctrl1, RFM22_opfc1_pllon); // TUNE mode
// choose the 3 GPIO pin functions
rfm22_write(RFM22_io_port_config, RFM22_io_port_default); // GPIO port use default value
rfm22_write(RFM22_gpio0_config, RFM22_gpio0_config_drv3 | RFM22_gpio0_config_txstate); // GPIO0 = TX State (to control RF Switch)
rfm22_write(RFM22_gpio1_config, RFM22_gpio1_config_drv3 | RFM22_gpio1_config_rxstate); // GPIO1 = RX State (to control RF Switch)
rfm22_write(RFM22_gpio2_config, RFM22_gpio2_config_drv3 | RFM22_gpio2_config_cca); // GPIO2 = Clear Channel Assessment
// ****************
return 0; // OK
}
// ************************************
int rfm22_init_scan_spectrum(uint32_t min_frequency_hz, uint32_t max_frequency_hz)
{
#if defined(RFM22_DEBUG)
DEBUG_PRINTF(2, "\n\rRF init scan spectrum\n\r");
#endif
int res = rfm22_resetModule(RX_SCAN_SPECTRUM, min_frequency_hz, max_frequency_hz);
if (res < 0)
return res;
// rfm22_setSSBandwidth(0);
rfm22_setSSBandwidth(1);
// FIFO mode, GFSK modulation
uint8_t fd_bit = rfm22_read(RFM22_modulation_mode_control2) & RFM22_mmc2_fd;
rfm22_write(RFM22_modulation_mode_control2, RFM22_mmc2_trclk_clk_none | RFM22_mmc2_dtmod_fifo | fd_bit | RFM22_mmc2_modtyp_gfsk);
rfm22_write(RFM22_cpu_output_clk, RFM22_coc_1MHz); // 1MHz clock output
rfm22_write(RFM22_rssi_threshold_clear_chan_indicator, 0);
rfm22_write(RFM22_preamble_detection_ctrl1, 31 << 3); // 31-nibbles rx preamble detection
// avoid packet detection
rfm22_write(RFM22_data_access_control, RFM22_dac_enpacrx | RFM22_dac_encrc);
rfm22_write(RFM22_header_control1, 0x0f);
rfm22_write(RFM22_header_control2, 0x77);
rfm22_write(RFM22_sync_word3, SYNC_BYTE_1);
rfm22_write(RFM22_sync_word2, SYNC_BYTE_2);
rfm22_write(RFM22_sync_word1, SYNC_BYTE_3 ^ 0xff);
rfm22_write(RFM22_sync_word0, SYNC_BYTE_4 ^ 0xff);
// all the bits to be checked
rfm22_write(RFM22_header_enable3, 0xff);
rfm22_write(RFM22_header_enable2, 0xff);
rfm22_write(RFM22_header_enable1, 0xff);
rfm22_write(RFM22_header_enable0, 0xff);
// rfm22_write(RFM22_frequency_hopping_step_size, 0); // set frequency hopping channel step size (multiples of 10kHz)
rfm22_setNominalCarrierFrequency(min_frequency_hz); // set our nominal carrier frequency
rfm22_write(RFM22_tx_power, RFM22_tx_pwr_lna_sw | 0); // set minimum tx power
rfm22_write(RFM22_agc_override1, RFM22_agc_ovr1_sgi | RFM22_agc_ovr1_agcen);
// rfm22_write(RFM22_vco_current_trimming, 0x7f);
// rfm22_write(RFM22_vco_calibration_override, 0x40);
// rfm22_write(RFM22_chargepump_current_trimming_override, 0x80);
#if defined(RFM22_EXT_INT_USE)
// Enable RF module external interrupt
rfm22_enableExtInt();
#endif
rfm22_setRxMode(RX_SCAN_SPECTRUM, true);
initialized = true;
return 0; // OK
}
// ************************************
int rfm22_init_tx_stream(uint32_t min_frequency_hz, uint32_t max_frequency_hz)
{
#if defined(RFM22_DEBUG)
DEBUG_PRINTF(2, "\n\rRF init TX stream\n\r");
#endif
int res = rfm22_resetModule(TX_STREAM_MODE, min_frequency_hz, max_frequency_hz);
if (res < 0)
return res;
frequency_hop_step_size_reg = 0;
// set the RF datarate
rfm22_setDatarate(RFM22_DEFAULT_RF_DATARATE, FALSE);
// FIFO mode, GFSK modulation
uint8_t fd_bit = rfm22_read(RFM22_modulation_mode_control2) & RFM22_mmc2_fd;
rfm22_write(RFM22_modulation_mode_control2, RFM22_mmc2_trclk_clk_none | RFM22_mmc2_dtmod_fifo | fd_bit | RFM22_mmc2_modtyp_gfsk);
// disable the internal Tx & Rx packet handlers (without CRC)
rfm22_write(RFM22_data_access_control, 0);
rfm22_write(RFM22_preamble_length, TX_PREAMBLE_NIBBLES); // x-nibbles tx preamble
rfm22_write(RFM22_preamble_detection_ctrl1, RX_PREAMBLE_NIBBLES << 3); // x-nibbles rx preamble detection
rfm22_write(RFM22_header_control1, RFM22_header_cntl1_bcen_none | RFM22_header_cntl1_hdch_none); // header control - we are not using the header
rfm22_write(RFM22_header_control2, RFM22_header_cntl2_fixpklen | RFM22_header_cntl2_hdlen_none | RFM22_header_cntl2_synclen_32 | ((TX_PREAMBLE_NIBBLES >> 8) & 0x01)); // no header bytes, synchronization word length 3, 2 used, packet length not included in header (fixed packet length).
rfm22_write(RFM22_sync_word3, SYNC_BYTE_1); // sync word
rfm22_write(RFM22_sync_word2, SYNC_BYTE_2); //
// rfm22_write(RFM22_modem_test, 0x01);
rfm22_write(RFM22_agc_override1, RFM22_agc_ovr1_agcen);
// rfm22_write(RFM22_agc_override1, RFM22_agc_ovr1_sgi | RFM22_agc_ovr1_agcen);
rfm22_write(RFM22_frequency_hopping_step_size, frequency_hop_step_size_reg); // set frequency hopping channel step size (multiples of 10kHz)
rfm22_setNominalCarrierFrequency((min_frequency_hz + max_frequency_hz) / 2); // set our nominal carrier frequency
rfm22_write(RFM22_tx_power, RFM22_tx_pwr_papeaken | RFM22_tx_pwr_papeaklvl_0 | RFM22_tx_pwr_lna_sw | tx_power); // set the tx power
// rfm22_write(RFM22_tx_power, RFM22_tx_pwr_lna_sw | tx_power); // set the tx power
// rfm22_write(RFM22_vco_current_trimming, 0x7f);
// rfm22_write(RFM22_vco_calibration_override, 0x40);
// rfm22_write(RFM22_chargepump_current_trimming_override, 0x80);
rfm22_write(RFM22_tx_fifo_control1, TX_FIFO_HI_WATERMARK); // TX FIFO Almost Full Threshold (0 - 63)
rfm22_write(RFM22_tx_fifo_control2, TX_FIFO_LO_WATERMARK); // TX FIFO Almost Empty Threshold (0 - 63)
#if defined(RFM22_EXT_INT_USE)
// Enable RF module external interrupt
rfm22_enableExtInt();
#endif
initialized = true;
return 0; // OK
}
// ************************************
int rfm22_init_rx_stream(uint32_t min_frequency_hz, uint32_t max_frequency_hz)
{
#if defined(RFM22_DEBUG)
DEBUG_PRINTF(2, "\n\rRF init RX stream\n\r");
#endif
int res = rfm22_resetModule(RX_WAIT_PREAMBLE_MODE, min_frequency_hz, max_frequency_hz);
if (res < 0)
return res;
frequency_hop_step_size_reg = 0;
// set the RF datarate
rfm22_setDatarate(RFM22_DEFAULT_RF_DATARATE, FALSE);
// FIFO mode, GFSK modulation
uint8_t fd_bit = rfm22_read(RFM22_modulation_mode_control2) & RFM22_mmc2_fd;
rfm22_write(RFM22_modulation_mode_control2, RFM22_mmc2_trclk_clk_none | RFM22_mmc2_dtmod_fifo | fd_bit | RFM22_mmc2_modtyp_gfsk);
// disable the internal Tx & Rx packet handlers (without CRC)
rfm22_write(RFM22_data_access_control, 0);
rfm22_write(RFM22_preamble_length, TX_PREAMBLE_NIBBLES); // x-nibbles tx preamble
rfm22_write(RFM22_preamble_detection_ctrl1, RX_PREAMBLE_NIBBLES << 3); // x-nibbles rx preamble detection
rfm22_write(RFM22_header_control1, RFM22_header_cntl1_bcen_none | RFM22_header_cntl1_hdch_none); // header control - we are not using the header
rfm22_write(RFM22_header_control2, RFM22_header_cntl2_fixpklen | RFM22_header_cntl2_hdlen_none | RFM22_header_cntl2_synclen_32 | ((TX_PREAMBLE_NIBBLES >> 8) & 0x01)); // no header bytes, synchronization word length 3, 2 used, packet length not included in header (fixed packet length).
rfm22_write(RFM22_sync_word3, SYNC_BYTE_1); // sync word
rfm22_write(RFM22_sync_word2, SYNC_BYTE_2); //
// no header bits to be checked
rfm22_write(RFM22_header_enable3, 0x00);
rfm22_write(RFM22_header_enable2, 0x00);
rfm22_write(RFM22_header_enable1, 0x00);
rfm22_write(RFM22_header_enable0, 0x00);
// rfm22_write(RFM22_modem_test, 0x01);
rfm22_write(RFM22_agc_override1, RFM22_agc_ovr1_agcen);
// rfm22_write(RFM22_agc_override1, RFM22_agc_ovr1_sgi | RFM22_agc_ovr1_agcen);
rfm22_write(RFM22_frequency_hopping_step_size, frequency_hop_step_size_reg); // set frequency hopping channel step size (multiples of 10kHz)
rfm22_setNominalCarrierFrequency((min_frequency_hz + max_frequency_hz) / 2); // set our nominal carrier frequency
// rfm22_write(RFM22_vco_current_trimming, 0x7f);
// rfm22_write(RFM22_vco_calibration_override, 0x40);
// rfm22_write(RFM22_chargepump_current_trimming_override, 0x80);
rfm22_write(RFM22_rx_fifo_control, RX_FIFO_HI_WATERMARK); // RX FIFO Almost Full Threshold (0 - 63)
#if defined(RFM22_EXT_INT_USE)
// Enable RF module external interrupt
rfm22_enableExtInt();
#endif
rfm22_setRxMode(RX_WAIT_PREAMBLE_MODE, false);
initialized = true;
return 0; // OK
}
// ************************************
// Initialise this hardware layer module and the rf module
int rfm22_init_normal(uint32_t min_frequency_hz, uint32_t max_frequency_hz, uint32_t freq_hop_step_size)
{
int res = rfm22_resetModule(RX_WAIT_PREAMBLE_MODE, min_frequency_hz, max_frequency_hz);
if (res < 0)
return res;
// ****************
freq_hop_step_size /= 10000; // in 10kHz increments
if (freq_hop_step_size > 255) freq_hop_step_size = 255;
frequency_hop_step_size_reg = freq_hop_step_size;
// ****************
// set the RF datarate
rfm22_setDatarate(RFM22_DEFAULT_RF_DATARATE, TRUE);
// FIFO mode, GFSK modulation
uint8_t fd_bit = rfm22_read(RFM22_modulation_mode_control2) & RFM22_mmc2_fd;
rfm22_write(RFM22_modulation_mode_control2, RFM22_mmc2_trclk_clk_none | RFM22_mmc2_dtmod_fifo | fd_bit | RFM22_mmc2_modtyp_gfsk);
// setup to read the internal temperature sensor
adc_config = RFM22_ac_adcsel_temp_sensor | RFM22_ac_adcref_bg; // ADC used to sample the temperature sensor
rfm22_write(RFM22_adc_config, adc_config); //
rfm22_write(RFM22_adc_sensor_amp_offset, 0); // adc offset
rfm22_write(RFM22_temp_sensor_calib, RFM22_tsc_tsrange0 | RFM22_tsc_entsoffs); // temp sensor calibration .. –40C to +64C 0.5C resolution
rfm22_write(RFM22_temp_value_offset, 0); // temp sensor offset
rfm22_write(RFM22_adc_config, adc_config | RFM22_ac_adcstartbusy); // start an ADC conversion
rfm22_write(RFM22_rssi_threshold_clear_chan_indicator, (-90 + 122) * 2); // set the RSSI threshold interrupt to about -90dBm
// enable the internal Tx & Rx packet handlers (with CRC)
// rfm22_write(RFM22_data_access_control, RFM22_dac_enpacrx | RFM22_dac_enpactx | RFM22_dac_encrc | RFM22_dac_crc_crc16);
// enable the internal Tx & Rx packet handlers (without CRC)
rfm22_write(RFM22_data_access_control, RFM22_dac_enpacrx | RFM22_dac_enpactx);
rfm22_write(RFM22_preamble_length, TX_PREAMBLE_NIBBLES); // x-nibbles tx preamble
rfm22_write(RFM22_preamble_detection_ctrl1, RX_PREAMBLE_NIBBLES << 3); // x-nibbles rx preamble detection
rfm22_write(RFM22_header_control1, RFM22_header_cntl1_bcen_none | RFM22_header_cntl1_hdch_none); // header control - we are not using the header
rfm22_write(RFM22_header_control2, RFM22_header_cntl2_hdlen_none | RFM22_header_cntl2_synclen_3210 | ((TX_PREAMBLE_NIBBLES >> 8) & 0x01)); // no header bytes, synchronization word length 3, 2, 1 & 0 used, packet length included in header.
rfm22_write(RFM22_sync_word3, SYNC_BYTE_1); // sync word
rfm22_write(RFM22_sync_word2, SYNC_BYTE_2); //
rfm22_write(RFM22_sync_word1, SYNC_BYTE_3); //
rfm22_write(RFM22_sync_word0, SYNC_BYTE_4); //
/*
rfm22_write(RFM22_transmit_header3, 'p'); // set tx header
rfm22_write(RFM22_transmit_header2, 'i'); //
rfm22_write(RFM22_transmit_header1, 'p'); //
rfm22_write(RFM22_transmit_header0, ' '); //
rfm22_write(RFM22_check_header3, 'p'); // set expected rx header
rfm22_write(RFM22_check_header2, 'i'); //
rfm22_write(RFM22_check_header1, 'p'); //
rfm22_write(RFM22_check_header0, ' '); //
// all the bits to be checked
rfm22_write(RFM22_header_enable3, 0xff);
rfm22_write(RFM22_header_enable2, 0xff);
rfm22_write(RFM22_header_enable1, 0xff);
rfm22_write(RFM22_header_enable0, 0xff);
*/ // no bits to be checked
rfm22_write(RFM22_header_enable3, 0x00);
rfm22_write(RFM22_header_enable2, 0x00);
rfm22_write(RFM22_header_enable1, 0x00);
rfm22_write(RFM22_header_enable0, 0x00);
// rfm22_write(RFM22_modem_test, 0x01);
rfm22_write(RFM22_agc_override1, RFM22_agc_ovr1_agcen);
// rfm22_write(RFM22_agc_override1, RFM22_agc_ovr1_sgi | RFM22_agc_ovr1_agcen);
rfm22_write(RFM22_frequency_hopping_step_size, frequency_hop_step_size_reg); // set frequency hopping channel step size (multiples of 10kHz)
rfm22_setNominalCarrierFrequency((min_frequency_hz + max_frequency_hz) / 2); // set our nominal carrier frequency
rfm22_write(RFM22_tx_power, RFM22_tx_pwr_papeaken | RFM22_tx_pwr_papeaklvl_0 | RFM22_tx_pwr_lna_sw | tx_power); // set the tx power
// rfm22_write(RFM22_tx_power, RFM22_tx_pwr_lna_sw | tx_power); // set the tx power
// rfm22_write(RFM22_vco_current_trimming, 0x7f);
// rfm22_write(RFM22_vco_calibration_override, 0x40);
// rfm22_write(RFM22_chargepump_current_trimming_override, 0x80);
rfm22_write(RFM22_tx_fifo_control1, TX_FIFO_HI_WATERMARK); // TX FIFO Almost Full Threshold (0 - 63)
rfm22_write(RFM22_tx_fifo_control2, TX_FIFO_LO_WATERMARK); // TX FIFO Almost Empty Threshold (0 - 63)
rfm22_write(RFM22_rx_fifo_control, RX_FIFO_HI_WATERMARK); // RX FIFO Almost Full Threshold (0 - 63)
#if defined(RFM22_EXT_INT_USE)
// Enable RF module external interrupt
rfm22_enableExtInt();
#endif
rfm22_setRxMode(RX_WAIT_PREAMBLE_MODE, false);
initialized = true;
return 0; // ok
}
// ************************************
#endif
/**
* @}
* @}
*/
* @}
* @}
*/

616
flight/PiOS/inc/pios_rfm22b_priv.h
View File

@ -38,6 +38,12 @@
extern const struct pios_com_driver pios_rfm22b_com_driver;
struct pios_rfm22b_cfg {
uint32_t frequencyHz;
uint32_t minFrequencyHz;
uint32_t maxFrequencyHz;
uint8_t RFXtalCap;
uint32_t maxRFBandwidth;
uint8_t maxTxPower;
uint32_t sendTimeout;
uint8_t minPacketSize;
uint8_t txWinSize;
@ -47,6 +53,616 @@ struct pios_rfm22b_cfg {
extern int32_t PIOS_RFM22B_Init(uint32_t *rfb22b_id, const struct pios_rfm22b_cfg *cfg);
// ************************************
#define RFM22_DEVICE_VERSION_V2 0x02
#define RFM22_DEVICE_VERSION_A0 0x04
#define RFM22_DEVICE_VERSION_B1 0x06
// ************************************
#define RFM22_MIN_CARRIER_FREQUENCY_HZ 240000000ul
#define RFM22_MAX_CARRIER_FREQUENCY_HZ 930000000ul
// ************************************
enum { RX_SCAN_SPECTRUM = 0,
RX_WAIT_PREAMBLE_MODE,
RX_WAIT_SYNC_MODE,
RX_DATA_MODE,
TX_DATA_MODE,
TX_STREAM_MODE,
TX_CARRIER_MODE,
TX_PN_MODE};
// ************************************
#define BIT0 (1u << 0)
#define BIT1 (1u << 1)
#define BIT2 (1u << 2)
#define BIT3 (1u << 3)
#define BIT4 (1u << 4)
#define BIT5 (1u << 5)
#define BIT6 (1u << 6)
#define BIT7 (1u << 7)
// ************************************
#define RFM22_DEVICE_TYPE 0x00 // R
#define RFM22_DT_MASK 0x1F
#define RFM22_DEVICE_VERSION 0x01 // R
#define RFM22_DV_MASK 0x1F
#define RFM22_device_status 0x02 // R
#define RFM22_ds_cps_mask 0x03 // Chip Power State mask
#define RFM22_ds_cps_idle 0x00 // IDLE Chip Power State
#define RFM22_ds_cps_rx 0x01 // RX Chip Power State
#define RFM22_ds_cps_tx 0x02 // TX Chip Power State
//#define RFM22_ds_lockdet 0x04 //
//#define RFM22_ds_freqerr 0x08 //
#define RFM22_ds_headerr 0x10 // Header Error Status. Indicates if the received packet has a header check error
#define RFM22_ds_rxffem 0x20 // RX FIFO Empty Status
#define RFM22_ds_ffunfl 0x40 // RX/TX FIFO Underflow Status
#define RFM22_ds_ffovfl 0x80 // RX/TX FIFO Overflow Status
#define RFM22_interrupt_status1 0x03 // R
#define RFM22_is1_icrerror BIT0 // CRC Error. When set to 1 the cyclic redundancy check is failed.
#define RFM22_is1_ipkvalid BIT1 // Valid Packet Received.When set to 1 a valid packet has been received.
#define RFM22_is1_ipksent BIT2 // Packet Sent Interrupt. When set to1 a valid packet has been transmitted.
#define RFM22_is1_iext BIT3 // External Interrupt. When set to 1 an interrupt occurred on one of the GPIO’s if it is programmed so. The status can be checked in register 0Eh. See GPIOx Configuration section for the details.
#define RFM22_is1_irxffafull BIT4 // RX FIFO Almost Full.When set to 1 the RX FIFO has met its almost full threshold and needs to be read by the microcontroller.
#define RFM22_is1_ixtffaem BIT5 // TX FIFO Almost Empty. When set to 1 the TX FIFO is almost empty and needs to be filled.
#define RFM22_is1_itxffafull BIT6 // TX FIFO Almost Full. When set to 1 the TX FIFO has met its almost full threshold and needs to be transmitted.
#define RFM22_is1_ifferr BIT7 // FIFO Underflow/Overflow Error. When set to 1 the TX or RX FIFO has overflowed or underflowed.
#define RFM22_interrupt_status2 0x04 // R
#define RFM22_is2_ipor BIT0 // Power-on-Reset (POR). When the chip detects a Power on Reset above the desired setting this bit will be set to 1.
#define RFM22_is2_ichiprdy BIT1 // Chip Ready (XTAL). When a chip ready event has been detected this bit will be set to 1.
#define RFM22_is2_ilbd BIT2 // Low Battery Detect. When a low battery event is been detected this bit will be set to 1. This interrupt event is saved even if it is not enabled by the mask register bit and causes an interrupt after it is enabled.
#define RFM22_is2_iwut BIT3 // Wake-Up-Timer. On the expiration of programmed wake-up timer this bit will be set to 1.
#define RFM22_is2_irssi BIT4 // RSSI. When RSSI level exceeds the programmed threshold this bit will be set to 1.
#define RFM22_is2_ipreainval BIT5 // Invalid Preamble Detected. When the preamble is not found within a period of time set by the invalid preamble detection threshold in Register 54h, this bit will be set to 1.
#define RFM22_is2_ipreaval BIT6 // Valid Preamble Detected. When a preamble is detected this bit will be set to 1.
#define RFM22_is2_iswdet BIT7 // Sync Word Detected. When a sync word is detected this bit will be set to 1.
#define RFM22_interrupt_enable1 0x05 // R/W
#define RFM22_ie1_encrcerror BIT0 // Enable CRC Error. When set to 1 the CRC Error interrupt will be enabled.
#define RFM22_ie1_enpkvalid BIT1 // Enable Valid Packet Received. When ipkvalid = 1 the Valid Packet Received Interrupt will be enabled.
#define RFM22_ie1_enpksent BIT2 // Enable Packet Sent. When ipksent =1 the Packet Sense Interrupt will be enabled.
#define RFM22_ie1_enext BIT3 // Enable External Interrupt. When set to 1 the External Interrupt will be enabled.
#define RFM22_ie1_enrxffafull BIT4 // Enable RX FIFO Almost Full. When set to 1 the RX FIFO Almost Full interrupt will be enabled.
#define RFM22_ie1_entxffaem BIT5 // Enable TX FIFO Almost Empty. When set to 1 the TX FIFO Almost Empty interrupt will be enabled.
#define RFM22_ie1_entxffafull BIT6 // Enable TX FIFO Almost Full. When set to 1 the TX FIFO Almost Full interrupt will be enabled.
#define RFM22_ie1_enfferr BIT7 // Enable FIFO Underflow/Overflow. When set to 1 the FIFO Underflow/Overflow interrupt will be enabled.
#define RFM22_interrupt_enable2 0x06 // R/W
#define RFM22_ie2_enpor BIT0 // Enable POR. When set to 1 the POR interrupt will be enabled.
#define RFM22_ie2_enchiprdy BIT1 // Enable Chip Ready (XTAL). When set to 1 the Chip Ready interrupt will be enabled.
#define RFM22_ie2_enlbd BIT2 // Enable Low Battery Detect. When set to 1 the Low Battery Detect interrupt will be enabled.
#define RFM22_ie2_enwut BIT3 // Enable Wake-Up Timer. When set to 1 the Wake-Up Timer interrupt will be enabled.
#define RFM22_ie2_enrssi BIT4 // Enable RSSI. When set to 1 the RSSI Interrupt will be enabled.
#define RFM22_ie2_enpreainval BIT5 // Enable Invalid Preamble Detected. When mpreadet =1 the Invalid Preamble Detected Interrupt will be enabled.
#define RFM22_ie2_enpreaval BIT6 // Enable Valid Preamble Detected. When mpreadet =1 the Valid Preamble Detected Interrupt will be enabled.
#define RFM22_ie2_enswdet BIT7 // Enable Sync Word Detected. When mpreadet =1 the Preamble Detected Interrupt will be enabled.
#define RFM22_op_and_func_ctrl1 0x07 // R/W
#define RFM22_opfc1_xton 0x01 // READY Mode (Xtal is ON).
#define RFM22_opfc1_pllon 0x02 // TUNE Mode (PLL is ON). When pllon = 1 the PLL will remain enabled in Idle State. This will for faster turn-around time at the cost of increased current consumption in Idle State.
#define RFM22_opfc1_rxon 0x04 // RX on in Manual Receiver Mode. Automatically cleared if Multiple Packets config. is disabled and a valid packet received.
#define RFM22_opfc1_txon 0x08 // TX on in Manual Transmit Mode. Automatically cleared in FIFO mode once the packet is sent. Transmission can be aborted during packet transmission, however, when no data has been sent yet, transmission can only be aborted after the device is programmed to “unmodulated carrier” ("Register 71h. Modulation Mode Control 2").
#define RFM22_opfc1_x32ksel 0x10 // 32,768 kHz Crystal Oscillator Select. 0: RC oscillator 1: 32 kHz crystal
#define RFM22_opfc1_enwt 0x20 // Enable Wake-Up-Timer. Enabled when enwt = 1. If the Wake-up-Timer function is enabled it will operate in any mode and notify the microcontroller through the GPIO interrupt when the timer expires.
#define RFM22_opfc1_enlbd 0x40 // Enable Low Battery Detect. When this bit is set to 1 the Low Battery Detector circuit and threshold comparison will be enabled.
#define RFM22_opfc1_swres 0x80 // Software Register Reset Bit. This bit may be used to reset all registers simultaneously to a DEFAULT state, without the need for sequentially writing to each individual register. The RESET is accomplished by setting swres = 1. This bit will be automatically cleared.
#define RFM22_op_and_func_ctrl2 0x08 // R/W
#define RFM22_opfc2_ffclrtx 0x01 // TX FIFO Reset/Clear. This has to be a two writes operation: Setting ffclrtx =1 followed by ffclrtx = 0 will clear the contents of the TX FIFO.
#define RFM22_opfc2_ffclrrx 0x02 // RX FIFO Reset/Clear. This has to be a two writes operation: Setting ffclrrx =1 followed by ffclrrx = 0 will clear the contents of the RX FIFO.
#define RFM22_opfc2_enldm 0x04 // Enable Low Duty Cycle Mode. If this bit is set to 1 then the chip turns on the RX regularly. The frequency should be set in the Wake-Up Timer Period register, while the minimum ON time should be set in the Low-Duty Cycle Mode Duration register. The FIFO mode should be enabled also.
#define RFM22_opfc2_autotx 0x08 // Automatic Transmission. When autotx = 1 the transceiver will enter automatically TX State when the FIFO is almost full. When the FIFO is empty it will automatically return to the Idle State.
#define RFM22_opfc2_rxmpk 0x10 // RX Multi Packet. When the chip is selected to use FIFO Mode (dtmod[1:0]) and RX Packet Handling (enpacrx) then it will fill up the FIFO with multiple valid packets if this bit is set, otherwise the transceiver will automatically leave the RX State after the first valid packet has been received.
#define RFM22_opfc2_antdiv_mask 0xE0 // Enable Antenna Diversity. The GPIO must be configured for Antenna Diversity for the algorithm to work properly.
#define RFM22_xtal_osc_load_cap 0x09 // R/W
#define RFM22_xolc_xlc_mask 0x7F // Tuning Capacitance for the 30 MHz XTAL.
#define RFM22_xolc_xtalshft 0x80 // Additional capacitance to course shift the frequency if xlc[6:0] is not sufficient. Not binary with xlc[6:0].
#define RFM22_cpu_output_clk 0x0A // R/W
#define RFM22_coc_30MHz 0x00
#define RFM22_coc_15MHz 0x01
#define RFM22_coc_10MHz 0x02
#define RFM22_coc_4MHz 0x03
#define RFM22_coc_3MHz 0x04
#define RFM22_coc_2MHz 0x05
#define RFM22_coc_1MHz 0x06
#define RFM22_coc_32768Hz 0x07
#define RFM22_coc_enlfc 0x08
#define RFM22_coc_0cycle 0x00
#define RFM22_coc_128cycles 0x10
#define RFM22_coc_256cycles 0x20
#define RFM22_coc_512cycles 0x30
#define RFM22_gpio0_config 0x0B // R/W
#define RFM22_gpio0_config_por 0x00 // Power-On-Reset (output)
#define RFM22_gpio0_config_wut 0x01 // Wake-Up Timer: 1 when WUT has expired (output)
#define RFM22_gpio0_config_lbd 0x02 // Low Battery Detect: 1 when battery is below threshold setting (output)
#define RFM22_gpio0_config_ddi 0x03 // Direct Digital Input
#define RFM22_gpio0_config_eife 0x04 // External Interrupt, falling edge (input)
#define RFM22_gpio0_config_eire 0x05 // External Interrupt, rising edge (input)
#define RFM22_gpio0_config_eisc 0x06 // External Interrupt, state change (input)
#define RFM22_gpio0_config_ai 0x07 // ADC Analog Input
#define RFM22_gpio0_config_atni 0x08 // Reserved (Analog Test N Input)
#define RFM22_gpio0_config_atpi 0x09 // Reserved (Analog Test P Input)
#define RFM22_gpio0_config_ddo 0x0A // Direct Digital Output
#define RFM22_gpio0_config_dto 0x0B // Reserved (Digital Test Output)
#define RFM22_gpio0_config_atno 0x0C // Reserved (Analog Test N Output)
#define RFM22_gpio0_config_atpo 0x0D // Reserved (Analog Test P Output)
#define RFM22_gpio0_config_rv 0xOE // Reference Voltage (output)
#define RFM22_gpio0_config_dclk 0x0F // TX/RX Data CLK output to be used in conjunction with TX/RX Data pin (output)
#define RFM22_gpio0_config_txd 0x10 // TX Data input for direct modulation (input)
#define RFM22_gpio0_config_err 0x11 // External Retransmission Request (input)
#define RFM22_gpio0_config_txstate 0x12 // TX State (output)
#define RFM22_gpio0_config_txfifoaf 0x13 // TX FIFO Almost Full (output)
#define RFM22_gpio0_config_rxd 0x14 // RX Data (output)
#define RFM22_gpio0_config_rxstate 0x15 // RX State (output)
#define RFM22_gpio0_config_rxfifoaf 0x16 // RX FIFO Almost Full (output)
#define RFM22_gpio0_config_antswt1 0x17 // Antenna 1 Switch used for antenna diversity (output)
#define RFM22_gpio0_config_antswt2 0x18 // Antenna 2 Switch used for antenna diversity (output)
#define RFM22_gpio0_config_vpd 0x19 // Valid Preamble Detected (output)
#define RFM22_gpio0_config_ipd 0x1A // Invalid Preamble Detected (output)
#define RFM22_gpio0_config_swd 0x1B // Sync Word Detected (output)
#define RFM22_gpio0_config_cca 0x1C // Clear Channel Assessment (output)
#define RFM22_gpio0_config_vdd 0x1D // VDD
#define RFM22_gpio0_config_pup 0x20
#define RFM22_gpio0_config_drv0 0x00 // output drive level
#define RFM22_gpio0_config_drv1 0x40 // output drive level
#define RFM22_gpio0_config_drv2 0x80 // output drive level
#define RFM22_gpio0_config_drv3 0xC0 // output drive level
#define RFM22_gpio1_config 0x0C // R/W
#define RFM22_gpio1_config_ipor 0x00 // Inverted Power-On-Reset (output)
#define RFM22_gpio1_config_wut 0x01 // Wake-Up Timer: 1 when WUT has expired (output)
#define RFM22_gpio1_config_lbd 0x02 // Low Battery Detect: 1 when battery is below threshold setting (output)
#define RFM22_gpio1_config_ddi 0x03 // Direct Digital Input
#define RFM22_gpio1_config_eife 0x04 // External Interrupt, falling edge (input)
#define RFM22_gpio1_config_eire 0x05 // External Interrupt, rising edge (input)
#define RFM22_gpio1_config_eisc 0x06 // External Interrupt, state change (input)
#define RFM22_gpio1_config_ai 0x07 // ADC Analog Input
#define RFM22_gpio1_config_atni 0x08 // Reserved (Analog Test N Input)
#define RFM22_gpio1_config_atpi 0x09 // Reserved (Analog Test P Input)
#define RFM22_gpio1_config_ddo 0x0A // Direct Digital Output
#define RFM22_gpio1_config_dto 0x0B // Reserved (Digital Test Output)
#define RFM22_gpio1_config_atno 0x0C // Reserved (Analog Test N Output)
#define RFM22_gpio1_config_atpo 0x0D // Reserved (Analog Test P Output)
#define RFM22_gpio1_config_rv 0xOE // Reference Voltage (output)
#define RFM22_gpio1_config_dclk 0x0F // TX/RX Data CLK output to be used in conjunction with TX/RX Data pin (output)
#define RFM22_gpio1_config_txd 0x10 // TX Data input for direct modulation (input)
#define RFM22_gpio1_config_err 0x11 // External Retransmission Request (input)
#define RFM22_gpio1_config_txstate 0x12 // TX State (output)
#define RFM22_gpio1_config_txfifoaf 0x13 // TX FIFO Almost Full (output)
#define RFM22_gpio1_config_rxd 0x14 // RX Data (output)
#define RFM22_gpio1_config_rxstate 0x15 // RX State (output)
#define RFM22_gpio1_config_rxfifoaf 0x16 // RX FIFO Almost Full (output)
#define RFM22_gpio1_config_antswt1 0x17 // Antenna 1 Switch used for antenna diversity (output)
#define RFM22_gpio1_config_antswt2 0x18 // Antenna 2 Switch used for antenna diversity (output)
#define RFM22_gpio1_config_vpd 0x19 // Valid Preamble Detected (output)
#define RFM22_gpio1_config_ipd 0x1A // Invalid Preamble Detected (output)
#define RFM22_gpio1_config_swd 0x1B // Sync Word Detected (output)
#define RFM22_gpio1_config_cca 0x1C // Clear Channel Assessment (output)
#define RFM22_gpio1_config_vdd 0x1D // VDD
#define RFM22_gpio1_config_pup 0x20
#define RFM22_gpio1_config_drv0 0x00 // output drive level
#define RFM22_gpio1_config_drv1 0x40 // output drive level
#define RFM22_gpio1_config_drv2 0x80 // output drive level
#define RFM22_gpio1_config_drv3 0xC0 // output drive level
#define RFM22_gpio2_config 0x0D // R/W
#define RFM22_gpio2_config_mc 0x00 // Microcontroller Clock (output)
#define RFM22_gpio2_config_wut 0x01 // Wake-Up Timer: 1 when WUT has expired (output)
#define RFM22_gpio2_config_lbd 0x02 // Low Battery Detect: 1 when battery is below threshold setting (output)
#define RFM22_gpio2_config_ddi 0x03 // Direct Digital Input
#define RFM22_gpio2_config_eife 0x04 // External Interrupt, falling edge (input)
#define RFM22_gpio2_config_eire 0x05 // External Interrupt, rising edge (input)
#define RFM22_gpio2_config_eisc 0x06 // External Interrupt, state change (input)
#define RFM22_gpio2_config_ai 0x07 // ADC Analog Input
#define RFM22_gpio2_config_atni 0x08 // Reserved (Analog Test N Input)
#define RFM22_gpio2_config_atpi 0x09 // Reserved (Analog Test P Input)
#define RFM22_gpio2_config_ddo 0x0A // Direct Digital Output
#define RFM22_gpio2_config_dto 0x0B // Reserved (Digital Test Output)
#define RFM22_gpio2_config_atno 0x0C // Reserved (Analog Test N Output)
#define RFM22_gpio2_config_atpo 0x0D // Reserved (Analog Test P Output)
#define RFM22_gpio2_config_rv 0xOE // Reference Voltage (output)
#define RFM22_gpio2_config_dclk 0x0F // TX/RX Data CLK output to be used in conjunction with TX/RX Data pin (output)
#define RFM22_gpio2_config_txd 0x10 // TX Data input for direct modulation (input)
#define RFM22_gpio2_config_err 0x11 // External Retransmission Request (input)
#define RFM22_gpio2_config_txstate 0x12 // TX State (output)
#define RFM22_gpio2_config_txfifoaf 0x13 // TX FIFO Almost Full (output)
#define RFM22_gpio2_config_rxd 0x14 // RX Data (output)
#define RFM22_gpio2_config_rxstate 0x15 // RX State (output)
#define RFM22_gpio2_config_rxfifoaf 0x16 // RX FIFO Almost Full (output)
#define RFM22_gpio2_config_antswt1 0x17 // Antenna 1 Switch used for antenna diversity (output)
#define RFM22_gpio2_config_antswt2 0x18 // Antenna 2 Switch used for antenna diversity (output)
#define RFM22_gpio2_config_vpd 0x19 // Valid Preamble Detected (output)
#define RFM22_gpio2_config_ipd 0x1A // Invalid Preamble Detected (output)
#define RFM22_gpio2_config_swd 0x1B // Sync Word Detected (output)
#define RFM22_gpio2_config_cca 0x1C // Clear Channel Assessment (output)
#define RFM22_gpio2_config_vdd 0x1D // VDD
#define RFM22_gpio2_config_pup 0x20
#define RFM22_gpio2_config_drv0 0x00 // output drive level
#define RFM22_gpio2_config_drv1 0x40 // output drive level
#define RFM22_gpio2_config_drv2 0x80 // output drive level
#define RFM22_gpio2_config_drv3 0xC0 // output drive level
#define RFM22_io_port_config 0x0E // R/W
#define RFM22_io_port_extitst2 0x40 // External Interrupt Status. If the GPIO2 is programmed to be external interrupt sources then the status can be read here.
#define RFM22_io_port_extitst1 0x20 // External Interrupt Status. If the GPIO1 is programmed to be external interrupt sources then the status can be read here.
#define RFM22_io_port_extitst0 0x10 // External Interrupt Status. If the GPIO0 is programmed to be external interrupt sources then the status can be read here.
#define RFM22_io_port_itsdo 0x08 // Interrupt Request Output on the SDO Pin. nIRQ output is present on the SDO pin if this bit is set and the nSEL input is inactive (high).
#define RFM22_io_port_dio2 0x04 // Direct I/O for GPIO2. If the GPIO2 is configured to be a direct output then the value on the GPIO pin can be set here. If the GPIO2 is configured to be a direct input then the value of the pin can be read here.
#define RFM22_io_port_dio1 0x02 // Direct I/O for GPIO1. If the GPIO1 is configured to be a direct output then the value on the GPIO pin can be set here. If the GPIO1 is configured to be a direct input then the value of the pin can be read here.
#define RFM22_io_port_dio0 0x01 // Direct I/O for GPIO0. If the GPIO0 is configured to be a direct output then the value on the GPIO pin can be set here. If the GPIO0 is configured to be a direct input then the value of the pin can be read here.
#define RFM22_io_port_default 0x00 // GPIO pins are default
#define RFM22_adc_config 0x0F // R/W
#define RFM22_ac_adcgain0 0x00
#define RFM22_ac_adcgain1 0x01
#define RFM22_ac_adcgain2 0x02
#define RFM22_ac_adcgain3 0x03
#define RFM22_ac_adcref_bg 0x00
#define RFM22_ac_adcref_vdd3 0x08
#define RFM22_ac_adcref_vdd2 0x0C
#define RFM22_ac_adcsel_temp_sensor 0x00
#define RFM22_ac_adcsel_gpio0 0x10
#define RFM22_ac_adcsel_gpio1 0x20
#define RFM22_ac_adcsel_gpio2 0x30
#define RFM22_ac_adcsel_gpio01 0x40
#define RFM22_ac_adcsel_gpio12 0x50
#define RFM22_ac_adcsel_gpio02 0x60
#define RFM22_ac_adcsel_gpio_gnd 0x70
#define RFM22_ac_adcstartbusy 0x80
#define RFM22_adc_sensor_amp_offset 0x10 // R/W
#define RFM22_asao_adcoffs_mask 0x0F // ADC Sensor Amplifier Offset. The offset can be calculated as Offset = adcoffs[2:0] x VDD/1000; MSB = adcoffs[3] = Sign bit.
#define RFM22_adc_value 0x11 // R .. Internal 8 bit ADC Output Value.
#define RFM22_temp_sensor_calib 0x12 // R/W
#define RFM22_tsc_tstrim_mask 0x0F // Temperature Sensor Trim Value.
#define RFM22_tsc_entstrim 0x10 // Temperature Sensor Trim Enable.
#define RFM22_tsc_entsoffs 0x20 // Temperature Sensor Offset to Convert from K to ºC.
#define RFM22_tsc_tsrange0 0x00 // Temperature Sensor Range Selection. –64C to +64C 0.5C resolution
#define RFM22_tsc_tsrange1 0x40 // -40 to +85C with 1.0C resolution
#define RFM22_tsc_tsrange2 0x80 // 0C to 85C with 0.5C resolution
#define RFM22_tsc_tsrange3 0xC0 // -40F to 216F with 1.0F resolution
#define RFM22_temp_value_offset 0x13 // R/W
#define RFM22_wakeup_timer_period1 0x14 // R/W
#define RFM22_wakeup_timer_period2 0x15 // R/W
#define RFM22_wakeup_timer_period3 0x16 // R/W
#define RFM22_wakeup_timer_value1 0x17 // R
#define RFM22_wakeup_timer_value2 0x18 // R
#define RFM22_low_dutycycle_mode_duration 0x19 // R/W
#define RFM22_low_battery_detector_threshold 0x1A // R/W
#define RFM22_battery_volateg_level 0x1B // R
#define RFM22_if_filter_bandwidth 0x1C // R/W
#define RFM22_iffbw_filset_mask 0x0F
#define RFM22_iffbw_ndec_exp_mask 0x70
#define RFM22_iffbw_dwn3_bypass 0x80
#define RFM22_afc_loop_gearshift_override 0x1D // R/W
#define RFM22_afc_lp_gs_ovrd_afcgearl_mask 0x07 // AFC Low Gear Setting.
#define RFM22_afc_lp_gs_ovrd_afcgearh_mask 0x38 // AFC High Gear Setting.
#define RFM22_afc_lp_gs_ovrd_enafc 0x40 // AFC Enable.
#define RFM22_afc_lp_gs_ovrd_afcbd 0x80 // If set, the tolerated AFC frequency error will be halved.
#define RFM22_afc_timing_control 0x1E // R/W
#define RFM22_clk_recovery_gearshift_override 0x1F // R/W
#define RFM22_clk_recovery_oversampling_ratio 0x20 // R/W
#define RFM22_clk_recovery_offset2 0x21 // R/W
#define RFM22_clk_recovery_offset1 0x22 // R/W
#define RFM22_clk_recovery_offset0 0x23 // R/W
#define RFM22_clk_recovery_timing_loop_gain1 0x24 // R/W
#define RFM22_clk_recovery_timing_loop_gain0 0x25 // R/W
#define RFM22_rssi 0x26 // R
#define RFM22_rssi_threshold_clear_chan_indicator 0x27 // R/W
#define RFM22_antenna_diversity_register1 0x28 // R
#define RFM22_antenna_diversity_register2 0x29 // R
#define RFM22_afc_limiter 0x2A // R/W .. AFC_pull_in_range = ±AFCLimiter[7:0] x (hbsel+1) x 625 Hz
#define RFM22_afc_correction_read 0x2B // R
#define RFM22_ook_counter_value1 0x2C // R/W
#define RFM22_ook_counter_value2 0x2D // R/W
#define RFM22_slicer_peak_hold 0x2E // R/W
#define RFM22_data_access_control 0x30 // R/W
#define RFM22_dac_crc_ccitt 0x00 //
#define RFM22_dac_crc_crc16 0x01 //
#define RFM22_dac_crc_iec16 0x02 //
#define RFM22_dac_crc_biacheva 0x03 //
#define RFM22_dac_encrc 0x04 // CRC Enable. Cyclic Redundancy Check generation is enabled if this bit is set.
#define RFM22_dac_enpactx 0x08 // Enable Packet TX Handling. If FIFO Mode (dtmod = 10) is being used automatic packet handling may be enabled. Setting enpactx = 1 will enable automatic packet handling in the TX path. Register 30–4D allow for various configurations of the packet structure. Setting enpactx = 0 will not do any packet handling in the TX path. It will only transmit what is loaded to the FIFO.
#define RFM22_dac_skip2ph 0x10 // Skip 2nd Phase of Preamble Detection. If set, we skip the second phase of the preamble detection (under certain conditions) if antenna diversity is enabled.
#define RFM22_dac_crcdonly 0x20 // CRC Data Only Enable. When this bit is set to 1 the CRC is calculated on and checked against the packet data fields only.
#define RFM22_dac_lsbfrst 0x40 // LSB First Enable. The LSB of the data will be transmitted/received first if this bit is set.
#define RFM22_dac_enpacrx 0x80 // Enable Packet RX Handling. If FIFO Mode (dtmod = 10) is being used automatic packet handling may be enabled. Setting enpacrx = 1 will enable automatic packet handling in the RX path. Register 30–4D allow for various configurations of the packet structure. Setting enpacrx = 0 will not do any packet handling in the RX path. It will only receive everything after the sync word and fill up the RX FIFO.
#define RFM22_ezmac_status 0x31 // R
#define RFM22_ezmac_status_pksent 0x01 // Packet Sent. A 1 a packet has been sent by the radio. (Same bit as in register 03, but reading it does not reset the IRQ)
#define RFM22_ezmac_status_pktx 0x02 // Packet Transmitting. When 1 the radio is currently transmitting a packet.
#define RFM22_ezmac_status_crcerror 0x04 // CRC Error. When 1 a Cyclic Redundancy Check error has been detected. (Same bit as in register 03, but reading it does not reset the IRQ)
#define RFM22_ezmac_status_pkvalid 0x08 // Valid Packet Received. When a 1 a valid packet has been received by the receiver. (Same bit as in register 03, but reading it does not reset the IRQ)
#define RFM22_ezmac_status_pkrx 0x10 // Packet Receiving. When 1 the radio is currently receiving a valid packet.
#define RFM22_ezmac_status_pksrch 0x20 // Packet Searching. When 1 the radio is searching for a valid packet.
#define RFM22_ezmac_status_rxcrc1 0x40 // If high, it indicates the last CRC received is all one’s. May indicated Transmitter underflow in case of CRC error.
#define RFM22_header_control1 0x32 // R/W
#define RFM22_header_cntl1_bcen_none 0x00 // No broadcast address enable.
#define RFM22_header_cntl1_bcen_0 0x10 // Broadcast address enable for header byte 0.
#define RFM22_header_cntl1_bcen_1 0x20 // Broadcast address enable for header byte 1.
#define RFM22_header_cntl1_bcen_01 0x30 // Broadcast address enable for header bytes 0 & 1.
#define RFM22_header_cntl1_hdch_none 0x00 // No Received Header check
#define RFM22_header_cntl1_hdch_0 0x01 // Received Header check for byte 0.
#define RFM22_header_cntl1_hdch_1 0x02 // Received Header check for byte 1.
#define RFM22_header_cntl1_hdch_01 0x03 // Received Header check for bytes 0 & 1.
#define RFM22_header_control2 0x33 // R/W
#define RFM22_header_cntl2_prealen 0x01 // MSB of Preamble Length. See register Preamble Length.
#define RFM22_header_cntl2_synclen_3 0x00 // Synchronization Word 3
#define RFM22_header_cntl2_synclen_32 0x02 // Synchronization Word 3 followed by 2
#define RFM22_header_cntl2_synclen_321 0x04 // Synchronization Word 3 followed by 2 followed by 1
#define RFM22_header_cntl2_synclen_3210 0x06 // Synchronization Word 3 followed by 2 followed by 1 followed by 0
#define RFM22_header_cntl2_fixpklen 0x08 // Fix Packet Length. When fixpklen = 1 the packet length (pklen[7:0]) is not included in the header. When fixpklen = 0 the packet length is included in the header.
#define RFM22_header_cntl2_hdlen_none 0x00 // no header
#define RFM22_header_cntl2_hdlen_3 0x10 // header 3
#define RFM22_header_cntl2_hdlen_32 0x20 // header 3 and 2
#define RFM22_header_cntl2_hdlen_321 0x30 // header 3 and 2 and 1
#define RFM22_header_cntl2_hdlen_3210 0x40 // header 3 and 2 and 1 and 0
#define RFM22_header_cntl2_skipsyn 0x80 // If high, the system will ignore the syncword search timeout reset. The chip will not return to searching for Preamble, but instead will remain searching for Sync word.
#define RFM22_preamble_length 0x34 // R/W
#define RFM22_preamble_detection_ctrl1 0x35 // R/W
#define RFM22_pre_det_ctrl1_preath_mask 0xF8 // Number of nibbles processed during detection.
#define RFM22_pre_det_ctrl1_rssi_offset_mask 0x07 // Value added as offset to RSSI calculation. Every increment in this register results in an increment of +4 dB in the RSSI.
#define RFM22_sync_word3 0x36 // R/W
#define RFM22_sync_word2 0x37 // R/W
#define RFM22_sync_word1 0x38 // R/W
#define RFM22_sync_word0 0x39 // R/W
#define RFM22_transmit_header3 0x3A // R/W
#define RFM22_transmit_header2 0x3B // R/W
#define RFM22_transmit_header1 0x3C // R/W
#define RFM22_transmit_header0 0x3D // R/W
#define RFM22_transmit_packet_length 0x3E // R/W
#define RFM22_check_header3 0x3F // R/W
#define RFM22_check_header2 0x40 // R/W
#define RFM22_check_header1 0x41 // R/W
#define RFM22_check_header0 0x42 // R/W
#define RFM22_header_enable3 0x43 // R/W
#define RFM22_header_enable2 0x44 // R/W
#define RFM22_header_enable1 0x45 // R/W
#define RFM22_header_enable0 0x46 // R/W
#define RFM22_received_header3 0x47 // R
#define RFM22_received_header2 0x48 // R
#define RFM22_received_header1 0x49 // R
#define RFM22_received_header0 0x4A // R
#define RFM22_received_packet_length 0x4B // R
#define RFM22_adc8_control 0x4F // R/W
/*
#define RFM22_analog_test_bus 0x50 // R/W
#define RFM22_digital_test_bus 0x51 // R/W
#define RFM22_tx_ramp_control 0x52 // R/W
#define RFM22_pll_tune_time 0x53 // R/W
#define RFM22_calibration_control 0x55 // R/W
#define RFM22_modem_test 0x56 // R/W
#define RFM22_chargepump_test 0x57 // R/W
#define RFM22_chargepump_current_trimming_override 0x58 // R/W
#define RFM22_divider_current_trimming 0x59 // R/W
#define RFM22_vco_current_trimming 0x5A // R/W
#define RFM22_vco_calibration_override 0x5B // R/W
#define RFM22_synthersizer_test 0x5C // R/W
#define RFM22_block_enable_override1 0x5D // R/W
#define RFM22_block_enable_override2 0x5E // R/W
#define RFM22_block_enable_override3 0x5F // R/W
*/
#define RFM22_channel_filter_coeff_addr 0x60 // R/W
#define RFM22_ch_fil_coeff_ad_inv_pre_th_mask 0xF0 //
#define RFM22_ch_fil_coeff_ad_chfiladd_mask 0x0F // Channel Filter Coefficient Look-up Table Address. The address for channel filter coefficients used in the RX path.
//#define RFM22_channel_filter_coeff_value 0x61 // R/W
#define RFM22_xtal_osc_por_ctrl 0x62 // R/W
#define RFM22_xtal_osc_por_ctrl_pwst_mask 0xE0 // Internal Power States of the Chip.
#define RFM22_xtal_osc_por_ctrl_clkhyst 0x10 // Clock Hysteresis Setting.
#define RFM22_xtal_osc_por_ctrl_enbias2x 0x08 // 2 Times Higher Bias Current Enable.
#define RFM22_xtal_osc_por_ctrl_enamp2x 0x04 // 2 Times Higher Amplification Enable.
#define RFM22_xtal_osc_por_ctrl_bufovr 0x02 // Output Buffer Enable Override.
#define RFM22_xtal_osc_por_ctrl_enbuf 0x01 // Output Buffer Enable.
/*
#define RFM22_rc_osc_coarse_calbration_override 0x63 // R/W
#define RFM22_rc_osc_fine_calbration_override 0x64 // R/W
#define RFM22_ldo_control_override 0x65 // R/W
#define RFM22_ldo_level_setting 0x66 // R/W
#define RFM22_deltasigma_adc_tuning1 0x67 // R/W
#define RFM22_deltasigma_adc_tuning2 0x68 // R/W
*/
#define RFM22_agc_override1 0x69 // R/W
#define RFM22_agc_ovr1_sgi 0x40 // AGC Loop, Set Gain Increase. If set to 0 then gain increasing will not be allowed. If set to 1 then gain increasing is allowed, default is 0.
#define RFM22_agc_ovr1_agcen 0x20 // Automatic Gain Control Enable. When this bit is set then the result of the control can be read out from bits [4:0], otherwise the gain can be controlled manually by writing into bits [4:0].
#define RFM22_agc_ovr1_lnagain 0x10 // LNA Gain Select. 0 = min gain = 5dB, 1 = max gain = 25 dB.
#define RFM22_agc_ovr1_pga_mask 0x0F // PGA Gain Override Value.
//#define RFM22_agc_override2 0x6A // R/W
//#define RFM22_gfsk_fir_coeff_addr 0x6B // R/W
//#define RFM22_gfsk_fir_coeff_value 0x6C // R/W
#define RFM22_tx_power 0x6D // R/W
#define RFM22_tx_pwr_txpow_0 0x00 // +1dBm .. 1.25mW
#define RFM22_tx_pwr_txpow_1 0x01 // +2dBm .. 1.6mW
#define RFM22_tx_pwr_txpow_2 0x02 // +5dBm .. 3.16mW
#define RFM22_tx_pwr_txpow_3 0x03 // +8dBm .. 6.3mW
#define RFM22_tx_pwr_txpow_4 0x04 // +11dBm .. 12.6mW
#define RFM22_tx_pwr_txpow_5 0x05 // +14dBm .. 25mW
#define RFM22_tx_pwr_txpow_6 0x06 // +17dBm .. 50mW
#define RFM22_tx_pwr_txpow_7 0x07 // +20dBm .. 100mW
#define RFM22_tx_pwr_lna_sw 0x08 // LNA Switch Controller. If set, lna_sw control from the digital will go high during TX modes, and low during other times. If reset, the digital control signal is low at all times.
#define RFM22_tx_pwr_papeaklvl_0 0x10 // " "
#define RFM22_tx_pwr_papeaklvl_1 0x20 // PA Peak Detect Level (direct from register). 00 = 6.5, 01 = 7, 10 = 7.5, 11 = 8, 00 = default
#define RFM22_tx_pwr_papeaken 0x40 // PA Peak Detector Enable.
#define RFM22_tx_pwr_papeakval 0x80 // PA Peak Detector Value Read Register. Reading a 1 in this register when the papeaken=1 then the PA drain voltage is too high and the match network needs adjusting for optimal efficiency.
#define RFM22_tx_data_rate1 0x6E // R/W
#define RFM22_tx_data_rate0 0x6F // R/W
#define RFM22_modulation_mode_control1 0x70 // R/W
#define RFM22_mmc1_enwhite 0x01 // Data Whitening is Enabled if this bit is set.
#define RFM22_mmc1_enmanch 0x02 // Manchester Coding is Enabled if this bit is set.
#define RFM22_mmc1_enmaninv 0x04 // Manchester Data Inversion is Enabled if this bit is set.
#define RFM22_mmc1_manppol 0x08 // Manchester Preamble Polarity (will transmit a series of 1 if set, or series of 0 if reset).
#define RFM22_mmc1_enphpwdn 0x10 // If set, the Packet Handler will be powered down when chip is in low power mode.
#define RFM22_mmc1_txdtrtscale 0x20 // This bit should be set for Data Rates below 30 kbps.
#define RFM22_modulation_mode_control2 0x71 // R/W
#define RFM22_mmc2_modtyp_mask 0x03 // Modulation type.
#define RFM22_mmc2_modtyp_none 0x00 //
#define RFM22_mmc2_modtyp_ook 0x01 //
#define RFM22_mmc2_modtyp_fsk 0x02 //
#define RFM22_mmc2_modtyp_gfsk 0x03 //
#define RFM22_mmc2_fd 0x04 // MSB of Frequency Deviation Setting, see "Register 72h. Frequency Deviation".
#define RFM22_mmc2_eninv 0x08 // Invert TX and RX Data.
#define RFM22_mmc2_dtmod_mask 0x30 // Modulation source.
#define RFM22_mmc2_dtmod_dm_gpio 0x00 //
#define RFM22_mmc2_dtmod_dm_sdi 0x10 //
#define RFM22_mmc2_dtmod_fifo 0x20 //
#define RFM22_mmc2_dtmod_pn9 0x30 //
#define RFM22_mmc2_trclk_mask 0xC0 // TX Data Clock Configuration.
#define RFM22_mmc2_trclk_clk_none 0x00 //
#define RFM22_mmc2_trclk_clk_gpio 0x40 //
#define RFM22_mmc2_trclk_clk_sdo 0x80 //
#define RFM22_mmc2_trclk_clk_nirq 0xC0 //
#define RFM22_frequency_deviation 0x72 // R/W
#define RFM22_frequency_offset1 0x73 // R/W
#define RFM22_frequency_offset2 0x74 // R/W
#define RFM22_frequency_band_select 0x75 // R/W
#define RFM22_fb_mask 0x1F
#define RFM22_fbs_hbsel 0x20
#define RFM22_fbs_sbse 0x40
#define RFM22_nominal_carrier_frequency1 0x76 // R/W
#define RFM22_nominal_carrier_frequency0 0x77 // R/W
#define RFM22_frequency_hopping_channel_select 0x79 // R/W
#define RFM22_frequency_hopping_step_size 0x7A // R/W
#define RFM22_tx_fifo_control1 0x7C // R/W .. TX FIFO Almost Full Threshold (0 - 63)
#define RFM22_tx_fifo_control1_mask 0x3F
#define RFM22_tx_fifo_control2 0x7D // R/W .. TX FIFO Almost Empty Threshold (0 - 63)
#define RFM22_tx_fifo_control2_mask 0x3F
#define RFM22_rx_fifo_control 0x7E // R/W .. RX FIFO Almost Full Threshold (0 - 63)
#define RFM22_rx_fifo_control_mask 0x3F
#define RFM22_fifo_access 0x7F // R/W
// ************************************
typedef int16_t ( *t_rfm22_TxDataByteCallback ) (void);
typedef bool ( *t_rfm22_RxDataCallback ) (void *data, uint8_t len);
// ************************************
uint32_t rfm22_minFrequency(void);
uint32_t rfm22_maxFrequency(void);
void rfm22_setNominalCarrierFrequency(uint32_t frequency_hz);
uint32_t rfm22_getNominalCarrierFrequency(void);
float rfm22_getFrequencyStepSize(void);
void rfm22_setFreqHopChannel(uint8_t channel);
uint8_t rfm22_freqHopChannel(void);
uint32_t rfm22_freqHopSize(void);
void rfm22_setDatarate(uint32_t datarate_bps, bool data_whitening);
uint32_t rfm22_getDatarate(void);
void rfm22_setRxMode(uint8_t mode, bool multi_packet_mode);
int16_t rfm22_getRSSI(void);
int16_t rfm22_receivedRSSI(void);
int32_t rfm22_receivedAFCHz(void);
uint16_t rfm22_receivedLength(void);
uint8_t * rfm22_receivedPointer(void);
void rfm22_receivedDone(void);
int32_t rfm22_sendData(void *data, uint16_t length, bool send_immediately);
void rfm22_setFreqCalibration(uint8_t value);
uint8_t rfm22_getFreqCalibration(void);
void rfm22_setTxPower(uint8_t tx_pwr);
uint8_t rfm22_getTxPower(void);
void rfm22_setTxStream(void); // TEST ONLY
void rfm22_setTxNormal(void);
void rfm22_setTxCarrierMode(void);
void rfm22_setTxPNMode(void);
int8_t rfm22_currentMode(void);
bool rfm22_transmitting(void);
bool rfm22_channelIsClear(void);
bool rfm22_txReady(void);
void rfm22_1ms_tick(void);
void rfm22_process(void);
void rfm22_TxDataByte_SetCallback(t_rfm22_TxDataByteCallback new_function);
void rfm22_RxData_SetCallback(t_rfm22_RxDataCallback new_function);
int rfm22_init_scan_spectrum(uint32_t min_frequency_hz, uint32_t max_frequency_hz);
int rfm22_init_tx_stream(uint32_t min_frequency_hz, uint32_t max_frequency_hz);
int rfm22_init_rx_stream(uint32_t min_frequency_hz, uint32_t max_frequency_hz);
int rfm22_init_normal(uint32_t min_frequency_hz, uint32_t max_frequency_hz, uint32_t freq_hop_step_size);
#endif /* PIOS_RFM22B_PRIV_H */
/**

8
flight/PipXtreme/System/pios_board.c
View File

@ -199,6 +199,10 @@ void PIOS_Board_Init(void) {
PIOS_Assert(0);
}
}
PIOS_COM_SendString(PIOS_COM_DEBUG, "Hello DEBUG\n\r");
PIOS_COM_SendString(PIOS_COM_FLEXI, "Hello Flexi\n\r");
PIOS_COM_SendString(PIOS_COM_TELEM_SERIAL, "Hello Telem Serial\n\r");
PIOS_COM_SendString(PIOS_COM_VCP_USB, "Hello VCP\n\r");
#if defined(PIOS_INCLUDE_RFM22B)
/* Initalize the RFM22B radio COM device. */
@ -218,10 +222,6 @@ void PIOS_Board_Init(void) {
}
}
#endif /* PIOS_INCLUDE_RFM22B */
PIOS_COM_SendString(PIOS_COM_DEBUG, "Hello DEBUG\n\r");
PIOS_COM_SendString(PIOS_COM_FLEXI, "Hello Flexi\n\r");
PIOS_COM_SendString(PIOS_COM_TELEM_SERIAL, "Hello Telem Serial\n\r");
PIOS_COM_SendString(PIOS_COM_VCP_USB, "Hello VCP\n\r");
/* Remap AFIO pin */
GPIO_PinRemapConfig( GPIO_Remap_SWJ_NoJTRST, ENABLE);

101
flight/PipXtreme/inc/packet_handler.h
View File

@ -1,13 +1,9 @@
/**
******************************************************************************
* @addtogroup OpenPilotSystem OpenPilot System
* @{
* @addtogroup OpenPilotLibraries OpenPilot System Libraries
* @{
*
* @file packet_handler.h
* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2012.
* @brief A packet handler for handeling radio packet transmission.
* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2010.
* @brief Modem packet handling routines
* @see The GNU Public License (GPL) Version 3
*
*****************************************************************************/
@ -30,64 +26,51 @@
#ifndef __PACKET_HANDLER_H__
#define __PACKET_HANDLER_H__
// Public types
typedef enum {
PACKET_TYPE_NONE = 0,
PACKET_TYPE_CONNECT, // for requesting a connection
PACKET_TYPE_DISCONNECT, // to tell the other modem they cannot connect to us
PACKET_TYPE_READY, // tells the other modem we are ready to accept more data
PACKET_TYPE_NOTREADY, // tells the other modem we're not ready to accept more data - we can also send user data in this packet type
PACKET_TYPE_DATARATE, // for changing the RF data rate
PACKET_TYPE_PING, // used to check link is still up
PACKET_TYPE_ADJUST_TX_PWR, // used to ask the other modem to adjust it's tx power
PACKET_TYPE_DATA, // data packet (packet contains user data)
PACKET_TYPE_ACKED_DATA, // data packet that requies an ACK
PACKET_TYPE_RECEIVER, // Receiver relay values
PACKET_TYPE_ACK
} PHPacketType;
#include "stdint.h"
typedef struct {
uint32_t source_id;
uint32_t destination_id;
uint8_t type;
uint8_t tx_seq;
uint8_t rx_seq;
uint8_t data_size;
} PHPacketHeader;
// *****************************************************************************
#define PH_MAX_DATA (255 - sizeof(PHPacketHeader))
typedef struct {
PHPacketHeader header;
uint8_t data[PH_MAX_DATA];
} PHPacket, *PHPacketHandle;
#define PH_MAX_CONNECTIONS 1 // maximum number of remote connections
typedef struct {
uint8_t txWinSize;
uint16_t maxConnections;
uint32_t id;
uint8_t (*output_stream)(PHPacketHandle packet);
void (*set_baud)(uint32_t baud);
void (*data_handler)(uint8_t *data, uint8_t len);
void (*receiver_handler)(uint8_t *data, uint8_t len);
} PacketHandlerConfig;
// *****************************************************************************
typedef int32_t (*PHOutputStream)(PHPacketHandle packet);
void ph_1ms_tick(void);
void ph_process(void);
typedef void* PHInstHandle;
bool ph_connected(const int connection_index);
// Public functions
PHInstHandle PHInitialize(PacketHandlerConfig *cfg);
uint32_t PHConnect(PHInstHandle h, uint32_t dest_id);
PHPacketHandle PHGetTXPacket(PHInstHandle h);
PHPacketHandle PHReserveTXPacket(PHInstHandle h);
void PHReleaseLock(PHInstHandle h, bool keep_packet);
void PHReleaseTXPacket(PHInstHandle h, PHPacketHandle p);
uint8_t PHTransmitPacket(PHInstHandle h, PHPacketHandle p);
uint8_t PHReceivePacket(PHInstHandle h, PHPacketHandle p);
uint16_t ph_putData_free(const int connection_index);
uint16_t ph_putData(const int connection_index, const void *data, uint16_t len);
#endif // __PACKET_HANDLER_H__
uint16_t ph_getData_used(const int connection_index);
uint16_t ph_getData(const int connection_index, void *data, uint16_t len);
/**
* @}
* @}
*/
void ph_setFastPing(bool fast);
uint16_t ph_getRetries(const int connection_index);
uint8_t ph_getCurrentLinkState(const int connection_index);
int16_t ph_getLastRSSI(const int connection_index);
int32_t ph_getLastAFC(const int connection_index);
void ph_setNominalCarrierFrequency(uint32_t frequency_hz);
uint32_t ph_getNominalCarrierFrequency(void);
void ph_setDatarate(uint32_t datarate_bps);
uint32_t ph_getDatarate(void);
void ph_setTxPower(uint8_t tx_power);
uint8_t ph_getTxPower(void);
void ph_set_AES128_key(const void *key);
int ph_set_remote_serial_number(int connection_index, uint32_t sn);
void ph_set_remote_encryption(int connection_index, bool enabled, const void *key);
void ph_deinit(void);
void ph_init(uint32_t our_sn);
// *****************************************************************************
#endif

1926
flight/PipXtreme/packet_handler.c
View File

@ -1,13 +1,8 @@
/**
******************************************************************************
* @addtogroup OpenPilotSystem OpenPilot System
* @{
* @addtogroup OpenPilotLibraries OpenPilot System Libraries
* @{
/******************************************************************************
*
* @file packet_handler.c
* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2012.
* @brief A packet handler for handeling radio packet transmission.
* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2010.
* @brief Modem packet handling routines
* @see The GNU Public License (GPL) Version 3
*
*****************************************************************************/
@ -27,264 +22,1703 @@
* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include "openpilot.h"
#include "packet_handler.h"
// ********
// We use 128-bit AES CBC encryption if encryption is enabled
// encrypted packet format
// 16-byte CBC .. 1st byte must not be zero
// 4-byte source id
// 4-byte destination id
// 1-byte packet type
// 1-byte tx sequence value
// 1-byte rx sequence value
// 1-byte data size
// 4-byte crc of entire packet not including CBC bytes
// unencrypted packet format
// 1-byte null byte .. set to zero to indicate packet is not encrypted
// 4-byte source id
// 4-byte destination id
// 1-byte packet type
// 1-byte tx sequence value
// 1-byte rx sequence value
// 1-byte data size
// 4-byte crc of entire packet not including the null byte
// ********
#include <string.h> // memmove
#include "main.h"
#include "rfm22b.h"
#include "fifo_buffer.h"
#include "aes.h"
#include "crc.h"
#include "saved_settings.h"
#include "packet_handler.h"
// Private types and constants
typedef struct {
PacketHandlerConfig cfg;
PHPacket *tx_packets;
uint8_t tx_win_start;
uint8_t tx_win_end;
uint16_t tx_seq_id;
PHPacket rx_packet;
PHOutputStream stream;
xSemaphoreHandle lock;
} PHPacketData, *PHPacketDataHandle;
#if defined(PIOS_COM_DEBUG)
// #define PACKET_DEBUG
#endif
// Private functions
static uint8_t PHLSendAck(PHPacketDataHandle data, PHPacketHandle p);
static uint8_t PHLTransmitPacket(PHPacketDataHandle data, PHPacketHandle p);
// *****************************************************************************
/**
* Initialize the Packet Handler library
* \param[in] txWinSize The transmission window size (number of tx packet buffers).
* \param[in] streme A callback function for transmitting the packet.
* \param[in] id The source ID of transmitter.
* \return PHInstHandle The Pachet Handler instance data.
* \return 0 Failure
*/
PHInstHandle PHInitialize(PacketHandlerConfig *cfg)
#define PH_FIFO_BUFFER_SIZE 2048 // FIFO buffer size
// *****************************************************************************
#define AES_BLOCK_SIZE 16 // AES encryption does it in 16-byte blocks ONLY
// default aes 128-bit encryption key
const uint8_t default_aes_key[AES_BLOCK_SIZE] = {0x65, 0x3b, 0x71, 0x89, 0x4a, 0xf4, 0xc8, 0xcb, 0x18, 0xd4, 0x9b, 0x4d, 0x4a, 0xbe, 0xc8, 0x37};
// *****************************************************************************
#define RETRY_RECONNECT_COUNT 60 // if transmission retries this many times then reset the link to the remote modem
#define PACKET_TYPE_DATA_COMP_BIT 0x80 // data compressed bit. if set then the data in the packet is compressed
#define PACKET_TYPE_MASK 0x7f // packet type mask
enum {
PACKET_TYPE_NONE = 0,
PACKET_TYPE_CONNECT, // for requesting a connection
PACKET_TYPE_CONNECT_ACK, // ack
PACKET_TYPE_DISCONNECT, // to tell the other modem they cannot connect to us
PACKET_TYPE_DATA, // data packet (packet contains user data)
PACKET_TYPE_DATA_ACK, // ack
PACKET_TYPE_READY, // tells the other modem we are ready to accept more data
PACKET_TYPE_READY_ACK, // ack
PACKET_TYPE_NOTREADY, // tells the other modem we're not ready to accept more data - we can also send user data in this packet type
PACKET_TYPE_NOTREADY_ACK, // ack
PACKET_TYPE_DATARATE, // for changing the RF data rate
PACKET_TYPE_DATARATE_ACK, // ack
PACKET_TYPE_PING, // used to check link is still up
PACKET_TYPE_PONG, // ack
PACKET_TYPE_ADJUST_TX_PWR, // used to ask the other modem to adjust it's tx power
PACKET_TYPE_ADJUST_TX_PWR_ACK // ack
};
#define BROADCAST_ADDR 0xffffffff
//#pragma pack(push)
//#pragma pack(1)
typedef struct
{
// Allocate the primary structure
PHPacketDataHandle data = pvPortMalloc(sizeof(PHPacketData));
if (!data)
return 0;
data->cfg = *cfg;
data->tx_seq_id = 0;
uint32_t source_id;
uint32_t destination_id;
uint8_t type;
uint8_t tx_seq;
uint8_t rx_seq;
uint8_t data_size;
uint32_t crc;
} __attribute__((__packed__)) t_packet_header;
// Allocate the tx packet window
data->tx_packets = pvPortMalloc(sizeof(PHPacket) * data->cfg.txWinSize);
// this structure must be a multiple of 'AES_BLOCK_SIZE' bytes in size and no more than 255 bytes in size
typedef struct
{
uint8_t cbc[AES_BLOCK_SIZE]; // AES encryption Cipher-Block-Chaining key .. 1st byte must not be zero - to indicate the packet is encrypted
t_packet_header header;
uint8_t data[240 - sizeof(t_packet_header) - AES_BLOCK_SIZE];
} __attribute__((__packed__)) t_encrypted_packet;
// Initialize the window
data->tx_win_start = data->tx_win_end = 0;
for (uint8_t i = 0; i < data->cfg.txWinSize; ++i)
data->tx_packets[i].header.type = PACKET_TYPE_NONE;
// this structure must be no more than 255 bytes in size (255 = the maximum packet size)
typedef struct
{
uint8_t null_byte; // this must be set to zero - to indicate the packet is unencrypted
t_packet_header header;
uint8_t data[255 - sizeof(t_packet_header) - 1];
} __attribute__((__packed__)) t_unencrypted_packet;
// Create the lock
data->lock = xSemaphoreCreateRecursiveMutex();
//#pragma pack(pop)
// Return the structure.
return (PHInstHandle)data;
// *****************************************************************************
// link state for each remote connection
enum {
LINK_DISCONNECTED = 0,
LINK_CONNECTING,
LINK_CONNECTED
};
typedef struct
{
uint32_t serial_number; // their serial number
uint8_t tx_buffer[PH_FIFO_BUFFER_SIZE] __attribute__ ((aligned(4)));
t_fifo_buffer tx_fifo_buffer; // holds the data to be transmitted to the other modem
uint8_t rx_buffer[PH_FIFO_BUFFER_SIZE] __attribute__ ((aligned(4)));
t_fifo_buffer rx_fifo_buffer; // holds the data received from the other modem
uint8_t link_state; // holds our current RF link state
uint8_t tx_sequence; // incremented with each data packet transmitted, sent in every packet transmitted
uint8_t tx_sequence_data_size; // the size of data we sent in our last packet
uint8_t rx_sequence; // incremented with each data packet received contain data, sent in every packet transmitted
volatile uint16_t tx_packet_timer; // ms .. used for packet timing
uint16_t tx_retry_time_slots; // add's some random packet transmission timing - to try to prevent transmission collisions
uint16_t tx_retry_time_slot_len; // ms .. " " "
uint16_t tx_retry_time; // ms .. " " "
uint16_t tx_retry_counter; // incremented on each transmission, reset back to '0' when we receive an ack to our transmission
volatile uint16_t data_speed_timer; // used for calculating the transmit/receive data rate
volatile uint32_t tx_data_speed_count; // incremented with the number of data bits we send in our transmit packets
volatile uint32_t tx_data_speed; // holds the number of data bits we have sent each second
volatile uint32_t rx_data_speed_count; // incremented with the number of data bits we send in our transmit packets
volatile uint32_t rx_data_speed; // holds the number of data bits we have received each second
uint16_t ping_time; // ping timer
uint16_t fast_ping_time; // ping timer
bool pinging; // TRUE if we are doing a ping test with the other modem - to check if it is still present
bool rx_not_ready_mode; // TRUE if we have told the other modem we cannot receive data (due to buffer filling up).
// we set it back to FALSE when our received buffer starts to empty
volatile int16_t ready_to_send_timer; // ms .. used to hold off packet transmission to wait a bit for data to mount up for transmission (improves data thru-put speed)
volatile int32_t not_ready_timer; // ms .. >= 0 while we have been asked not to send anymore data to the other modem, -1 when we are allowed to send data
bool send_encrypted; // TRUE if we are to AES encrypt in every packet we transmit
int16_t rx_rssi_dBm; // the strength of the received packet
int32_t rx_afc_Hz; // the frequency offset of the received packet
} t_connection;
// *****************************************************************************
uint32_t our_serial_number = 0; // our serial number
t_connection connection[PH_MAX_CONNECTIONS]; // holds each connection state
uint8_t aes_key[AES_BLOCK_SIZE] __attribute__ ((aligned(4))); // holds the aes encryption key - the same for ALL connections
uint8_t dec_aes_key[AES_BLOCK_SIZE] __attribute__ ((aligned(4))); // holds the pre-calculated decryption key
uint8_t enc_cbc[AES_BLOCK_SIZE] __attribute__ ((aligned(4))); // holds the tx aes cbc bytes
uint8_t ph_tx_buffer[256] __attribute__ ((aligned(4))); // holds the transmit packet
uint8_t ph_rx_buffer[256] __attribute__ ((aligned(4))); // holds the received packet
int16_t rx_rssi_dBm;
int32_t rx_afc_Hz;
bool fast_ping;
// *****************************************************************************
// return TRUE if we are connected to the remote modem
bool ph_connected(const int connection_index)
{
if (connection_index < 0 || connection_index >= PH_MAX_CONNECTIONS)
return FALSE;
t_connection *conn = &connection[connection_index];
return (conn->link_state == LINK_CONNECTED);
}
/**
* Get a packet out of the transmit buffer.
* \param[in] h The packet handler instance data pointer.
* \param[in] dest_id The destination ID of this connection
* \return PHPacketHandle A pointer to the packet buffer.
* \return 0 No packets buffers avaiable in the transmit window.
*/
uint32_t PHConnect(PHInstHandle h, uint32_t dest_id)
{
return 1;
// *****************************************************************************
// public tx buffer functions
uint16_t ph_putData_free(const int connection_index)
{ // return the free space size
if (connection_index < 0 || connection_index >= PH_MAX_CONNECTIONS)
return 0;
return fifoBuf_getFree(&connection[connection_index].tx_fifo_buffer);
}
/**
* Temporarily reserve the next packet in the TX packet window.
* This function places a tempoary hold on the next TX packet and
* retains the packet handler lock.
*
* NOTE: PHReleaseLock must be called to release the lock and retain
* or release the reserved packet.
*
* \param[in] h The packet handler instance data pointer.
* \return PHPacketHandle A pointer to the packet buffer.
* \return 0 No packets buffers avaiable in the transmit window.
*/
PHPacketHandle PHReserveTXPacket(PHInstHandle h)
uint16_t ph_putData(const int connection_index, const void *data, uint16_t len)
{ // add data to our tx buffer to be sent
if (connection_index < 0 || connection_index >= PH_MAX_CONNECTIONS)
return 0;
return fifoBuf_putData(&connection[connection_index].tx_fifo_buffer, data, len);
}
// *****************************************************************************
// public rx buffer functions
uint16_t ph_getData_used(const int connection_index)
{ // return the number of bytes available in the rx buffer
if (connection_index < 0 || connection_index >= PH_MAX_CONNECTIONS)
return 0;
return fifoBuf_getUsed(&connection[connection_index].rx_fifo_buffer);
}
uint16_t ph_getData(const int connection_index, void *data, uint16_t len)
{ // get data from our rx buffer
if (connection_index < 0 || connection_index >= PH_MAX_CONNECTIONS)
return 0;
return fifoBuf_getData(&connection[connection_index].rx_fifo_buffer, data, len);
}
// *****************************************************************************
// start a connection to another modem
int ph_startConnect(int connection_index, uint32_t sn)
{
PHPacketDataHandle data = (PHPacketDataHandle)h;
random32 = updateCRC32(random32, 0xff);
// Lock
xSemaphoreTakeRecursive(data->lock, portMAX_DELAY);
if (connection_index < 0 || connection_index >= PH_MAX_CONNECTIONS)
return -1;
// Is the window full?
uint8_t next_end = (data->tx_win_end + 1) % data->cfg.txWinSize;
if(next_end == data->tx_win_start) {
t_connection *conn = &connection[connection_index];
// Release the lock
xSemaphoreGiveRecursive(data->lock);
conn->link_state = LINK_DISCONNECTED;
return NULL;
LINK_LED_OFF;
conn->serial_number = sn;
conn->tx_sequence = 0;
conn->tx_sequence_data_size = 0;
conn->rx_sequence = 0;
// fifoBuf_init(&conn->tx_fifo_buffer, conn->tx_buffer, PH_FIFO_BUFFER_SIZE);
// fifoBuf_init(&conn->rx_fifo_buffer, conn->rx_buffer, PH_FIFO_BUFFER_SIZE);
conn->tx_packet_timer = 0;
conn->tx_retry_time_slots = 5;
uint32_t ms = 1280000ul / rfm22_getDatarate();
if (ms < 10) ms = 10;
else
if (ms > 32000) ms = 32000;
conn->tx_retry_time_slot_len = ms;
conn->tx_retry_time = conn->tx_retry_time_slot_len * 4 + (random32 % conn->tx_retry_time_slots) * conn->tx_retry_time_slot_len * 4;
conn->tx_retry_counter = 0;
conn->data_speed_timer = 0;
conn->tx_data_speed_count = 0;
conn->tx_data_speed = 0;
conn->rx_data_speed_count = 0;
conn->rx_data_speed = 0;
conn->ping_time = 8000 + (random32 % 100) * 10;
conn->fast_ping_time = 600 + (random32 % 50) * 10;
conn->pinging = false;
conn->rx_not_ready_mode = false;
conn->ready_to_send_timer = -1;
conn->not_ready_timer = -1;
// conn->send_encrypted = true;
// conn->send_encrypted = false;
conn->rx_rssi_dBm = -200;
conn->rx_afc_Hz = 0;
if (sn != 0 && sn == our_serial_number)
return -2; // same as our own
if (sn == BROADCAST_ADDR)
{
return -3;
}
if (conn->serial_number != 0)
conn->link_state = LINK_CONNECTING;
return connection_index;
}
// *****************************************************************************
// return a byte for the tx packet transmission.
//
// return value < 0 if no more bytes available, otherwise return byte to be sent
int16_t ph_TxDataByteCallback(void)
{
return -1;
}
// *************************************************************
// we are being given a block of received bytes
//
// return TRUE to continue current packet receive, otherwise return FALSE to halt current packet reception
bool ph_RxDataCallback(void *data, uint8_t len)
{
return true;
}
// *****************************************************************************
// transmit a packet
bool ph_sendPacket(int connection_index, bool encrypt, uint8_t packet_type, bool send_immediately)
{
uint8_t key[AES_BLOCK_SIZE];
t_connection *conn = NULL;
// ***********
t_encrypted_packet *encrypted_packet = (t_encrypted_packet*)&ph_tx_buffer; // point to the tx buffer
t_unencrypted_packet *unencrypted_packet = (t_unencrypted_packet*)&ph_tx_buffer; // point to the tx buffer
t_packet_header *header;
uint8_t *data;
uint16_t max_data_size;
if (encrypt)
{
header = (t_packet_header *)&encrypted_packet->header;
data = (uint8_t *)&encrypted_packet->data;
max_data_size = sizeof(encrypted_packet->data);
}
else
{
header = (t_packet_header *)&unencrypted_packet->header;
data = (uint8_t *)&unencrypted_packet->data;
max_data_size = sizeof(unencrypted_packet->data);
}
// ***********
if (!rfm22_txReady())
return false;
if ((packet_type & PACKET_TYPE_MASK) == PACKET_TYPE_NONE)
return false;
if (connection_index >= PH_MAX_CONNECTIONS)
return false;
if (connection_index >= 0)
conn = (t_connection *)&connection[connection_index];
else
return false;
// ******************
// stuff
uint8_t pack_type = packet_type & PACKET_TYPE_MASK;
bool data_packet = (pack_type == PACKET_TYPE_DATA || pack_type == PACKET_TYPE_NOTREADY);
// ******************
// calculate how many user data bytes we are going to add to the packet
uint16_t data_size = 0;
if (data_packet && conn)
{ // we're adding user data to the packet
data_size = fifoBuf_getUsed(&connection[connection_index].tx_fifo_buffer); // the number of data bytes waiting to be sent
if (data_size > max_data_size)
data_size = max_data_size;
if (conn->tx_sequence_data_size > 0)
{ // we are re-sending data the same data
if (data_size > conn->tx_sequence_data_size)
data_size = conn->tx_sequence_data_size;
}
}
// ******************
// calculate the total packet size (including null data bytes if we have to add null data byte in AES encrypted packets)
uint32_t packet_size;
if (encrypt)
{
packet_size = AES_BLOCK_SIZE + sizeof(t_packet_header) + data_size;
// total packet size must be a multiple of 'AES_BLOCK_SIZE' bytes - aes encryption works on 16-byte blocks
packet_size = (packet_size + (AES_BLOCK_SIZE - 1)) & ~(AES_BLOCK_SIZE - 1);
}
else
{
packet_size = 1 + sizeof(t_packet_header) + data_size;
}
// ******************
// construct the packets entire header
if (encrypt)
{
memmove(key, aes_key, sizeof(key)); // fetch the encryption key
aes_encrypt_cbc_128(enc_cbc, key, NULL); // help randomize the CBC bytes
// ensure the 1st byte is not zero - to indicate this packet is encrypted
while (enc_cbc[0] == 0)
{
random32 = updateCRC32(random32, 0xff);
enc_cbc[0] ^= random32;
}
memmove(encrypted_packet->cbc, enc_cbc, AES_BLOCK_SIZE); // copy the AES CBC bytes into the packet
}
else
unencrypted_packet->null_byte = 0; // packet is not encrypted
header->source_id = our_serial_number; // our serial number
// header->destination_id = BROADCAST_ADDR; // broadcast packet
header->destination_id = conn->serial_number; // the other modems serial number
header->type = packet_type; // packet type
header->tx_seq = conn->tx_sequence; // our TX sequence number
header->rx_seq = conn->rx_sequence; // our RX sequence number
header->data_size = data_size; // the number of user data bytes in the packet
header->crc = 0; // the CRC of the header and user data bytes
// ******************
// add the user data to the packet
if (data_packet)
{ // we're adding user data to the packet
fifoBuf_getDataPeek(&connection[connection_index].tx_fifo_buffer, data, data_size);
if (encrypt)
{ // zero unused bytes
if (data_size < max_data_size)
memset(data + data_size, 0, max_data_size - data_size);
}
conn->tx_sequence_data_size = data_size; // remember how much data we are sending in this packet
}
// ******************
// complete the packet header by adding the CRC
if (encrypt)
header->crc = updateCRC32Data(0xffffffff, header, packet_size - AES_BLOCK_SIZE);
else
header->crc = updateCRC32Data(0xffffffff, header, packet_size - 1);
// ******************
// encrypt the packet
if (encrypt)
{ // encrypt the packet .. 'AES_BLOCK_SIZE' bytes at a time
uint8_t *p = (uint8_t *)encrypted_packet;
// encrypt the cbc
memmove(key, aes_key, sizeof(key)); // fetch the encryption key
aes_encrypt_cbc_128(p, key, NULL); // encrypt block of data (the CBC bytes)
p += AES_BLOCK_SIZE;
// encrypt the rest of the packet
for (uint16_t i = AES_BLOCK_SIZE; i < packet_size; i += AES_BLOCK_SIZE)
{
memmove(key, aes_key, sizeof(key)); // fetch the encryption key
aes_encrypt_cbc_128(p, key, enc_cbc); // encrypt block of data
p += AES_BLOCK_SIZE;
}
}
// ******************
// send the packet
int32_t res = rfm22_sendData(&ph_tx_buffer, packet_size, send_immediately);
// ******************
if (data_size > 0 && conn->tx_retry_counter == 0)
conn->tx_data_speed_count += data_size * 8; // + the number of data bits we just sent .. used for calculating the transmit data rate
// ******************
// debug stuff
#if defined(PACKET_DEBUG)
DEBUG_PRINTF("T-PACK ");
switch (pack_type)
{
case PACKET_TYPE_NONE: DEBUG_PRINTF("none"); break;
case PACKET_TYPE_CONNECT: DEBUG_PRINTF("connect"); break;
case PACKET_TYPE_CONNECT_ACK: DEBUG_PRINTF("connect_ack"); break;
case PACKET_TYPE_DISCONNECT: DEBUG_PRINTF("disconnect"); break;
case PACKET_TYPE_DATA: DEBUG_PRINTF("data"); break;
case PACKET_TYPE_DATA_ACK: DEBUG_PRINTF("data_ack"); break;
case PACKET_TYPE_READY: DEBUG_PRINTF("ready"); break;
case PACKET_TYPE_READY_ACK: DEBUG_PRINTF("ready_ack"); break;
case PACKET_TYPE_NOTREADY: DEBUG_PRINTF("notready"); break;
case PACKET_TYPE_NOTREADY_ACK: DEBUG_PRINTF("notready_ack"); break;
case PACKET_TYPE_DATARATE: DEBUG_PRINTF("datarate"); break;
case PACKET_TYPE_DATARATE_ACK: DEBUG_PRINTF("datarate_ack"); break;
case PACKET_TYPE_PING: DEBUG_PRINTF("ping"); break;
case PACKET_TYPE_PONG: DEBUG_PRINTF("pong"); break;
case PACKET_TYPE_ADJUST_TX_PWR: DEBUG_PRINTF("PACKET_TYPE_ADJUST_TX_PWR"); break;
case PACKET_TYPE_ADJUST_TX_PWR_ACK: DEBUG_PRINTF("PACKET_TYPE_ADJUST_TX_PWR_ACK"); break;
default: DEBUG_PRINTF("UNKNOWN [%d]", pack_type); break;
}
DEBUG_PRINTF(" tseq:%d rseq:%d", conn->tx_sequence, conn->rx_sequence);
DEBUG_PRINTF(" drate:%dbps", conn->tx_data_speed);
if (data_size > 0) DEBUG_PRINTF(" data_size:%d", data_size);
if (conn->tx_retry_counter > 0) DEBUG_PRINTF(" retry:%d", conn->tx_retry_counter);
DEBUG_PRINTF("\r\n");
#endif
// ******************
switch (pack_type)
{
case PACKET_TYPE_CONNECT:
case PACKET_TYPE_DISCONNECT:
case PACKET_TYPE_DATA:
case PACKET_TYPE_READY:
case PACKET_TYPE_NOTREADY:
case PACKET_TYPE_DATARATE:
case PACKET_TYPE_PING:
case PACKET_TYPE_ADJUST_TX_PWR:
if (conn->tx_retry_counter < 0xffff)
conn->tx_retry_counter++;
break;
case PACKET_TYPE_CONNECT_ACK:
case PACKET_TYPE_DATA_ACK:
case PACKET_TYPE_READY_ACK:
case PACKET_TYPE_NOTREADY_ACK:
case PACKET_TYPE_DATARATE_ACK:
case PACKET_TYPE_PONG:
case PACKET_TYPE_ADJUST_TX_PWR_ACK:
break;
case PACKET_TYPE_NONE:
break;
}
return (res >= packet_size);
}
// *****************************************************************************
void ph_processPacket2(bool was_encrypted, t_packet_header *header, uint8_t *data)
{ // process the received decrypted error-free packet
USB_LED_TOGGLE; // TEST ONLY
// ***********
// fetch the data compressed bit
bool compressed_data = (header->type & PACKET_TYPE_DATA_COMP_BIT) != 0;
// fetch the packet type
uint8_t packet_type = header->type & PACKET_TYPE_MASK;
// fetch the number of data bytes in the packet
uint16_t data_size = header->data_size;
// update the ramdon number
random32 = updateCRC32(random32, 0xff);
// *********************
// debug stuff
/*
#if defined(PACKET_DEBUG)
if (data_size > 0)
{
DEBUG_PRINTF("rx packet:");
for (uint16_t i = 0; i < data_size; i++)
DEBUG_PRINTF(" %u", data[i]);
DEBUG_PRINTF("\r\n");
}
#endif
*/
// ***********
// debug stuff
#if defined(PACKET_DEBUG)
DEBUG_PRINTF("R-PACK ");
switch (packet_type)
{
case PACKET_TYPE_NONE: DEBUG_PRINTF("none"); break;
case PACKET_TYPE_CONNECT: DEBUG_PRINTF("connect"); break;
case PACKET_TYPE_CONNECT_ACK: DEBUG_PRINTF("connect_ack"); break;
case PACKET_TYPE_DISCONNECT: DEBUG_PRINTF("disconnect"); break;
case PACKET_TYPE_DATA: DEBUG_PRINTF("data"); break;
case PACKET_TYPE_DATA_ACK: DEBUG_PRINTF("data_ack"); break;
case PACKET_TYPE_READY: DEBUG_PRINTF("ready"); break;
case PACKET_TYPE_READY_ACK: DEBUG_PRINTF("ready_ack"); break;
case PACKET_TYPE_NOTREADY: DEBUG_PRINTF("notready"); break;
case PACKET_TYPE_NOTREADY_ACK: DEBUG_PRINTF("notready_ack"); break;
case PACKET_TYPE_DATARATE: DEBUG_PRINTF("datarate"); break;
case PACKET_TYPE_DATARATE_ACK: DEBUG_PRINTF("datarate_ack"); break;
case PACKET_TYPE_PING: DEBUG_PRINTF("ping"); break;
case PACKET_TYPE_PONG: DEBUG_PRINTF("pong"); break;
case PACKET_TYPE_ADJUST_TX_PWR: DEBUG_PRINTF("PACKET_TYPE_ADJUST_TX_PWR"); break;
case PACKET_TYPE_ADJUST_TX_PWR_ACK: DEBUG_PRINTF("PACKET_TYPE_ADJUST_TX_PWR_ACK"); break;
default: DEBUG_PRINTF("UNKNOWN [%d]", packet_type); break;
}
DEBUG_PRINTF(" tseq-%d rseq-%d", header->tx_seq, header->rx_seq);
// DEBUG_PRINTF(" drate:%dbps", conn->rx_data_speed);
if (data_size > 0) DEBUG_PRINTF(" data_size:%d", data_size);
DEBUG_PRINTF(" %ddBm", rx_rssi_dBm);
DEBUG_PRINTF(" %dHz", rx_afc_Hz);
DEBUG_PRINTF("\r\n");
#endif
// *********************
if (header->source_id == our_serial_number)
return; // it's our own packet .. ignore it
if (header->destination_id == BROADCAST_ADDR)
{ // it's a broadcast packet
// todo:
return;
}
if (header->destination_id != our_serial_number)
return; // the packet is not meant for us
// *********************
// find out which remote connection this packet is from
int connection_index = 0;
while (connection_index < PH_MAX_CONNECTIONS)
{
uint32_t sn = connection[connection_index].serial_number;
if (sn != 0)
{ // connection used
if (header->source_id == sn)
break; // found it
}
connection_index++;
}
if (connection_index >= PH_MAX_CONNECTIONS)
{ // the packet is from an unknown source ID (unknown modem)
if (packet_type != PACKET_TYPE_NONE)
{ // send a disconnect packet back to them
// ph_sendPacket(-1, was_encrypted, PACKET_TYPE_DISCONNECT, true);
}
return;
}
t_connection *conn = &connection[connection_index];
// ***********
conn->rx_rssi_dBm = rx_rssi_dBm; // remember the packets signal strength
conn->rx_afc_Hz = rx_afc_Hz; // remember the packets frequency offset
// ***********
// decompress the data
if (compressed_data && data_size > 0)
{
// todo:
}
// ***********
if (packet_type == PACKET_TYPE_NONE)
return;
if (packet_type == PACKET_TYPE_DISCONNECT)
{
conn->link_state = LINK_DISCONNECTED;
LINK_LED_OFF;
return;
}
if (packet_type == PACKET_TYPE_CONNECT)
{
LINK_LED_ON;
// fifoBuf_init(&conn->tx_fifo_buffer, conn->tx_buffer, PH_FIFO_BUFFER_SIZE);
// fifoBuf_init(&conn->rx_fifo_buffer, conn->rx_buffer, PH_FIFO_BUFFER_SIZE);
conn->tx_packet_timer = 0;
conn->tx_retry_counter = 0;
conn->tx_retry_time = conn->tx_retry_time_slot_len + (random32 % conn->tx_retry_time_slots) * conn->tx_retry_time_slot_len;
conn->rx_sequence = header->tx_seq;
conn->tx_sequence = 0;
conn->tx_sequence_data_size = 0;
conn->data_speed_timer = 0;
conn->tx_data_speed_count = 0;
conn->tx_data_speed = 0;
conn->rx_data_speed_count = 0;
conn->rx_data_speed = 0;
conn->ping_time = 8000 + (random32 % 100) * 10;
conn->fast_ping_time = 600 + (random32 % 50) * 10;
conn->pinging = false;
conn->rx_not_ready_mode = false;
conn->ready_to_send_timer = -1;
conn->not_ready_timer = -1;
conn->link_state = LINK_CONNECTED;
// send an ack back
if (ph_sendPacket(connection_index, conn->send_encrypted, PACKET_TYPE_CONNECT_ACK, true))
{
conn->tx_packet_timer = 0;
}
return;
}
if (packet_type == PACKET_TYPE_CONNECT_ACK)
{
LINK_LED_ON;
if (conn->link_state != LINK_CONNECTING)
{ // reset the link
ph_set_remote_serial_number(connection_index, conn->serial_number);
return;
}
conn->tx_packet_timer = 0;
conn->tx_retry_counter = 0;
conn->tx_retry_time = conn->tx_retry_time_slot_len + (random32 % conn->tx_retry_time_slots) * conn->tx_retry_time_slot_len;
conn->rx_sequence = header->tx_seq;
conn->tx_sequence = 0;
conn->tx_sequence_data_size = 0;
conn->data_speed_timer = 0;
conn->tx_data_speed_count = 0;
conn->tx_data_speed = 0;
conn->rx_data_speed_count = 0;
conn->rx_data_speed = 0;
conn->ping_time = 8000 + (random32 % 100) * 10;
conn->fast_ping_time = 600 + (random32 % 50) * 10;
conn->pinging = false;
conn->rx_not_ready_mode = false;
conn->ready_to_send_timer = -1;
conn->not_ready_timer = -1;
conn->link_state = LINK_CONNECTED;
return;
}
if (conn->link_state == LINK_CONNECTING)
{ // we are trying to connect to them .. reply with a connect request packet
if (ph_sendPacket(connection_index, conn->send_encrypted, PACKET_TYPE_CONNECT, true))
{
conn->tx_packet_timer = 0;
conn->tx_retry_time = conn->tx_retry_time_slot_len * 4 + (random32 % conn->tx_retry_time_slots) * conn->tx_retry_time_slot_len * 4;
}
return;
}
if (conn->link_state != LINK_CONNECTED)
{ // they have sent us a packet when we are not in a connected state - start a connection
ph_startConnect(connection_index, conn->serial_number);
return;
}
// check to make sure it's a wanted packet type
switch (packet_type)
{
case PACKET_TYPE_DATA:
case PACKET_TYPE_DATA_ACK:
case PACKET_TYPE_READY:
case PACKET_TYPE_READY_ACK:
case PACKET_TYPE_NOTREADY:
case PACKET_TYPE_NOTREADY_ACK:
case PACKET_TYPE_DATARATE:
case PACKET_TYPE_DATARATE_ACK:
case PACKET_TYPE_PING:
case PACKET_TYPE_PONG:
case PACKET_TYPE_ADJUST_TX_PWR:
case PACKET_TYPE_ADJUST_TX_PWR_ACK:
break;
default:
return;
}
if ((conn->tx_sequence_data_size > 0) && (header->rx_seq == (uint8_t)(conn->tx_sequence + 1)))
{ // they received our last data packet
// remove the data we have sent and they have acked
fifoBuf_removeData(&conn->tx_fifo_buffer, conn->tx_sequence_data_size);
conn->tx_sequence++;
conn->tx_retry_counter = 0;
conn->tx_sequence_data_size = 0;
conn->not_ready_timer = -1; // stop timer
}
uint16_t size = fifoBuf_getUsed(&conn->tx_fifo_buffer); // the size of data waiting to be sent
if (packet_type == PACKET_TYPE_DATA || packet_type == PACKET_TYPE_DATA_ACK)
{
if (packet_type == PACKET_TYPE_DATA && header->tx_seq == conn->rx_sequence)
{ // the packet number is what we expected
if (data_size > 0)
{ // save the data
conn->rx_data_speed_count += data_size * 8; // + the number of data bits we just received
uint16_t num = fifoBuf_getFree(&conn->rx_fifo_buffer);
if (num < data_size)
{ // error .. we don't have enough space left in our fifo buffer to save the data .. discard it and tell them to hold off a sec
// conn->rx_not_ready_mode = true;
}
else
{ // save the received data into our fifo buffer
fifoBuf_putData(&conn->rx_fifo_buffer, data, data_size);
conn->rx_sequence++;
conn->rx_not_ready_mode = false;
}
}
}
if (size >= 200 || (conn->ready_to_send_timer >= 10 && size > 0) || (conn->tx_sequence_data_size > 0 && size > 0))
{ // send data
uint8_t pack_type = PACKET_TYPE_DATA;
if (conn->rx_not_ready_mode)
pack_type = PACKET_TYPE_NOTREADY;
if (ph_sendPacket(connection_index, conn->send_encrypted, pack_type, true))
{
conn->tx_packet_timer = 0;
conn->tx_retry_time = conn->tx_retry_time_slot_len + (random32 % conn->tx_retry_time_slots) * conn->tx_retry_time_slot_len;
return;
}
}
if (packet_type == PACKET_TYPE_DATA)
{ // send an ack back
uint8_t pack_type = PACKET_TYPE_DATA_ACK;
if (conn->rx_not_ready_mode)
pack_type = PACKET_TYPE_NOTREADY_ACK;
if (ph_sendPacket(connection_index, conn->send_encrypted, pack_type, true))
{
conn->tx_packet_timer = 0;
conn->tx_retry_time = conn->tx_retry_time_slot_len + (random32 % conn->tx_retry_time_slots) * conn->tx_retry_time_slot_len;
return;
}
}
return;
}
if (packet_type == PACKET_TYPE_READY)
{
conn->not_ready_timer = -1; // stop timer
// send an ack back
if (ph_sendPacket(connection_index, conn->send_encrypted, PACKET_TYPE_READY_ACK, true))
{
conn->tx_packet_timer = 0;
conn->tx_retry_time = conn->tx_retry_time_slot_len * 4 + (random32 % conn->tx_retry_time_slots) * conn->tx_retry_time_slot_len * 4;
return;
}
return;
}
if (packet_type == PACKET_TYPE_READY_ACK)
{
conn->rx_not_ready_mode = false;
return;
}
if (packet_type == PACKET_TYPE_NOTREADY)
{
// conn->not_ready_timer = 0; // start timer
if (header->tx_seq == conn->rx_sequence)
{ // the packet number is what we expected
if (data_size > 0)
{ // save the data
conn->rx_data_speed_count += data_size * 8; // + the number of data bits we just received
uint16_t num = fifoBuf_getFree(&conn->rx_fifo_buffer);
if (num < data_size)
{ // error .. we don't have enough space left in our fifo buffer to save the data .. discard it and tell them to hold off a sec
// conn->rx_not_ready_mode = true;
}
else
{ // save the received data into our fifo buffer
fifoBuf_putData(&conn->rx_fifo_buffer, data, data_size);
conn->rx_sequence++;
conn->rx_not_ready_mode = false;
}
}
}
// send an ack back
if (ph_sendPacket(connection_index, conn->send_encrypted, PACKET_TYPE_NOTREADY_ACK, true))
{
conn->tx_packet_timer = 0;
conn->tx_retry_time = conn->tx_retry_time_slot_len * 4 + (random32 % conn->tx_retry_time_slots) * conn->tx_retry_time_slot_len * 4;
return;
}
return;
}
if (packet_type == PACKET_TYPE_NOTREADY_ACK)
{
return;
}
if (packet_type == PACKET_TYPE_PING)
{ // send a pong back
if (ph_sendPacket(connection_index, conn->send_encrypted, PACKET_TYPE_PONG, true))
{
conn->tx_packet_timer = 0;
conn->tx_retry_time = conn->tx_retry_time_slot_len + (random32 % conn->tx_retry_time_slots) * conn->tx_retry_time_slot_len;
}
return;
}
if (packet_type == PACKET_TYPE_PONG)
{
if (conn->pinging)
{
conn->pinging = false;
conn->tx_retry_counter = 0;
}
return;
}
if (packet_type == PACKET_TYPE_DATARATE)
{
// send an ack back
if (ph_sendPacket(connection_index, conn->send_encrypted, PACKET_TYPE_DATARATE_ACK, true))
{
conn->tx_packet_timer = 0;
conn->tx_retry_time = conn->tx_retry_time_slot_len + (random32 % conn->tx_retry_time_slots) * conn->tx_retry_time_slot_len;
}
return;
}
if (packet_type == PACKET_TYPE_DATARATE_ACK)
{
return;
}
if (packet_type == PACKET_TYPE_ADJUST_TX_PWR)
{
// send an ack back
if (ph_sendPacket(connection_index, conn->send_encrypted, PACKET_TYPE_ADJUST_TX_PWR_ACK, true))
{
conn->tx_packet_timer = 0;
conn->tx_retry_time = conn->tx_retry_time_slot_len + (random32 % conn->tx_retry_time_slots) * conn->tx_retry_time_slot_len;
}
return;
}
if (packet_type == PACKET_TYPE_ADJUST_TX_PWR_ACK)
{
return;
}
// *********************
}
void ph_processRxPacket(void)
{
uint32_t crc1, crc2;
uint8_t key[AES_BLOCK_SIZE];
register uint8_t *p;
// ***********
// fetch the received packet
uint16_t packet_size = rfm22_receivedLength();
if (packet_size == 0)
return; // nothing received
if (packet_size > sizeof(ph_rx_buffer))
{ // packet too big .. discard it
rfm22_receivedDone();
return;
}
rx_rssi_dBm = rfm22_receivedRSSI(); // fetch the packets signal stength
rx_afc_Hz = rfm22_receivedAFCHz(); // fetch the packets frequency offset
// copy the received packet into our own buffer
memmove(ph_rx_buffer, rfm22_receivedPointer(), packet_size);
rfm22_receivedDone(); // the received packet has been saved
// *********************
// if the 1st byte in the packet is not zero, then the packet is encrypted
bool encrypted = (ph_rx_buffer[0] != 0);
// ***********
t_encrypted_packet *encrypted_packet = (t_encrypted_packet *)&ph_rx_buffer; // point to the rx buffer
t_unencrypted_packet *unencrypted_packet = (t_unencrypted_packet *)&ph_rx_buffer; // point to the rx buffer
t_packet_header *header;
uint8_t *data;
uint16_t min_packet_size;
uint16_t max_data_size;
if (encrypted)
{
header = (t_packet_header *)&encrypted_packet->header;
data = (uint8_t *)&encrypted_packet->data;
min_packet_size = AES_BLOCK_SIZE + sizeof(t_packet_header);
max_data_size = sizeof(encrypted_packet->data);
}
else
{
header = (t_packet_header *)&unencrypted_packet->header;
data = (uint8_t *)&unencrypted_packet->data;
min_packet_size = 1 + sizeof(t_packet_header);
max_data_size = sizeof(unencrypted_packet->data);
}
if (packet_size < min_packet_size)
{ // packet too small .. discard it
return;
}
random32 = updateCRC32(random32 ^ header->crc, 0xff); // help randomize the random number
// *********************
// help to randomize the tx aes cbc bytes by using the received packet
p = (uint8_t *)&ph_rx_buffer;
for (uint16_t i = 0; i < packet_size; i += AES_BLOCK_SIZE)
{
for (int j = AES_BLOCK_SIZE - 1; j >= 0; j--)
enc_cbc[j] ^= *p++;
}
// *********************
// check the packet size
if (encrypted)
{
if ((packet_size & (AES_BLOCK_SIZE - 1)) != 0)
return; // packet must be a multiple of 'AES_BLOCK_SIZE' bytes in length - for the aes decryption
}
// *********************
// decrypt the packet
if (encrypted)
{
p = (uint8_t *)encrypted_packet; // point to the received packet
// decrypt the cbc
memmove(key, (void *)dec_aes_key, sizeof(key)); // fetch the decryption key
aes_decrypt_cbc_128(p, key, NULL); // decrypt the cbc bytes
p += AES_BLOCK_SIZE;
// decrypt the rest of the packet
for (uint16_t i = AES_BLOCK_SIZE; i < packet_size; i += AES_BLOCK_SIZE)
{
memmove(key, (void *)dec_aes_key, sizeof(key)); // fetch the decryption key
aes_decrypt_cbc_128(p, key, (void *)encrypted_packet->cbc);
p += AES_BLOCK_SIZE;
}
}
// *********************
#if defined(PACKET_DEBUG)
DEBUG_PRINTF("rx packet: ");
DEBUG_PRINTF("%s", encrypted ? "encrypted " : "unencrypted");
if (encrypted)
{
for (int i = 0; i < AES_BLOCK_SIZE; i++)
DEBUG_PRINTF("%02X", encrypted_packet->cbc[i]);
}
DEBUG_PRINTF(" %08X %08X %u %u %u %u %08X\r\n",
header->source_id,
header->destination_id,
header->type,
header->tx_seq,
header->rx_seq,
header->data_size,
header->crc);
if (header->data_size > 0)
{
DEBUG_PRINTF("rx packet [%u]: ", header->data_size);
for (int i = 0; i < header->data_size; i++)
DEBUG_PRINTF("%02X", data[i]);
DEBUG_PRINTF("\r\n");
}
#endif
// *********************
uint32_t data_size = header->data_size;
if (packet_size < (min_packet_size + data_size))
return; // packet too small
#if defined(PACKET_DEBUG)
// DEBUG_PRINTF("rx packet size: %d\r\n", packet_size);
#endif
// *********************
// check the packet is error free
crc1 = header->crc;
header->crc = 0;
if (encrypted)
crc2 = updateCRC32Data(0xffffffff, header, packet_size - AES_BLOCK_SIZE);
else
crc2 = updateCRC32Data(0xffffffff, header, packet_size - 1);
if (crc1 != crc2)
{ // corrupt packet
#if defined(PACKET_DEBUG)
if (encrypted)
DEBUG_PRINTF("ENC-R-PACK corrupt %08X %08X\r\n", crc1, crc2);
else
DEBUG_PRINTF("R-PACK corrupt %08X %08X\r\n", crc1, crc2);
#endif
return;
}
// *********************
// process the data
ph_processPacket2(encrypted, header, data);
// *********************
}
// *****************************************************************************
// do all the link/packet handling stuff - request connection/disconnection, send data, acks etc
void ph_processLinks(int connection_index)
{
if (connection_index < 0 || connection_index >= PH_MAX_CONNECTIONS)
return;
random32 = updateCRC32(random32, 0xff);
t_connection *conn = &connection[connection_index];
bool canTx = (!rfm22_transmitting() && rfm22_channelIsClear());// TRUE is we can transmit
bool timeToRetry = (rfm22_txReady() && conn->tx_packet_timer >= conn->tx_retry_time);
bool tomanyRetries = (conn->tx_retry_counter >= RETRY_RECONNECT_COUNT);
if (conn->tx_retry_counter > 3)
conn->rx_rssi_dBm = -200;
switch (conn->link_state)
{
case LINK_DISCONNECTED:
if (!canTx)
{
conn->tx_packet_timer = 0;
break;
}
if (!rfm22_txReady() || conn->tx_packet_timer < 60000)
break;
if (our_serial_number != 0 && conn->serial_number != 0)
{ // try to reconnect with the remote modem
ph_startConnect(connection_index, conn->serial_number);
break;
}
break;
case LINK_CONNECTING:
if (!canTx)
{
conn->tx_packet_timer = 0;
break;
}
if (!timeToRetry)
break;
if (ph_sendPacket(connection_index, conn->send_encrypted, PACKET_TYPE_CONNECT, false))
{
conn->tx_packet_timer = 0;
conn->tx_retry_time = conn->tx_retry_time_slot_len * 4 + (random32 % conn->tx_retry_time_slots) * conn->tx_retry_time_slot_len * 4;
break;
}
break;
case LINK_CONNECTED:
if (!canTx)
{
conn->tx_packet_timer = 0;
break;
}
if (!timeToRetry)
break;
if (tomanyRetries)
{ // reset the link if we have sent tomany retries
ph_startConnect(connection_index, conn->serial_number);
break;
}
if (conn->pinging)
{ // we are trying to ping them
if (ph_sendPacket(connection_index, conn->send_encrypted, PACKET_TYPE_PING, false))
{
conn->tx_packet_timer = 0;
conn->tx_retry_time = conn->tx_retry_time_slot_len * 4 + (random32 % conn->tx_retry_time_slots) * conn->tx_retry_time_slot_len * 4;
}
break;
}
uint16_t ping_time = conn->ping_time;
if (fast_ping) ping_time = conn->fast_ping_time;
if (conn->tx_packet_timer >= ping_time)
{ // start pinging
if (ph_sendPacket(connection_index, conn->send_encrypted, PACKET_TYPE_PING, false))
{
conn->ping_time = 8000 + (random32 % 100) * 10;
conn->fast_ping_time = 600 + (random32 % 50) * 10;
conn->tx_packet_timer = 0;
conn->tx_retry_time = conn->tx_retry_time_slot_len * 4 + (random32 % conn->tx_retry_time_slots) * conn->tx_retry_time_slot_len * 4;
conn->pinging = true;
}
break;
}
// ***********
// exit rx not ready mode if we have space in our rx buffer for more data
/*
if (conn->rx_not_ready_mode)
{
uint16_t size = fifoBuf_getFree(&conn->rx_fifo_buffer);
if (size >= conn->rx_fifo_buffer.buf_size / 6)
{ // leave 'rx not ready' mode
if (ph_sendPacket(connection_index, conn->send_encrypted, PACKET_TYPE_READY, false))
{
conn->tx_packet_timer = 0;
conn->tx_retry_time = conn->tx_retry_time_slot_len + (random32 % conn->tx_retry_time_slots) * conn->tx_retry_time_slot_len;
break;
}
}
}
*/
// ***********
// send data packets
// if (conn->not_ready_timer < 0)
{
uint16_t size = fifoBuf_getUsed(&conn->tx_fifo_buffer);
if (size == 0)
conn->ready_to_send_timer = -1; // no data to send
else
if (conn->ready_to_send_timer < 0)
conn->ready_to_send_timer = 0; // start timer
if (size >= 200 || (conn->ready_to_send_timer >= saved_settings.rts_time && size > 0) || (conn->tx_sequence_data_size > 0 && size > 0))
{ // send data
uint8_t pack_type = PACKET_TYPE_DATA;
if (conn->rx_not_ready_mode)
pack_type = PACKET_TYPE_NOTREADY;
if (ph_sendPacket(connection_index, conn->send_encrypted, pack_type, false))
{
conn->tx_packet_timer = 0;
conn->tx_retry_time = conn->tx_retry_time_slot_len + (random32 % conn->tx_retry_time_slots) * conn->tx_retry_time_slot_len;
}
break;
}
}
// ***********
break;
default: // we should never end up here - maybe we should do a reboot?
conn->link_state = LINK_DISCONNECTED;
/*
// disable all interrupts
PIOS_IRQ_Disable();
// turn off all leds
USB_LED_OFF;
LINK_LED_OFF;
RX_LED_OFF;
TX_LED_OFF;
PIOS_SYS_Reset();
while (1);
*/
break;
}
}
// *****************************************************************************
void ph_setFastPing(bool fast)
{
fast_ping = fast;
}
// *****************************************************************************
uint8_t ph_getCurrentLinkState(const int connection_index)
{
if (connection_index < 0 || connection_index >= PH_MAX_CONNECTIONS)
return 0;
return connection[connection_index].link_state;
}
// *****************************************************************************
uint16_t ph_getRetries(const int connection_index)
{
if (connection_index < 0 || connection_index >= PH_MAX_CONNECTIONS)
return 0;
return connection[connection_index].tx_retry_counter;
}
// *****************************************************************************
int16_t ph_getLastRSSI(const int connection_index)
{
if (connection_index < 0 || connection_index >= PH_MAX_CONNECTIONS)
return 0;
return connection[connection_index].rx_rssi_dBm;
}
int32_t ph_getLastAFC(const int connection_index)
{
if (connection_index < 0 || connection_index >= PH_MAX_CONNECTIONS)
return 0;
return connection[connection_index].rx_afc_Hz;
}
// *****************************************************************************
// set/get the carrier frequency
void ph_setNominalCarrierFrequency(uint32_t frequency_hz)
{
rfm22_setNominalCarrierFrequency(frequency_hz);
}
uint32_t ph_getNominalCarrierFrequency(void)
{
return rfm22_getNominalCarrierFrequency();
}
// *****************************************************************************
// set/get the RF datarate
void ph_setDatarate(uint32_t datarate_bps)
{
rfm22_setDatarate(datarate_bps, TRUE);
uint32_t ms = 1280000ul / rfm22_getDatarate();
if (ms < 10) ms = 10;
else
if (ms > 32000) ms = 32000;
for (int i = 0; i < PH_MAX_CONNECTIONS; i++)
connection[i].tx_retry_time_slot_len = ms;
}
uint32_t ph_getDatarate(void)
{
return rfm22_getDatarate();
}
// *****************************************************************************
void ph_setTxPower(uint8_t tx_power)
{
rfm22_setTxPower(tx_power);
}
uint8_t ph_getTxPower(void)
{
return rfm22_getTxPower();
}
// *****************************************************************************
// set the AES encryption key
void ph_set_AES128_key(const void *key)
{
if (!key)
return;
memmove(aes_key, key, sizeof(aes_key));
// create the AES decryption key
aes_decrypt_key_128_create(aes_key, (void *)&dec_aes_key);
}
// *****************************************************************************
int ph_set_remote_serial_number(int connection_index, uint32_t sn)
{
random32 = updateCRC32(random32, 0xff);
if (ph_startConnect(connection_index, sn) >= 0)
{
t_connection *conn = &connection[connection_index];
// wipe any user data present in the buffers
fifoBuf_init(&conn->tx_fifo_buffer, conn->tx_buffer, PH_FIFO_BUFFER_SIZE);
fifoBuf_init(&conn->rx_fifo_buffer, conn->rx_buffer, PH_FIFO_BUFFER_SIZE);
return connection_index;
}
return -4;
}
void ph_set_remote_encryption(int connection_index, bool enabled, const void *key)
{
if (connection_index < 0 || connection_index >= PH_MAX_CONNECTIONS)
return;
ph_set_AES128_key(key);
connection[connection_index].send_encrypted = enabled;
}
// *****************************************************************************
// can be called from an interrupt if you wish.
// call this once every ms
void ph_1ms_tick(void)
{
if (booting) return;
if (saved_settings.mode == MODE_NORMAL)
{
// help randomize the encryptor cbc bytes
register uint32_t *cbc = (uint32_t *)&enc_cbc;
for (int i = 0; i < sizeof(enc_cbc) / 4; i++)
{
random32 = updateCRC32(random32, 0xff);
*cbc++ ^= random32;
}
for (int i = 0; i < PH_MAX_CONNECTIONS; i++)
{
t_connection *conn = &connection[i];
if (conn->tx_packet_timer < 0xffff)
conn->tx_packet_timer++;
if (conn->link_state == LINK_CONNECTED)
{ // we are connected
if (conn->ready_to_send_timer >= 0 && conn->ready_to_send_timer < 0x7fff)
conn->ready_to_send_timer++;
if (conn->not_ready_timer >= 0 && conn->not_ready_timer < 0x7fffffff)
conn->not_ready_timer++;
if (conn->data_speed_timer < 0xffff)
{
if (++conn->data_speed_timer >= 1000)
{ // 1 second gone by
conn->data_speed_timer = 0;
conn->tx_data_speed = (conn->tx_data_speed + conn->tx_data_speed_count) >> 1;
conn->tx_data_speed_count = 0;
conn->rx_data_speed = (conn->rx_data_speed + conn->rx_data_speed_count) >> 1;
conn->rx_data_speed_count = 0;
}
}
}
else
{ // we are not connected
if (conn->data_speed_timer) conn->data_speed_timer = 0;
if (conn->tx_data_speed_count) conn->tx_data_speed_count = 0;
if (conn->tx_data_speed) conn->tx_data_speed = 0;
if (conn->rx_data_speed_count) conn->rx_data_speed_count = 0;
if (conn->rx_data_speed) conn->rx_data_speed = 0;
}
}
}
}
// *****************************************************************************
// call this as often as possible - not from an interrupt
void ph_process(void)
{
if (booting) return;
if (saved_settings.mode == MODE_NORMAL)
{
ph_processRxPacket();
for (int i = 0; i < PH_MAX_CONNECTIONS; i++)
ph_processLinks(i);
}
else
{
}
}
// *****************************************************************************
void ph_disconnectAll(void)
{
for (int i = 0; i < PH_MAX_CONNECTIONS; i++)
{
random32 = updateCRC32(random32, 0xff);
t_connection *conn = &connection[i];
conn->serial_number = 0;
conn->tx_sequence = 0;
conn->tx_sequence_data_size = 0;
conn->rx_sequence = 0;
fifoBuf_init(&conn->tx_fifo_buffer, conn->tx_buffer, PH_FIFO_BUFFER_SIZE);
fifoBuf_init(&conn->rx_fifo_buffer, conn->rx_buffer, PH_FIFO_BUFFER_SIZE);
conn->link_state = LINK_DISCONNECTED;
conn->tx_packet_timer = 0;
conn->tx_retry_time_slots = 5;
conn->tx_retry_time_slot_len = 40;
conn->tx_retry_time = conn->tx_retry_time_slot_len * 4 + (random32 % conn->tx_retry_time_slots) * conn->tx_retry_time_slot_len * 4;
conn->tx_retry_counter = 0;
conn->data_speed_timer = 0;
conn->tx_data_speed_count = 0;
conn->tx_data_speed = 0;
conn->rx_data_speed_count = 0;
conn->rx_data_speed = 0;
conn->ping_time = 8000 + (random32 % 100) * 10;
conn->fast_ping_time = 600 + (random32 % 50) * 10;
conn->pinging = false;
conn->rx_not_ready_mode = false;
conn->ready_to_send_timer = -1;
conn->not_ready_timer = -1;
conn->send_encrypted = false;
conn->rx_rssi_dBm = -200;
conn->rx_afc_Hz = 0;
}
}
// *****************************************************************************
void ph_deinit(void)
{
ph_disconnectAll();
}
void ph_init(uint32_t our_sn)
{
our_serial_number = our_sn; // remember our own serial number
fast_ping = false;
ph_disconnectAll();
// set the AES encryption key using the default AES key
ph_set_AES128_key(default_aes_key);
// try too randomise the tx AES CBC bytes
for (uint32_t j = 0, k = 0; j < 123 + (random32 & 1023); j++)
{
random32 = updateCRC32(random32, 0xff);
enc_cbc[k] ^= random32 >> 3;
if (++k >= sizeof(enc_cbc)) k = 0;
}
// Return a pointer to the packet at the end of the TX window.
return data->tx_packets + data->tx_win_end;
// ******
rfm22_init_normal(saved_settings.min_frequency_Hz, saved_settings.max_frequency_Hz, rfm22_freqHopSize());
rfm22_TxDataByte_SetCallback(ph_TxDataByteCallback);
rfm22_RxData_SetCallback(ph_RxDataCallback);
rfm22_setFreqCalibration(saved_settings.rf_xtal_cap);
ph_setNominalCarrierFrequency(saved_settings.frequency_Hz);
ph_setDatarate(saved_settings.max_rf_bandwidth);
ph_setTxPower(saved_settings.max_tx_power);
ph_set_remote_encryption(0, saved_settings.aes_enable, (const void *)saved_settings.aes_key);
ph_set_remote_serial_number(0, saved_settings.destination_id);
// ******
}
/**
* Get a packet out of the transmit buffer and keep the lock.
* NOTE: PHReleaseLock must be called to release the lock.
* \param[in] h The packet handler instance data pointer.
* \param[in] keep_packet Maintain a permanent (until released) lock on the packet.
*/
void PHReleaseLock(PHInstHandle h, bool keep_packet)
{
PHPacketDataHandle data = (PHPacketDataHandle)h;
uint8_t next_end = (data->tx_win_end + 1) % data->cfg.txWinSize;
// Increment the end index if packet is being kept.
if (keep_packet)
data->tx_win_end = next_end;
// Release lock
xSemaphoreGiveRecursive(data->lock);
}
/**
* Get a packet out of the transmit buffer.
* \param[in] h The packet handler instance data pointer.
* \return PHPacketHandle A pointer to the packet buffer.
* \return 0 No packets buffers avaiable in the transmit window.
*/
PHPacketHandle PHGetTXPacket(PHInstHandle h)
{
PHPacketHandle p = PHReserveTXPacket(h);
PHReleaseLock(p, 1);
return p;
}
/**
* Release a packet from the transmit packet buffer window.
* \param[in] h The packet handler instance data pointer.
* \param[in] p A pointer to the packet buffer.
* \return Nothing
*/
void PHReleaseTXPacket(PHInstHandle h, PHPacketHandle p)
{
PHPacketDataHandle data = (PHPacketDataHandle)h;
// Lock
xSemaphoreTakeRecursive(data->lock, portMAX_DELAY);
// Change the packet type so we know this packet is unused.
p->header.type = PACKET_TYPE_NONE;
// If this packet is at the start of the window, increment the start index.
while ((data->tx_win_start != data->tx_win_end) &&
(data->tx_packets[data->tx_win_start].header.type == PACKET_TYPE_NONE))
data->tx_win_start = (data->tx_win_start + 1) % data->cfg.txWinSize;
// Release lock
xSemaphoreGiveRecursive(data->lock);
}
/**
* Transmit a packet from the transmit packet buffer window.
* \param[in] h The packet handler instance data pointer.
* \param[in] p A pointer to the packet buffer.
* \return 1 Success
* \return 0 Failure
*/
uint8_t PHTransmitPacket(PHInstHandle h, PHPacketHandle p)
{
PHPacketDataHandle data = (PHPacketDataHandle)h;
// Try to transmit the packet.
if (!PHLTransmitPacket(data, p))
return 0;
// If this packet doesn't require an ACK, remove it from the TX window.
switch (p->header.type) {
case PACKET_TYPE_READY:
case PACKET_TYPE_NOTREADY:
case PACKET_TYPE_DATA:
case PACKET_TYPE_RECEIVER:
PHReleaseTXPacket(h, p);
break;
}
return 1;
}
/**
* Process a packet that has been received.
* \param[in] h The packet handler instance data pointer.
* \param[in] p A pointer to the packet buffer.
* \return 1 Success
* \return 0 Failure
*/
uint8_t PHReceivePacket(PHInstHandle h, PHPacketHandle p)
{
PHPacketDataHandle data = (PHPacketDataHandle)h;
switch (p->header.type) {
case PACKET_TYPE_ACKED_DATA:
// Send the ACK
PHLSendAck(data, p);
// Pass on the data.
if(data->cfg.data_handler)
data->cfg.data_handler(p->data, p->header.data_size);
break;
case PACKET_TYPE_RECEIVER:
// Pass on the data to the receiver handler.
if(data->cfg.receiver_handler)
data->cfg.receiver_handler(p->data, p->header.data_size);
break;
}
return 1;
}
/**
* Transmit a packet from the transmit packet buffer window.
* \param[in] data The packet handler instance data pointer.
* \param[in] p A pointer to the packet buffer.
* \return 1 Success
* \return 0 Failure
*/
static uint8_t PHLTransmitPacket(PHPacketDataHandle data, PHPacketHandle p)
{
// Set the sequence ID to the current ID.
p->header.tx_seq = data->tx_seq_id++;
// Transmit the packet using the output stream.
if(!data->cfg.output_stream(p))
return 0;
return 1;
}
/**
* Send an ACK packet.
* \param[in] data The packet handler instance data pointer.
* \param[in] p A pointer to the packet buffer of the packet to be ACKed.
* \return 1 Success
* \return 0 Failure
*/
static uint8_t PHLSendAck(PHPacketDataHandle data, PHPacketHandle p)
{
// Create the ACK message
PHPacketHeader ack;
ack.source_id = data->cfg.id;
ack.destination_id = p->header.source_id;
ack.type = PACKET_TYPE_ACK;
ack.rx_seq = p->header.tx_seq;
ack.data_size = 0;
// Set the packet.
PHLTransmitPacket(data, (PHPacketHandle)&ack);
return 1;
}
// *****************************************************************************

8
flight/board_hw_defs/pipxtreme/board_hw_defs.c
View File

@ -478,8 +478,14 @@ const struct pios_usb_cdc_cfg pios_usb_cdc_cfg = {
#include <pios_rfm22b_priv.h>
const struct pios_rfm22b_cfg pios_rfm22b_cfg = {
.frequencyHz = 434000000,
.minFrequencyHz = 434000000 - 2000000,
.maxFrequencyHz = 434000000 + 2000000,
.RFXtalCap = 0x7f,
.maxRFBandwidth = 128000,
.maxTxPower = RFM22_tx_pwr_txpow_0, // +1dBm ... 1.25mW
.sendTimeout = 15, /* ms */
.minPacketSize = 0,
.minPacketSize = 50,
.txWinSize = 4,
.maxConnections = 1,
.id = 0x36249acb