From f0dfba6fc085e7896fabc9c40e808a81ad54787d Mon Sep 17 00:00:00 2001 From: Brian Webb Date: Tue, 21 Feb 2012 20:29:06 -0700 Subject: [PATCH] Re-baslined the PipX codebase using the experimental Transmitter codebase. --- .../PiOS/Boards/STM32103CB_PIPXTREME_Rev1.h | 696 ++++++++------ .../link_STM32103CB_PIPXTREME_BL_sections.ld | 56 +- .../link_STM32103CB_PIPXTREME_memory.ld | 3 +- .../link_STM32103CB_PIPXTREME_sections.ld | 107 ++- flight/PipXtreme/Makefile | 391 +++++--- flight/PipXtreme/System/alarms.c | 214 +++++ flight/PipXtreme/System/inc/FreeRTOSConfig.h | 99 ++ flight/PipXtreme/System/inc/alarms.h | 50 ++ flight/PipXtreme/System/inc/op_config.h | 39 + flight/PipXtreme/System/inc/openpilot.h | 53 ++ .../PipXtreme/System/inc/pios_board_posix.h | 84 ++ flight/PipXtreme/System/inc/pios_config.h | 121 +++ .../PipXtreme/System/inc/pios_config_posix.h | 54 ++ flight/PipXtreme/System/pios_board.c | 849 ++++++++++++++++++ flight/PipXtreme/System/pios_board_posix.c | 142 +++ make/boards/pipxtreme/board-info.mk | 4 +- make/firmware-defs.mk | 2 +- 17 files changed, 2556 insertions(+), 408 deletions(-) mode change 100644 => 100755 flight/PiOS/Boards/STM32103CB_PIPXTREME_Rev1.h mode change 100644 => 100755 flight/PipXtreme/Makefile create mode 100755 flight/PipXtreme/System/alarms.c create mode 100755 flight/PipXtreme/System/inc/FreeRTOSConfig.h create mode 100755 flight/PipXtreme/System/inc/alarms.h create mode 100755 flight/PipXtreme/System/inc/op_config.h create mode 100755 flight/PipXtreme/System/inc/openpilot.h create mode 100755 flight/PipXtreme/System/inc/pios_board_posix.h create mode 100755 flight/PipXtreme/System/inc/pios_config.h create mode 100755 flight/PipXtreme/System/inc/pios_config_posix.h create mode 100755 flight/PipXtreme/System/pios_board.c create mode 100755 flight/PipXtreme/System/pios_board_posix.c diff --git a/flight/PiOS/Boards/STM32103CB_PIPXTREME_Rev1.h b/flight/PiOS/Boards/STM32103CB_PIPXTREME_Rev1.h old mode 100644 new mode 100755 index 8d04e05a4..3cbfe7a43 --- a/flight/PiOS/Boards/STM32103CB_PIPXTREME_Rev1.h +++ b/flight/PiOS/Boards/STM32103CB_PIPXTREME_Rev1.h @@ -23,20 +23,23 @@ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#ifndef PIOS_BOARD_H -#define PIOS_BOARD_H -// ***************************************************************** +#ifndef STM32103C8_TRANSMITTER_H_ +#define STM32103C8_TRANSMITTER_H_ + +#define ADD_ONE_ADC + +//------------------------ // Timers and Channels Used - +//------------------------ /* -Timer | Channel 1 | Channel 2 | Channel 3 | Channel 4 -------+------------+------------+------------+------------ -TIM1 | DELAY | -TIM2 | | PPM Output | PPM Input | -TIM3 | TIMER INTERRUPT | -TIM4 | STOPWATCH | -------+------------+------------+------------+------------ +Timer | Channel 1 | Channel 2 | Channel 3 | Channel 4 +------+-----------+-----------+-----------+---------- +TIM1 | Servo 4 | | | +TIM2 | RC In 5 | RC In 6 | Servo 6 | +TIM3 | Servo 5 | RC In 2 | RC In 3 | RC In 4 +TIM4 | RC In 1 | Servo 3 | Servo 2 | Servo 1 +------+-----------+-----------+-----------+---------- */ //------------------------ @@ -55,6 +58,7 @@ TIM4 | STOPWATCH | /* Channel 11 - */ /* Channel 12 - */ + //------------------------ // BOOTLOADER_SETTINGS //------------------------ @@ -63,349 +67,469 @@ TIM4 | STOPWATCH | #define MAX_DEL_RETRYS 3 -// ***************************************************************** +//------------------------ +// WATCHDOG_SETTINGS +//------------------------ +#define PIOS_WATCHDOG_TIMEOUT 250 +#define PIOS_WDG_REGISTER BKP_DR4 +#define PIOS_WDG_ACTUATOR 0x0001 +#define PIOS_WDG_STABILIZATION 0x0002 +#define PIOS_WDG_ATTITUDE 0x0004 +#define PIOS_WDG_MANUAL 0x0008 + +//------------------------ +// TELEMETRY +//------------------------ +#define TELEM_QUEUE_SIZE 20 + +//------------------------ +// PIOS_LED +//------------------------ +#define PIOS_LED_HEARTBEAT 0 +#ifdef MOVE_CONTROLLER +#define PIOS_LED_LED1_GPIO_PORT GPIOC +//#define PIOS_LED_LED1_GPIO_PIN GPIO_Pin_9 +#define PIOS_LED_LED1_GPIO_PIN GPIO_Pin_8 +#define PIOS_LED_LED1_GPIO_CLK RCC_APB2Periph_GPIOC +#define PIOS_LED_NUM 1 +#define PIOS_LED_PORTS { PIOS_LED_LED1_GPIO_PORT } +#define PIOS_LED_PINS { PIOS_LED_LED1_GPIO_PIN } +#define PIOS_LED_CLKS { PIOS_LED_LED1_GPIO_CLK } + +#define PIOS_FLASH_CS_PIN 0 +#define PIOS_FLASH_ENABLE PIOS_GPIO_On(0) +#define PIOS_FLASH_DISABLE PIOS_GPIO_Off(0) +#define PIOS_ADXL_ENABLE PIOS_SPI_RC_PinSet(PIOS_SPI_ACCEL,0) +#define PIOS_ADXL_DISABLE PIOS_SPI_RC_PinSet(PIOS_SPI_ACCEL,1) + + +//------------------------ +// PIOS_AK8794 +//------------------------ +#define PIOS_AK8974_DRDY_GPIO_PORT GPIOE +#define PIOS_AK8974_DRDY_GPIO_PIN GPIO_Pin_12 +#define PIOS_AK8974_DRDY_PORT_SOURCE GPIO_PortSourceGPIOE +#define PIOS_AK8974_DRDY_PIN_SOURCE GPIO_PinSource12 +#define PIOS_AK8974_DRDY_CLK RCC_APB2Periph_GPIOE +#define PIOS_AK8974_DRDY_EXTI_LINE EXTI_Line12 +#define PIOS_AK8974_DRDY_IRQn EXTI15_10_IRQn + +#define PIOS_AK8974_DRDY_PRIO PIOS_IRQ_PRIO_HIGH + +#else + +#define PIOS_LED_LED1_GPIO_PORT GPIOB +#ifdef MAPLE_MINI +#define PIOS_LED_LED1_GPIO_PIN GPIO_Pin_1 +#else +#define PIOS_LED_LED1_GPIO_PIN GPIO_Pin_8 +#endif +#define PIOS_LED_LED1_GPIO_CLK RCC_APB2Periph_GPIOB +#define PIOS_LED_LED2_GPIO_PORT GPIOB +#define PIOS_LED_LED2_GPIO_PIN GPIO_Pin_9 +#define PIOS_LED_LED2_GPIO_CLK RCC_APB2Periph_GPIOB +#define PIOS_LED_NUM 2 +#define PIOS_LED_PORTS { PIOS_LED_LED1_GPIO_PORT, PIOS_LED_LED2_GPIO_PORT } +#define PIOS_LED_PINS { PIOS_LED_LED1_GPIO_PIN, PIOS_LED_LED2_GPIO_PIN } +#define PIOS_LED_CLKS { PIOS_LED_LED1_GPIO_CLK, PIOS_LED_LED2_GPIO_CLK } +#endif + +//------------------------- // System Settings +//------------------------- +#define PIOS_MASTER_CLOCK 72000000 +#define PIOS_PERIPHERAL_CLOCK (PIOS_MASTER_CLOCK / 2) -#define PIOS_MASTER_CLOCK 72000000ul -#define PIOS_PERIPHERAL_CLOCK (PIOS_MASTER_CLOCK / 2) - -// ***************************************************************** +//------------------------- // Interrupt Priorities - +//------------------------- #define PIOS_IRQ_PRIO_LOW 12 // lower than RTOS #define PIOS_IRQ_PRIO_MID 8 // higher than RTOS #define PIOS_IRQ_PRIO_HIGH 5 // for SPI, ADC, I2C etc... -#define PIOS_IRQ_PRIO_HIGHEST 4 // for USART etc... - -// ***************************************************************** -// PIOS_LED - -#define PIOS_LED_USB 0 -#define PIOS_LED_LINK 1 -#define PIOS_LED_RX 2 -#define PIOS_LED_TX 3 - -#define PIOS_LED_HEARTBEAT PIOS_LED_USB -#define PIOS_LED_ALARM PIOS_LED_TX - -#define USB_LED_ON PIOS_LED_On(PIOS_LED_USB) -#define USB_LED_OFF PIOS_LED_Off(PIOS_LED_USB) -#define USB_LED_TOGGLE PIOS_LED_Toggle(PIOS_LED_USB) - -#define LINK_LED_ON PIOS_LED_On(PIOS_LED_LINK) -#define LINK_LED_OFF PIOS_LED_Off(PIOS_LED_LINK) -#define LINK_LED_TOGGLE PIOS_LED_Toggle(PIOS_LED_LINK) - -#define RX_LED_ON PIOS_LED_On(PIOS_LED_RX) -#define RX_LED_OFF PIOS_LED_Off(PIOS_LED_RX) -#define RX_LED_TOGGLE PIOS_LED_Toggle(PIOS_LED_RX) - -#define TX_LED_ON PIOS_LED_On(PIOS_LED_TX) -#define TX_LED_OFF PIOS_LED_Off(PIOS_LED_TX) -#define TX_LED_TOGGLE PIOS_LED_Toggle(PIOS_LED_TX) - -// ***************************************************************** -// Timer interrupt - -#define TIMER_INT_TIMER TIM3 -#define TIMER_INT_FUNC TIM3_IRQHandler -#define TIMER_INT_PRIORITY 2 - -// ***************************************************************** -// Stop watch timer - -#define STOPWATCH_TIMER TIM4 +#define PIOS_IRQ_PRIO_HIGHEST 4 // for USART etc... //------------------------ -// PIOS_SPI +// PIOS_I2C // See also pios_board.c //------------------------ -#define PIOS_SPI_MAX_DEVS 1 -extern uint32_t pios_spi_port_id; -#define PIOS_SPI_PORT (pios_spi_port_id) +#define PIOS_I2C_MAX_DEVS 1 +extern uint32_t pios_i2c_flexi_adapter_id; +#define PIOS_I2C_MAIN_ADAPTER (pios_i2c_flexi_adapter_id) //------------------------- -// PIOS_USART +// SPI // // See also pios_board.c //------------------------- -#define PIOS_USART_MAX_DEVS 1 +#define PIOS_SPI_MAX_DEVS 2 + +//------------------------- +// PIOS_USART +//------------------------- +#define PIOS_USART_MAX_DEVS 3 //------------------------- // PIOS_COM // // See also pios_board.c //------------------------- -#define PIOS_COM_MAX_DEVS 2 +#define PIOS_COM_MAX_DEVS 4 -extern uint32_t pios_com_serial_id; -#define PIOS_COM_SERIAL (pios_com_serial_id) -//#define PIOS_COM_DEBUG PIOS_COM_SERIAL // uncomment this to send debug info out the serial port - -#if defined(PIOS_INCLUDE_USB_HID) extern uint32_t pios_com_telem_usb_id; +#if defined(MOVE_CONTROLLER) +extern uint32_t pios_com_usart1_id; +#define PIOS_COM_TELEM_GCS (pios_com_usart1_id) +#define PIOS_COM_TELEM_OUT (pios_com_usart1_id) +#define PIOS_COM_DEBUG (pios_com_usart1_id) + +#elif defined(ANALOG_TRANSMITTER) +extern uint32_t pios_com_usart1_id; +extern uint32_t pios_com_usart2_id; +extern uint32_t pios_com_usart3_id; +// 1 = Xbee, 2 = Extra, 3 = USB +// Debug mode +//#define PIOS_COM_TELEM_GCS (pios_com_usart1_id) +//#define PIOS_COM_TELEM_OUT (pios_com_usart2_id) +//#define PIOS_COM_DEBUG (pios_com_usart3_id) + +// Normal mode +//#define PIOS_COM_TELEM_GCS (pios_com_usart3_id) +//#define PIOS_COM_TELEM_OUT (pios_com_usart1_id) +//#define PIOS_COM_DEBUG (pios_com_usart2_id) + +#elif defined(MAPLE_MINI) +extern uint32_t pios_com_usart1_id; +extern uint32_t pios_com_usart2_id; +extern uint32_t pios_com_usart3_id; +// On Maple Mini: +// 1 = Debug, 2 = Xbee, 3 = GCS +#define PIOS_COM_TELEM_GCS (pios_com_usart3_id) +#define PIOS_COM_TELEM_OUT (pios_com_usart2_id) +#define PIOS_COM_DEBUG (pios_com_usart1_id) +#endif + #define PIOS_COM_TELEM_USB (pios_com_telem_usb_id) -#endif -#if defined(PIOS_COM_DEBUG) -// #define DEBUG_PRINTF(...) PIOS_COM_SendFormattedString(PIOS_COM_DEBUG, __VA_ARGS__) - #define DEBUG_PRINTF(...) PIOS_COM_SendFormattedStringNonBlocking(PIOS_COM_DEBUG, __VA_ARGS__) -#else - #define DEBUG_PRINTF(...) -#endif +#if defined(ANALOG_TRANSMITTER) //------------------------- -// PPM input/output -//------------------------- -#define PIOS_PPM_IN_GPIO_PORT GPIOB -#define PIOS_PPM_IN_GPIO_PIN GPIO_Pin_11 -#define PIOS_PPM_IN_TIM_CHANNEL TIM_Channel_4 -#define PIOS_PPM_IN_TIM_CCR TIM_IT_CC4 -#define PIOS_PPM_IN_TIM_GETCAP_FUNC TIM_GetCapture4 - -#define PIOS_PPM_OUT_GPIO_PORT GPIOB -#define PIOS_PPM_OUT_GPIO_PIN GPIO_Pin_10 -#define PIOS_PPM_OUT_TIM_CHANNEL TIM_Channel_3 -#define PIOS_PPM_OUT_TIM_CCR TIM_IT_CC3 - -#define PIOS_PPM_MAX_CHANNELS 7 -#define PIOS_PPM_TIM_PORT TIM2 -#define PIOS_PPM_TIM TIM2 -#define PIOS_PPM_TIM_IRQ TIM2_IRQn -#define PIOS_PPM_CC_IRQ_FUNC TIM2_IRQHandler -#define PIOS_PPM_TIMER_EN_RCC_FUNC RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE) -#define PIOS_PPM_TIMER_DIS_RCC_FUNC RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, DISABLE) - -// ***************************************************************** // ADC +// PIOS_ADC_PinGet(0) = Roll Prim +// PIOS_ADC_PinGet(1) = Roll Trim +// PIOS_ADC_PinGet(2) = Pitch Prim +// PIOS_ADC_PinGet(3) = Pitch Trim +// PIOS_ADC_PinGet(4) = Yaw Prim +// PIOS_ADC_PinGet(5) = Yaw Trim +// PIOS_ADC_PinGet(6) = Throt Prim +// PIOS_ADC_PinGet(7) = Throt Trim +// PIOS_ADC_PinGet(8) = Poten +//------------------------- +//#define PIOS_ADC_OVERSAMPLING_RATE 1 +#define PIOS_ADC_USE_TEMP_SENSOR 1 +#define PIOS_ADC_TEMP_SENSOR_ADC ADC1 +#define PIOS_ADC_TEMP_SENSOR_ADC_CHANNEL 1 -// PIOS_ADC_PinGet(0) = Temperature Sensor (On-board) -// PIOS_ADC_PinGet(1) = PSU Voltage +#define PIOS_ADC_PIN1_GPIO_PORT GPIOA // PA0 +#define PIOS_ADC_PIN1_GPIO_PIN GPIO_Pin_0 // ADC12_IN0 +#define PIOS_ADC_PIN1_GPIO_CHANNEL ADC_Channel_0 +#define PIOS_ADC_PIN1_ADC ADC2 +#define PIOS_ADC_PIN1_ADC_NUMBER 1 -#define PIOS_ADC_OVERSAMPLING_RATE 2 +#define PIOS_ADC_PIN2_GPIO_PORT GPIOA // PA1 +#define PIOS_ADC_PIN2_GPIO_PIN GPIO_Pin_1 // ADC123_IN1 +#define PIOS_ADC_PIN2_GPIO_CHANNEL ADC_Channel_1 +#define PIOS_ADC_PIN2_ADC ADC1 +#define PIOS_ADC_PIN2_ADC_NUMBER 2 -#define PIOS_ADC_USE_TEMP_SENSOR 1 -#define PIOS_ADC_TEMP_SENSOR_ADC ADC1 -#define PIOS_ADC_TEMP_SENSOR_ADC_CHANNEL 16 // Temperature sensor channel -//#define PIOS_ADC_TEMP_SENSOR_ADC_CHANNEL 17 // VREF channel +#define PIOS_ADC_PIN3_GPIO_PORT GPIOA // PA2 +#define PIOS_ADC_PIN3_GPIO_PIN GPIO_Pin_2 // ADC12_IN2 +#define PIOS_ADC_PIN3_GPIO_CHANNEL ADC_Channel_2 +#define PIOS_ADC_PIN3_ADC ADC2 +#define PIOS_ADC_PIN3_ADC_NUMBER 2 -#define PIOS_ADC_PIN1_GPIO_PORT GPIOB // Port B (PSU Voltage) -#define PIOS_ADC_PIN1_GPIO_PIN GPIO_Pin_1 // PB1 .. ADC12_IN9 -#define PIOS_ADC_PIN1_GPIO_CHANNEL ADC_Channel_9 -#define PIOS_ADC_PIN1_ADC ADC2 -#define PIOS_ADC_PIN1_ADC_NUMBER 1 +#define PIOS_ADC_PIN4_GPIO_PORT GPIOA // PA3 +#define PIOS_ADC_PIN4_GPIO_PIN GPIO_Pin_3 // ADC12_IN3 +#define PIOS_ADC_PIN4_GPIO_CHANNEL ADC_Channel_3 +#define PIOS_ADC_PIN4_ADC ADC1 +#define PIOS_ADC_PIN4_ADC_NUMBER 3 -#define PIOS_ADC_NUM_PINS 1 +#define PIOS_ADC_PIN5_GPIO_PORT GPIOA // PA4 +#define PIOS_ADC_PIN5_GPIO_PIN GPIO_Pin_4 // ADC12_IN4 +#define PIOS_ADC_PIN5_GPIO_CHANNEL ADC_Channel_4 +#define PIOS_ADC_PIN5_ADC ADC2 +#define PIOS_ADC_PIN5_ADC_NUMBER 3 -#define PIOS_ADC_PORTS { PIOS_ADC_PIN1_GPIO_PORT } -#define PIOS_ADC_PINS { PIOS_ADC_PIN1_GPIO_PIN } -#define PIOS_ADC_CHANNELS { PIOS_ADC_PIN1_GPIO_CHANNEL } -#define PIOS_ADC_MAPPING { PIOS_ADC_PIN1_ADC } -#define PIOS_ADC_CHANNEL_MAPPING { PIOS_ADC_PIN1_ADC_NUMBER } +#define PIOS_ADC_PIN6_GPIO_PORT GPIOA // PA5 +#define PIOS_ADC_PIN6_GPIO_PIN GPIO_Pin_5 // ADC12_IN5 +#define PIOS_ADC_PIN6_GPIO_CHANNEL ADC_Channel_5 +#define PIOS_ADC_PIN6_ADC ADC1 +#define PIOS_ADC_PIN6_ADC_NUMBER 4 -#define PIOS_ADC_NUM_CHANNELS (PIOS_ADC_NUM_PINS + PIOS_ADC_USE_TEMP_SENSOR) -#define PIOS_ADC_NUM_ADC_CHANNELS 2 -#define PIOS_ADC_USE_ADC2 1 -#define PIOS_ADC_CLOCK_FUNCTION RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1 | RCC_APB2Periph_ADC2, ENABLE) -//#define PIOS_ADC_ADCCLK RCC_PCLK2_Div2 // ADC clock = PCLK2/2 -//#define PIOS_ADC_ADCCLK RCC_PCLK2_Div4 // ADC clock = PCLK2/4 -//#define PIOS_ADC_ADCCLK RCC_PCLK2_Div6 // ADC clock = PCLK2/6 -#define PIOS_ADC_ADCCLK RCC_PCLK2_Div8 // ADC clock = PCLK2/8 -//#define PIOS_ADC_SAMPLE_TIME ADC_SampleTime_1Cycles5 -//#define PIOS_ADC_SAMPLE_TIME ADC_SampleTime_7Cycles5 -//#define PIOS_ADC_SAMPLE_TIME ADC_SampleTime_13Cycles5 -//#define PIOS_ADC_SAMPLE_TIME ADC_SampleTime_28Cycles5 -//#define PIOS_ADC_SAMPLE_TIME ADC_SampleTime_41Cycles5 -//#define PIOS_ADC_SAMPLE_TIME ADC_SampleTime_55Cycles5 -//#define PIOS_ADC_SAMPLE_TIME ADC_SampleTime_71Cycles5 -#define PIOS_ADC_SAMPLE_TIME ADC_SampleTime_239Cycles5 - /* Sample time: */ - /* With an ADCCLK = 14 MHz and a sampling time of 293.5 cycles: */ - /* Tconv = 239.5 + 12.5 = 252 cycles = 18�s */ - /* (1 / (ADCCLK / CYCLES)) = Sample Time (�S) */ -#define PIOS_ADC_IRQ_PRIO 3 -#define PIOS_ADC_MAX_OVERSAMPLING 1 -#define PIOS_ADC_RATE (72.0e6 / 1 / 8 / 252 / (PIOS_ADC_NUM_ADC_CHANNELS >> PIOS_ADC_USE_ADC2)) +#define PIOS_ADC_PIN7_GPIO_PORT GPIOA // PA6 +#define PIOS_ADC_PIN7_GPIO_PIN GPIO_Pin_6 // ADC12_IN6 +#define PIOS_ADC_PIN7_GPIO_CHANNEL ADC_Channel_6 +#define PIOS_ADC_PIN7_ADC ADC2 +#define PIOS_ADC_PIN7_ADC_NUMBER 4 -// ***************************************************************** -// GPIO output pins +#define PIOS_ADC_PIN8_GPIO_PORT GPIOA // PA7 +#define PIOS_ADC_PIN8_GPIO_PIN GPIO_Pin_7 // ADC12_IN7 +#define PIOS_ADC_PIN8_GPIO_CHANNEL ADC_Channel_7 +#define PIOS_ADC_PIN8_ADC ADC1 +#define PIOS_ADC_PIN8_ADC_NUMBER 5 -// GPIO_Mode_Out_OD Open Drain Output -// GPIO_Mode_Out_PP Push-Pull Output -// GPIO_Mode_AF_OD Open Drain Output Alternate-Function -// GPIO_Mode_AF_PP Push-Pull Output Alternate-Function +#define PIOS_ADC_PIN9_GPIO_PORT GPIOB // PB0 +#define PIOS_ADC_PIN9_GPIO_PIN GPIO_Pin_0 // ADC12_IN8 +#define PIOS_ADC_PIN9_GPIO_CHANNEL ADC_Channel_8 +#define PIOS_ADC_PIN9_ADC ADC2 +#define PIOS_ADC_PIN9_ADC_NUMBER 5 -// Serial port RTS line -#define PIOS_GPIO_OUT_0_PORT GPIOB -#define PIOS_GPIO_OUT_0_PIN GPIO_Pin_15 -#define PIOS_GPIO_OUT_0_GPIO_CLK RCC_APB2Periph_GPIOB +#define PIOS_ADC_NUM_PINS 9 -// RF module chip-select line -#define PIOS_GPIO_OUT_1_PORT GPIOA -#define PIOS_GPIO_OUT_1_PIN GPIO_Pin_4 -#define PIOS_GPIO_OUT_1_GPIO_CLK RCC_APB2Periph_GPIOA +#define PIOS_ADC_PORTS { PIOS_ADC_PIN1_GPIO_PORT, PIOS_ADC_PIN2_GPIO_PORT, PIOS_ADC_PIN3_GPIO_PORT, PIOS_ADC_PIN4_GPIO_PORT, PIOS_ADC_PIN5_GPIO_PORT, PIOS_ADC_PIN6_GPIO_PORT, PIOS_ADC_PIN7_GPIO_PORT, PIOS_ADC_PIN8_GPIO_PORT, PIOS_ADC_PIN9_GPIO_PORT } +#define PIOS_ADC_PINS { PIOS_ADC_PIN1_GPIO_PIN, PIOS_ADC_PIN2_GPIO_PIN, PIOS_ADC_PIN3_GPIO_PIN, PIOS_ADC_PIN4_GPIO_PIN, PIOS_ADC_PIN5_GPIO_PIN, PIOS_ADC_PIN6_GPIO_PIN, PIOS_ADC_PIN7_GPIO_PIN, PIOS_ADC_PIN8_GPIO_PIN, PIOS_ADC_PIN9_GPIO_PIN } +#define PIOS_ADC_CHANNELS { PIOS_ADC_PIN1_GPIO_CHANNEL, PIOS_ADC_PIN2_GPIO_CHANNEL, PIOS_ADC_PIN3_GPIO_CHANNEL, PIOS_ADC_PIN4_GPIO_CHANNEL, PIOS_ADC_PIN5_GPIO_CHANNEL, PIOS_ADC_PIN6_GPIO_CHANNEL, PIOS_ADC_PIN7_GPIO_CHANNEL, PIOS_ADC_PIN8_GPIO_CHANNEL, PIOS_ADC_PIN9_GPIO_CHANNEL } +#define PIOS_ADC_MAPPING { PIOS_ADC_PIN1_ADC, PIOS_ADC_PIN2_ADC, PIOS_ADC_PIN3_ADC, PIOS_ADC_PIN4_ADC, PIOS_ADC_PIN5_ADC, PIOS_ADC_PIN6_ADC, PIOS_ADC_PIN7_ADC, PIOS_ADC_PIN8_ADC, PIOS_ADC_PIN9_ADC } +#define PIOS_ADC_CHANNEL_MAPPING { PIOS_ADC_PIN1_ADC_NUMBER, PIOS_ADC_PIN2_ADC_NUMBER, PIOS_ADC_PIN3_ADC_NUMBER, PIOS_ADC_PIN4_ADC_NUMBER, PIOS_ADC_PIN5_ADC_NUMBER, PIOS_ADC_PIN6_ADC_NUMBER, PIOS_ADC_PIN7_ADC_NUMBER, PIOS_ADC_PIN8_ADC_NUMBER, PIOS_ADC_PIN9_ADC_NUMBER } -// PPM OUT line -#define PIOS_GPIO_OUT_2_PORT GPIOB -#define PIOS_GPIO_OUT_2_PIN GPIO_Pin_10 -#define PIOS_GPIO_OUT_2_GPIO_CLK RCC_APB2Periph_GPIOB +#define PIOS_ADC_NUM_ADC_CHANNELS 2 +#define PIOS_ADC_USE_ADC2 1 -// spare pin -#define PIOS_GPIO_OUT_3_PORT GPIOA -#define PIOS_GPIO_OUT_3_PIN GPIO_Pin_0 -#define PIOS_GPIO_OUT_3_GPIO_CLK RCC_APB2Periph_GPIOA +#elif defined(MAPLE_MINI) -// spare pin -#define PIOS_GPIO_OUT_4_PORT GPIOA -#define PIOS_GPIO_OUT_4_PIN GPIO_Pin_1 -#define PIOS_GPIO_OUT_4_GPIO_CLK RCC_APB2Periph_GPIOA +//------------------------- +// ADC +// PIOS_ADC_PinGet(0) = Roll +// PIOS_ADC_PinGet(1) = Pitch +// PIOS_ADC_PinGet(2) = Yaw +// PIOS_ADC_PinGet(3) = Throt +//------------------------- +//#define PIOS_ADC_OVERSAMPLING_RATE 1 +//#define PIOS_ADC_USE_TEMP_SENSOR 1 +#define PIOS_ADC_USE_TEMP_SENSOR 0 +#define PIOS_ADC_TEMP_SENSOR_ADC ADC1 +#define PIOS_ADC_TEMP_SENSOR_ADC_CHANNEL 1 -// spare pin -#define PIOS_GPIO_OUT_5_PORT GPIOC -#define PIOS_GPIO_OUT_5_PIN GPIO_Pin_13 -#define PIOS_GPIO_OUT_5_GPIO_CLK RCC_APB2Periph_GPIOC +#define PIOS_ADC_PIN1_GPIO_PORT GPIOA // PA4 +#define PIOS_ADC_PIN1_GPIO_PIN GPIO_Pin_4 // ADC12_IN4 +#define PIOS_ADC_PIN1_GPIO_CHANNEL ADC_Channel_4 +#define PIOS_ADC_PIN1_ADC ADC1 +#define PIOS_ADC_PIN1_ADC_NUMBER 1 -// spare pin -#define PIOS_GPIO_OUT_6_PORT GPIOC -#define PIOS_GPIO_OUT_6_PIN GPIO_Pin_14 -#define PIOS_GPIO_OUT_6_GPIO_CLK RCC_APB2Periph_GPIOC +#define PIOS_ADC_PIN2_GPIO_PORT GPIOA // PA5 +#define PIOS_ADC_PIN2_GPIO_PIN GPIO_Pin_5 // ADC12_IN5 +#define PIOS_ADC_PIN2_GPIO_CHANNEL ADC_Channel_5 +#define PIOS_ADC_PIN2_ADC ADC2 +#define PIOS_ADC_PIN2_ADC_NUMBER 1 -// spare pin -#define PIOS_GPIO_OUT_7_PORT GPIOC -#define PIOS_GPIO_OUT_7_PIN GPIO_Pin_15 -#define PIOS_GPIO_OUT_7_GPIO_CLK RCC_APB2Periph_GPIOC +#define PIOS_ADC_PIN3_GPIO_PORT GPIOA // PA6 +#define PIOS_ADC_PIN3_GPIO_PIN GPIO_Pin_6 // ADC12_IN6 +#define PIOS_ADC_PIN3_GPIO_CHANNEL ADC_Channel_6 +#define PIOS_ADC_PIN3_ADC ADC1 +#define PIOS_ADC_PIN3_ADC_NUMBER 2 -#define PIOS_GPIO_NUM 8 -#define PIOS_GPIO_PORTS {PIOS_GPIO_OUT_0_PORT, PIOS_GPIO_OUT_1_PORT, PIOS_GPIO_OUT_2_PORT, PIOS_GPIO_OUT_3_PORT, PIOS_GPIO_OUT_4_PORT, PIOS_GPIO_OUT_5_PORT, PIOS_GPIO_OUT_6_PORT, PIOS_GPIO_OUT_7_PORT} -#define PIOS_GPIO_PINS {PIOS_GPIO_OUT_0_PIN, PIOS_GPIO_OUT_1_PIN, PIOS_GPIO_OUT_2_PIN, PIOS_GPIO_OUT_3_PIN, PIOS_GPIO_OUT_4_PIN, PIOS_GPIO_OUT_5_PIN, PIOS_GPIO_OUT_6_PIN, PIOS_GPIO_OUT_7_PIN} -#define PIOS_GPIO_CLKS {PIOS_GPIO_OUT_0_GPIO_CLK, PIOS_GPIO_OUT_1_GPIO_CLK, PIOS_GPIO_OUT_2_GPIO_CLK, PIOS_GPIO_OUT_3_GPIO_CLK, PIOS_GPIO_OUT_4_GPIO_CLK, PIOS_GPIO_OUT_5_GPIO_CLK, PIOS_GPIO_OUT_6_GPIO_CLK, PIOS_GPIO_OUT_7_GPIO_CLK} +#define PIOS_ADC_PIN4_GPIO_PORT GPIOA // PA7 +#define PIOS_ADC_PIN4_GPIO_PIN GPIO_Pin_7 // ADC12_IN7 +#define PIOS_ADC_PIN4_GPIO_CHANNEL ADC_Channel_7 +#define PIOS_ADC_PIN4_ADC ADC2 +#define PIOS_ADC_PIN4_ADC_NUMBER 2 -#define SERIAL_RTS_ENABLE PIOS_GPIO_Enable(0) -#define SERIAL_RTS_SET PIOS_GPIO_Off(0) -#define SERIAL_RTS_CLEAR PIOS_GPIO_On(0) +#ifdef NEVER +#define PIOS_ADC_PIN5_GPIO_PORT GPIOA // PA0 +#define PIOS_ADC_PIN5_GPIO_PIN GPIO_Pin_0 // ADC12_IN0 +#define PIOS_ADC_PIN5_GPIO_CHANNEL ADC_Channel_0 +#define PIOS_ADC_PIN5_ADC ADC2 +#define PIOS_ADC_PIN5_ADC_NUMBER 3 -#define RF_CS_ENABLE PIOS_GPIO_Enable(1) -#define RF_CS_HIGH PIOS_GPIO_Off(1) -#define RF_CS_LOW PIOS_GPIO_On(1) +#define PIOS_ADC_NUM_PINS 5 -#define PPM_OUT_PIN PIOS_GPIO_OUT_2_PIN -#define PPM_OUT_PORT PIOS_GPIO_OUT_2_PORT -#define PPM_OUT_ENABLE PIOS_GPIO_Enable(2) -#define PPM_OUT_HIGH PIOS_GPIO_Off(2) -#define PPM_OUT_LOW PIOS_GPIO_On(2) +#define PIOS_ADC_PORTS { PIOS_ADC_PIN1_GPIO_PORT, PIOS_ADC_PIN2_GPIO_PORT, PIOS_ADC_PIN3_GPIO_PORT, PIOS_ADC_PIN4_GPIO_PORT, PIOS_ADC_PIN5_GPIO_PORT } +#define PIOS_ADC_PINS { PIOS_ADC_PIN1_GPIO_PIN, PIOS_ADC_PIN2_GPIO_PIN, PIOS_ADC_PIN3_GPIO_PIN, PIOS_ADC_PIN4_GPIO_PIN, PIOS_ADC_PIN5_GPIO_PIN } +#define PIOS_ADC_CHANNELS { PIOS_ADC_PIN1_GPIO_CHANNEL, PIOS_ADC_PIN2_GPIO_CHANNEL, PIOS_ADC_PIN3_GPIO_CHANNEL, PIOS_ADC_PIN4_GPIO_CHANNEL, PIOS_ADC_PIN5_GPIO_CHANNEL } +#define PIOS_ADC_MAPPING { PIOS_ADC_PIN1_ADC, PIOS_ADC_PIN2_ADC, PIOS_ADC_PIN3_ADC, PIOS_ADC_PIN4_ADC, PIOS_ADC_PIN5_ADC } +#define PIOS_ADC_CHANNEL_MAPPING { PIOS_ADC_PIN1_ADC_NUMBER, PIOS_ADC_PIN2_ADC_NUMBER, PIOS_ADC_PIN3_ADC_NUMBER, PIOS_ADC_PIN4_ADC_NUMBER, PIOS_ADC_PIN5_ADC_NUMBER } +#endif -#define SPARE1_ENABLE PIOS_GPIO_Enable(3) -#define SPARE1_HIGH PIOS_GPIO_Off(3) -#define SPARE1_LOW PIOS_GPIO_On(3) +#define PIOS_ADC_NUM_PINS 4 -#define SPARE2_ENABLE PIOS_GPIO_Enable(4) -#define SPARE2_HIGH PIOS_GPIO_Off(4) -#define SPARE2_LOW PIOS_GPIO_On(4) +#define PIOS_ADC_PORTS { PIOS_ADC_PIN1_GPIO_PORT, PIOS_ADC_PIN2_GPIO_PORT, PIOS_ADC_PIN3_GPIO_PORT, PIOS_ADC_PIN4_GPIO_PORT } +#define PIOS_ADC_PINS { PIOS_ADC_PIN1_GPIO_PIN, PIOS_ADC_PIN2_GPIO_PIN, PIOS_ADC_PIN3_GPIO_PIN, PIOS_ADC_PIN4_GPIO_PIN } +#define PIOS_ADC_CHANNELS { PIOS_ADC_PIN1_GPIO_CHANNEL, PIOS_ADC_PIN2_GPIO_CHANNEL, PIOS_ADC_PIN3_GPIO_CHANNEL, PIOS_ADC_PIN4_GPIO_CHANNEL } +#define PIOS_ADC_MAPPING { PIOS_ADC_PIN1_ADC, PIOS_ADC_PIN2_ADC, PIOS_ADC_PIN3_ADC, PIOS_ADC_PIN4_ADC } +#define PIOS_ADC_CHANNEL_MAPPING { PIOS_ADC_PIN1_ADC_NUMBER, PIOS_ADC_PIN2_ADC_NUMBER, PIOS_ADC_PIN3_ADC_NUMBER, PIOS_ADC_PIN4_ADC_NUMBER } -#define SPARE3_ENABLE PIOS_GPIO_Enable(5) -#define SPARE3_HIGH PIOS_GPIO_Off(5) -#define SPARE3_LOW PIOS_GPIO_On(5) +#define PIOS_ADC_NUM_ADC_CHANNELS 2 +#define PIOS_ADC_USE_ADC2 1 -#define SPARE4_ENABLE PIOS_GPIO_Enable(6) -#define SPARE4_HIGH PIOS_GPIO_Off(6) -#define SPARE4_LOW PIOS_GPIO_On(6) +#elif defined(MOVE_CONTROLLER) -#define SPARE5_ENABLE PIOS_GPIO_Enable(7) -#define SPARE5_HIGH PIOS_GPIO_Off(7) -#define SPARE5_LOW PIOS_GPIO_On(7) +//------------------------- +// ADC +// PIOS_ADC_PinGet(0) = Accel X +// PIOS_ADC_PinGet(1) = Accel Y +// PIOS_ADC_PinGet(2) = Accel Z +// PIOS_ADC_PinGet(3) = (ND) +// PIOS_ADC_PinGet(4) = Gyro X +// PIOS_ADC_PinGet(5) = Gyro Y +// PIOS_ADC_PinGet(6) = Gyro Z +// PIOS_ADC_PinGet(7) = (ND) +//------------------------- +//#define PIOS_ADC_OVERSAMPLING_RATE 1 +#define PIOS_ADC_USE_TEMP_SENSOR 0 +#define PIOS_ADC_TEMP_SENSOR_ADC ADC1 +#define PIOS_ADC_TEMP_SENSOR_ADC_CHANNEL 1 -// ***************************************************************** -// GPIO input pins +#define PIOS_ADC_PIN1_GPIO_PORT GPIOA // PA1 (Accel X) +#define PIOS_ADC_PIN1_GPIO_PIN GPIO_Pin_1 // ADC12_IN1 +#define PIOS_ADC_PIN1_GPIO_CHANNEL ADC_Channel_1 +#define PIOS_ADC_PIN1_ADC ADC1 +#define PIOS_ADC_PIN1_ADC_NUMBER 1 -// GPIO_Mode_AIN Analog Input -// GPIO_Mode_IN_FLOATING Input Floating -// GPIO_Mode_IPD Input Pull-Down -// GPIO_Mode_IPU Input Pull-up +#define PIOS_ADC_PIN2_GPIO_PORT GPIOC // PC3 (Accel Y) +#define PIOS_ADC_PIN2_GPIO_PIN GPIO_Pin_3 // ADC12_IN13 +#define PIOS_ADC_PIN2_GPIO_CHANNEL ADC_Channel_13 +#define PIOS_ADC_PIN2_ADC ADC2 +#define PIOS_ADC_PIN2_ADC_NUMBER 1 -// API mode line -#define GPIO_IN_0_PORT GPIOB -#define GPIO_IN_0_PIN GPIO_Pin_13 -#define GPIO_IN_0_MODE GPIO_Mode_IPU +#define PIOS_ADC_PIN3_GPIO_PORT GPIOA // PA3 (Accel Z) +#define PIOS_ADC_PIN3_GPIO_PIN GPIO_Pin_3 // ADC12_IN3 +#define PIOS_ADC_PIN3_GPIO_CHANNEL ADC_Channel_3 +#define PIOS_ADC_PIN3_ADC ADC1 +#define PIOS_ADC_PIN3_ADC_NUMBER 2 -// Serial port CTS line -#define GPIO_IN_1_PORT GPIOB -#define GPIO_IN_1_PIN GPIO_Pin_14 -#define GPIO_IN_1_MODE GPIO_Mode_IPU +#define PIOS_ADC_PIN4_GPIO_PORT GPIOA // PA6 (not used) +#define PIOS_ADC_PIN4_GPIO_PIN GPIO_Pin_6 // ADC12_IN6 +#define PIOS_ADC_PIN4_GPIO_CHANNEL ADC_Channel_6 +#define PIOS_ADC_PIN4_ADC ADC2 +#define PIOS_ADC_PIN4_ADC_NUMBER 2 -// VBUS sense line -#define GPIO_IN_2_PORT GPIOA -#define GPIO_IN_2_PIN GPIO_Pin_8 -#define GPIO_IN_2_MODE GPIO_Mode_IN_FLOATING +#define PIOS_ADC_PIN5_GPIO_PORT GPIOC // PC1 (Gyro X) +#define PIOS_ADC_PIN5_GPIO_PIN GPIO_Pin_1 // ADC12_IN11 +#define PIOS_ADC_PIN5_GPIO_CHANNEL ADC_Channel_11 +#define PIOS_ADC_PIN5_ADC ADC1 +#define PIOS_ADC_PIN5_ADC_NUMBER 3 -// 868MHz jumper option -#define GPIO_IN_3_PORT GPIOB -#define GPIO_IN_3_PIN GPIO_Pin_8 -#define GPIO_IN_3_MODE GPIO_Mode_IPU +#define PIOS_ADC_PIN6_GPIO_PORT GPIOC // PC0 (Gyro Y) +#define PIOS_ADC_PIN6_GPIO_PIN GPIO_Pin_0 // ADC12_IN10 +#define PIOS_ADC_PIN6_GPIO_CHANNEL ADC_Channel_10 +#define PIOS_ADC_PIN6_ADC ADC2 +#define PIOS_ADC_PIN6_ADC_NUMBER 3 -// 915MHz jumper option -#define GPIO_IN_4_PORT GPIOB -#define GPIO_IN_4_PIN GPIO_Pin_9 -#define GPIO_IN_4_MODE GPIO_Mode_IPU +#define PIOS_ADC_PIN7_GPIO_PORT GPIOC // PC2 (Gyro Z) +#define PIOS_ADC_PIN7_GPIO_PIN GPIO_Pin_2 // ADC12_IN12 +#define PIOS_ADC_PIN7_GPIO_CHANNEL ADC_Channel_12 +#define PIOS_ADC_PIN7_ADC ADC1 +#define PIOS_ADC_PIN7_ADC_NUMBER 4 -// RF INT line -#define GPIO_IN_5_PORT GPIOA -#define GPIO_IN_5_PIN GPIO_Pin_2 -#define GPIO_IN_5_MODE GPIO_Mode_IN_FLOATING +#define PIOS_ADC_PIN8_GPIO_PORT GPIOB // PB1 (not used) +#define PIOS_ADC_PIN8_GPIO_PIN GPIO_Pin_1 // ADC12_IN9 +#define PIOS_ADC_PIN8_GPIO_CHANNEL ADC_Channel_9 +#define PIOS_ADC_PIN8_ADC ADC2 +#define PIOS_ADC_PIN8_ADC_NUMBER 4 -// RF misc line -#define GPIO_IN_6_PORT GPIOB -#define GPIO_IN_6_PIN GPIO_Pin_0 -#define GPIO_IN_6_MODE GPIO_Mode_IN_FLOATING +#define PIOS_ADC_NUM_PINS 8 -// PPM IN line -#define PPM_IN_PORT GPIOB -#define PPM_IN_PIN GPIO_Pin_11 -#define PPM_IN_MODE GPIO_Mode_IPD +#define PIOS_ADC_PORTS { PIOS_ADC_PIN1_GPIO_PORT, PIOS_ADC_PIN2_GPIO_PORT, PIOS_ADC_PIN3_GPIO_PORT, PIOS_ADC_PIN4_GPIO_PORT, PIOS_ADC_PIN5_GPIO_PORT, PIOS_ADC_PIN6_GPIO_PORT, PIOS_ADC_PIN7_GPIO_PORT, PIOS_ADC_PIN8_GPIO_PORT } +#define PIOS_ADC_PINS { PIOS_ADC_PIN1_GPIO_PIN, PIOS_ADC_PIN2_GPIO_PIN, PIOS_ADC_PIN3_GPIO_PIN, PIOS_ADC_PIN4_GPIO_PIN, PIOS_ADC_PIN5_GPIO_PIN, PIOS_ADC_PIN6_GPIO_PIN, PIOS_ADC_PIN7_GPIO_PIN, PIOS_ADC_PIN8_GPIO_PIN } +#define PIOS_ADC_CHANNELS { PIOS_ADC_PIN1_GPIO_CHANNEL, PIOS_ADC_PIN2_GPIO_CHANNEL, PIOS_ADC_PIN3_GPIO_CHANNEL, PIOS_ADC_PIN4_GPIO_CHANNEL, PIOS_ADC_PIN5_GPIO_CHANNEL, PIOS_ADC_PIN6_GPIO_CHANNEL, PIOS_ADC_PIN7_GPIO_CHANNEL, PIOS_ADC_PIN8_GPIO_CHANNEL } +#define PIOS_ADC_MAPPING { PIOS_ADC_PIN1_ADC, PIOS_ADC_PIN2_ADC, PIOS_ADC_PIN3_ADC, PIOS_ADC_PIN4_ADC, PIOS_ADC_PIN5_ADC, PIOS_ADC_PIN6_ADC, PIOS_ADC_PIN7_ADC, PIOS_ADC_PIN8_ADC } +#define PIOS_ADC_CHANNEL_MAPPING { PIOS_ADC_PIN1_ADC_NUMBER, PIOS_ADC_PIN2_ADC_NUMBER, PIOS_ADC_PIN3_ADC_NUMBER, PIOS_ADC_PIN4_ADC_NUMBER, PIOS_ADC_PIN5_ADC_NUMBER, PIOS_ADC_PIN6_ADC_NUMBER, PIOS_ADC_PIN7_ADC_NUMBER,PIOS_ADC_PIN8_ADC_NUMBER } -#define GPIO_IN_NUM 8 -#define GPIO_IN_PORTS { GPIO_IN_0_PORT, GPIO_IN_1_PORT, GPIO_IN_2_PORT, GPIO_IN_3_PORT, GPIO_IN_4_PORT, GPIO_IN_5_PORT, GPIO_IN_6_PORT, PPM_IN_PORT } -#define GPIO_IN_PINS { GPIO_IN_0_PIN, GPIO_IN_1_PIN, GPIO_IN_2_PIN, GPIO_IN_3_PIN, GPIO_IN_4_PIN, GPIO_IN_5_PIN, GPIO_IN_6_PIN, PPM_IN_PIN } -#define GPIO_IN_MODES { GPIO_IN_0_MODE, GPIO_IN_1_MODE, GPIO_IN_2_MODE, GPIO_IN_3_MODE, GPIO_IN_4_MODE, GPIO_IN_5_MODE, GPIO_IN_6_MODE, PPM_IN_MODE } +#define PIOS_ADC_NUM_ADC_CHANNELS 2 +#define PIOS_ADC_USE_ADC2 1 -#define API_MODE_PIN 0 -#define SERIAL_CTS_PIN 1 -#define VBUS_SENSE_PIN 2 -#define _868MHz_PIN 3 -#define _915MHz_PIN 4 -#define RF_INT_PIN 5 -#define RF_MISC_PIN 6 +#else -// ***************************************************************** +#define PIOS_ADC_USE_TEMP_SENSOR 0 +#define PIOS_ADC_TEMP_SENSOR_ADC ADC1 +#define PIOS_ADC_TEMP_SENSOR_ADC_CHANNEL 1 + +#define PIOS_ADC_NUM_PINS 0 + +#define PIOS_ADC_PORTS { } +#define PIOS_ADC_PINS { } +#define PIOS_ADC_CHANNELS { } +#define PIOS_ADC_MAPPING { } +#define PIOS_ADC_CHANNEL_MAPPING { } + +#define PIOS_ADC_NUM_ADC_CHANNELS 0 +#define PIOS_ADC_USE_ADC2 0 + +#endif + +#define PIOS_ADC_NUM_CHANNELS (PIOS_ADC_NUM_PINS + PIOS_ADC_USE_TEMP_SENSOR) +#define PIOS_ADC_CLOCK_FUNCTION RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1 | RCC_APB2Periph_ADC2, ENABLE) +#define PIOS_ADC_ADCCLK RCC_PCLK2_Div8 +/* RCC_PCLK2_Div2: ADC clock = PCLK2/2 */ +/* RCC_PCLK2_Div4: ADC clock = PCLK2/4 */ +/* RCC_PCLK2_Div6: ADC clock = PCLK2/6 */ +/* RCC_PCLK2_Div8: ADC clock = PCLK2/8 */ +#define PIOS_ADC_SAMPLE_TIME ADC_SampleTime_239Cycles5 +/* Sample time: */ +/* With an ADCCLK = 14 MHz and a sampling time of 239.5 cycles: */ +/* Tconv = 239.5 + 12.5 = 252 cycles = 18�s */ +/* (1 / (ADCCLK / CYCLES)) = Sample Time (�S) */ +#define PIOS_ADC_IRQ_PRIO PIOS_IRQ_PRIO_LOW + +// Currently analog acquistion hard coded at 480 Hz +// PCKL2 = HCLK / 16 +// ADCCLK = PCLK2 / 2 +#define PIOS_ADC_RATE (72.0e6 / 1.0 / 8.0 / 252.0 / (PIOS_ADC_NUM_CHANNELS >> PIOS_ADC_USE_ADC2)) +#define PIOS_ADC_MAX_OVERSAMPLING 36 + +//------------------------ +// PIOS_RCVR +// See also pios_board.c +//------------------------ +#define PIOS_RCVR_MAX_DEVS 3 +#define PIOS_RCVR_MAX_CHANNELS 12 + +//------------------------- +// Receiver PPM input +//------------------------- +#define PIOS_PPM_MAX_DEVS 1 +#define PIOS_PPM_NUM_INPUTS 12 + +//------------------------- +// Receiver PWM input +//------------------------- +#define PIOS_PWM_MAX_DEVS 1 +#define PIOS_PWM_NUM_INPUTS 1 + +//------------------------- +// Servo outputs +//------------------------- +#define PIOS_SERVO_UPDATE_HZ 50 +#define PIOS_SERVOS_INITIAL_POSITION 0 /* dont want to start motors, have no pulse till settings loaded */ + +//-------------------------- +// Timer controller settings +//-------------------------- +#define PIOS_TIM_MAX_DEVS 3 + +//------------------------- +// GPIO +//------------------------- +#define PIOS_GPIO_PORTS { } +#define PIOS_GPIO_PINS { } +#define PIOS_GPIO_CLKS { } +#define PIOS_GPIO_NUM 0 + +//------------------------- // USB +//------------------------- +#define PIOS_USB_HID_MAX_DEVS 1 -#if defined(PIOS_INCLUDE_USB_HID) - #define PIOS_USB_ENABLED 1 - #define PIOS_USB_MAX_DEVS 1 - #define PIOS_USB_DETECT_GPIO_PORT GPIO_IN_2_PORT - #define PIOS_USB_DETECT_GPIO_PIN GPIO_IN_2_PIN - #define PIOS_USB_DETECT_EXTI_LINE EXTI_Line4 - #define PIOS_IRQ_USB_PRIORITY 8 -#endif -#define PIOS_USB_HID_MAX_DEVS 1 - -// ***************************************************************** -// RFM22 - -//#define RFM22_EXT_INT_USE - -#define RFM22_PIOS_SPI PIOS_SPI_PORT // SPIx - -#if defined(RFM22_EXT_INT_USE) - #define RFM22_EXT_INT_PORT_SOURCE GPIO_PortSourceGPIOA - #define RFM22_EXT_INT_PIN_SOURCE GPIO_PinSource2 - - #define RFM22_EXT_INT_LINE EXTI_Line2 - #define RFM22_EXT_INT_IRQn EXTI2_IRQn - #define RFM22_EXT_INT_FUNC EXTI2_IRQHandler - - #define RFM22_EXT_INT_PRIORITY 1 +#define PIOS_USB_ENABLED 1 +#define PIOS_USB_HID_MAX_DEVS 1 +#define PIOS_USB_MAX_DEVS 1 +#ifdef MOVE_CONTROLLER +#define PIOS_USB_DETECT_GPIO_PORT GPIOD +#define PIOS_USB_DETECT_GPIO_PIN GPIO_Pin_7 +#define PIOS_USB_DETECT_EXTI_LINE EXTI_Line4 +#else +#define PIOS_USB_DETECT_GPIO_PORT GPIOC +#define PIOS_USB_DETECT_GPIO_PIN GPIO_Pin_15 +#define PIOS_USB_DETECT_EXTI_LINE EXTI_Line15 #endif -// ***************************************************************** - -#endif /* PIOS_BOARD_H */ +#endif /* STM32103CB_AHRS_H_ */ diff --git a/flight/PiOS/STM32F10x/link_STM32103CB_PIPXTREME_BL_sections.ld b/flight/PiOS/STM32F10x/link_STM32103CB_PIPXTREME_BL_sections.ld index 69eaadb8c..777e09aa6 100644 --- a/flight/PiOS/STM32F10x/link_STM32103CB_PIPXTREME_BL_sections.ld +++ b/flight/PiOS/STM32F10x/link_STM32103CB_PIPXTREME_BL_sections.ld @@ -3,7 +3,8 @@ PROVIDE ( vPortSVCHandler = 0 ) ; PROVIDE ( xPortPendSVHandler = 0 ) ; PROVIDE ( xPortSysTickHandler = 0 ) ; -_estack = 0x20004FF0; +/* This is the size of the stack for early init and for all FreeRTOS IRQs */ +_irq_stack_size = 0x400; /* Section Definitions */ SECTIONS @@ -49,6 +50,24 @@ SECTIONS _ebss = . ; } > SRAM + /* + * This stack is used both as the initial sp during early init as well as ultimately + * being used as the STM32's MSP (Main Stack Pointer) which is the same stack that + * is used for _all_ interrupt handlers. The end of this stack should be placed + * against the lowest address in RAM so that a stack overrun results in a hard fault + * at the first access beyond the end of the stack. + */ + .irq_stack : + { + . = ALIGN(4); + _irq_stack_end = . ; + . = . + _irq_stack_size ; + . = ALIGN(4); + _irq_stack_top = . - 4 ; + _init_stack_top = _irq_stack_top; + . = ALIGN(4); + } > SRAM + . = ALIGN(4); _end = . ; @@ -56,6 +75,39 @@ SECTIONS { . = ALIGN(4); KEEP(*(.boardinfo)) - . = ALIGN(4); } > BD_INFO + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } } diff --git a/flight/PiOS/STM32F10x/link_STM32103CB_PIPXTREME_memory.ld b/flight/PiOS/STM32F10x/link_STM32103CB_PIPXTREME_memory.ld index 04aa69ccb..fd36c31ba 100644 --- a/flight/PiOS/STM32F10x/link_STM32103CB_PIPXTREME_memory.ld +++ b/flight/PiOS/STM32F10x/link_STM32103CB_PIPXTREME_memory.ld @@ -2,7 +2,6 @@ MEMORY { BL_FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 0x03000 - 0x00080 BD_INFO (r) : ORIGIN = 0x08003000 - 0x80, LENGTH = 0x00080 - FLASH (rx) : ORIGIN = 0x08003000, LENGTH = 0x20000 - 0x03000 - 0x00400 - EE_FLASH (rw) : ORIGIN = 0x0801FC00, LENGTH = 0x00400 + FLASH (rx) : ORIGIN = 0x08003000, LENGTH = 0x20000 - 0x03000 SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x05000 } diff --git a/flight/PiOS/STM32F10x/link_STM32103CB_PIPXTREME_sections.ld b/flight/PiOS/STM32F10x/link_STM32103CB_PIPXTREME_sections.ld index badf5f986..568dddffa 100644 --- a/flight/PiOS/STM32F10x/link_STM32103CB_PIPXTREME_sections.ld +++ b/flight/PiOS/STM32F10x/link_STM32103CB_PIPXTREME_sections.ld @@ -1,3 +1,8 @@ +/* This is the size of the stack for all FreeRTOS IRQs */ +_irq_stack_size = 0x1A0; +/* This is the size of the stack for early init: life span is until scheduler starts */ +_init_stack_size = 0x100; + /* Stub out these functions since we don't use them anyway */ PROVIDE ( vPortSVCHandler = 0 ) ; PROVIDE ( xPortPendSVHandler = 0 ) ; @@ -5,8 +10,6 @@ PROVIDE ( xPortSysTickHandler = 0 ) ; PROVIDE(pios_board_info_blob = ORIGIN(BD_INFO)); -_estack = 0x20004FF0; - /* Section Definitions */ SECTIONS { @@ -19,6 +22,16 @@ SECTIONS *(.rodata .rodata* .gnu.linkonce.r.*) } > FLASH + /* module sections */ + .initcallmodule.init : + { + . = ALIGN(4); + __module_initcall_start = .; + KEEP(*(.initcallmodule.init)) + . = ALIGN(4); + __module_initcall_end = .; + } >FLASH + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) @@ -33,6 +46,23 @@ SECTIONS _etext = .; _sidata = .; + /* + * This stack is used both as the initial sp during early init as well as ultimately + * being used as the STM32's MSP (Main Stack Pointer) which is the same stack that + * is used for _all_ interrupt handlers. The end of this stack should be placed + * against the lowest address in RAM so that a stack overrun results in a hard fault + * at the first access beyond the end of the stack. + */ + .irq_stack : + { + . = ALIGN(4); + _irq_stack_end = . ; + . = . + _irq_stack_size ; + . = ALIGN(4); + _irq_stack_top = . - 4 ; + . = ALIGN(4); + } > SRAM + .data : AT (_etext) { _sdata = .; @@ -41,16 +71,81 @@ SECTIONS _edata = . ; } > SRAM + + /* .bss section which is used for uninitialized data */ .bss (NOLOAD) : { _sbss = . ; *(.bss .bss.*) *(COMMON) - . = ALIGN(4); - _ebss = . ; } > SRAM - . = ALIGN(4); - _end = . ; + .heap (NOLOAD) : + { + . = ALIGN(4); + _sheap = . ; + _sheap_pre_rtos = . ; + *(.heap) + . = ALIGN(4); + _eheap = . ; + _eheap_pre_rtos = . ; + _init_stack_end = . ; + _sheap_post_rtos = . ; + . = . + _init_stack_size ; + . = ALIGN(4); + _eheap_post_rtos = . ; + _init_stack_top = . - 4 ; + } > SRAM + + + _free_ram = . ; + .free_ram (NOLOAD) : + { + . = ORIGIN(SRAM) + LENGTH(SRAM) - _free_ram ; + /* This is used by the startup in order to initialize the .bss section */ + _ebss = . ; + _eram = . ; + } > SRAM + + /* keep the heap section at the end of the SRAM + * this will allow to claim the remaining bytes not used + * at run time! (done by the reset vector). + */ + + PROVIDE ( _end = _ebss ) ; + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } } diff --git a/flight/PipXtreme/Makefile b/flight/PipXtreme/Makefile old mode 100644 new mode 100755 index a21fdb74a..8c545aab1 --- a/flight/PipXtreme/Makefile +++ b/flight/PipXtreme/Makefile @@ -1,24 +1,24 @@ ##### - # Project: OpenPilot Pip Modems - # - # - # Makefile for OpenPilot Pip Modem project + # Project: OpenPilot + # + # + # Makefile for OpenPilot project build PiOS and the AP. # # The OpenPilot Team, http://www.openpilot.org, Copyright (C) 2009. - # + # # - # This program is free software; you can redistribute it and/or modify - # it under the terms of the GNU General Public License as published by - # the Free Software Foundation; either version 3 of the License, or + # This program is free software; you can redistribute it and/or modify + # it under the terms of the GNU General Public License as published by + # the Free Software Foundation; either version 3 of the License, or # (at your option) any later version. - # - # This program is distributed in the hope that it will be useful, but - # WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY - # or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + # + # This program is distributed in the hope that it will be useful, but + # WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + # or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License # for more details. - # - # You should have received a copy of the GNU General Public License along - # with this program; if not, write to the Free Software Foundation, Inc., + # + # You should have received a copy of the GNU General Public License along + # with this program; if not, write to the Free Software Foundation, Inc., # 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ##### @@ -33,12 +33,35 @@ TARGET := fw_$(BOARD_NAME) # Directory for output files (lst, obj, dep, elf, sym, map, hex, bin etc.) OUTDIR := $(TOP)/build/$(TARGET) -# Debugging (YES/NO) ? +# Set developer code and compile options +# Set to YES to compile for debugging DEBUG ?= NO -# Use Code Sourcery toolchain (YES/NO) ? +# Include objects that are just nice information to show +DIAGNOSTICS ?= NO + +# Set to YES to build a FW version that will erase all flash memory +ERASE_FLASH ?= NO +# Set to YES to use the Servo output pins for debugging via scope or logic analyser +ENABLE_DEBUG_PINS ?= NO + +# Set to Yes to enable the AUX UART which is mapped on the S1 (Tx) and S2 (Rx) servo outputs +ENABLE_AUX_UART ?= NO + +USE_GPS ?= NO + +USE_I2C ?= YES + +# Select the type of hardware you're using +ENABLE_TRANSMITTER_BOX ?= NO +ENABLE_ANALOG_TRANSMITTER ?= NO +ENABLE_MOVE_CONTROLLER ?= NO +ENABLE_MAPLE_MINI_TRANSMITTER ?= YES + +# Set to YES when using Code Sourcery toolchain CODE_SOURCERY ?= YES +# Remove command is different for Code Sourcery on Windows ifeq ($(CODE_SOURCERY), YES) REMOVE_CMD = cs-rm else @@ -47,56 +70,115 @@ endif FLASH_TOOL = OPENOCD -# Include the USB files (YES/NO) ? -USE_USB = YES +# List of modules to include +OPTMODULES = +MODULES = TransmitterControls FirmwareIAP +ifeq ($(ENABLE_MOVE_CONTROLLER), YES) +MODULES += AttitudeMARG +endif # Paths -HOME_DIR = ./ -HOME_DIR_INC = $(HOME_DIR)/inc -PIOS = ../PiOS -PIOSINC = $(PIOS)/inc +OPSYSTEM = ./System +OPSYSTEMINC = $(OPSYSTEM)/inc +OPUAVTALK = ../UAVTalk +OPUAVTALKINC = $(OPUAVTALK)/inc +OPUAVOBJ = ../UAVObjects +OPUAVOBJINC = $(OPUAVOBJ)/inc +OPTESTS = ./Tests +OPMODULEDIR = ../Modules FLIGHTLIB = ../Libraries FLIGHTLIBINC = $(FLIGHTLIB)/inc +PIOS = ../PiOS +PIOSINC = $(PIOS)/inc PIOSSTM32F10X = $(PIOS)/STM32F10x PIOSCOMMON = $(PIOS)/Common PIOSBOARDS = $(PIOS)/Boards APPLIBDIR = $(PIOSSTM32F10X)/Libraries STMLIBDIR = $(APPLIBDIR) STMSPDDIR = $(STMLIBDIR)/STM32F10x_StdPeriph_Driver -ifeq ($(USE_USB), YES) - STMUSBDIR = $(STMLIBDIR)/STM32_USB-FS-Device_Driver -endif +STMUSBDIR = $(STMLIBDIR)/STM32_USB-FS-Device_Driver STMSPDSRCDIR = $(STMSPDDIR)/src STMSPDINCDIR = $(STMSPDDIR)/inc -ifeq ($(USE_USB), YES) - STMUSBSRCDIR = $(STMUSBDIR)/src - STMUSBINCDIR = $(STMUSBDIR)/inc -endif +STMUSBSRCDIR = $(STMUSBDIR)/src +STMUSBINCDIR = $(STMUSBDIR)/inc CMSISDIR = $(STMLIBDIR)/CMSIS/Core/CM3 -BOOT = ../Bootloaders/AHRS -BOOTINC = $(BOOT)/inc -HWDEFSINC = ../board_hw_defs/$(BOARD_NAME) +DOSFSDIR = $(APPLIBDIR)/dosfs +MSDDIR = $(APPLIBDIR)/msd +RTOSDIR = $(APPLIBDIR)/FreeRTOS +RTOSSRCDIR = $(RTOSDIR)/Source +RTOSINCDIR = $(RTOSSRCDIR)/include +DOXYGENDIR = ../Doc/Doxygen +AHRSBOOTLOADER = ../Bootloaders/AHRS/ +AHRSBOOTLOADERINC = $(AHRSBOOTLOADER)/inc +PYMITE = $(FLIGHTLIB)/PyMite +PYMITELIB = $(PYMITE)/lib +PYMITEPLAT = $(PYMITE)/platform/openpilot +PYMITETOOLS = $(PYMITE)/tools +PYMITEVM = $(PYMITE)/vm +PYMITEINC = $(PYMITEVM) +PYMITEINC += $(PYMITEPLAT) +PYMITEINC += $(OUTDIR) +FLIGHTPLANLIB = $(OPMODULEDIR)/FlightPlan/lib +FLIGHTPLANS = $(OPMODULEDIR)/FlightPlan/flightplans + +OPUAVSYNTHDIR = $(OUTDIR)/../uavobject-synthetics/flight # List C source files here. (C dependencies are automatically generated.) # use file-extension c for "c-only"-files -## Core: -SRC += $(HOME_DIR)/main.c -SRC += $(HOME_DIR)/pios_board.c -SRC += $(HOME_DIR)/crc.c -SRC += $(HOME_DIR)/aes.c -SRC += $(HOME_DIR)/rfm22b.c -SRC += $(HOME_DIR)/packet_handler.c -SRC += $(HOME_DIR)/stream.c -SRC += $(HOME_DIR)/ppm.c -SRC += $(HOME_DIR)/transparent_comms.c -#SRC += $(HOME_DIR)/api_comms.c -SRC += $(HOME_DIR)/api_config.c -SRC += $(HOME_DIR)/saved_settings.c -SRC += $(HOME_DIR)/gpio_in.c -SRC += $(HOME_DIR)/stopwatch.c -SRC += $(HOME_DIR)/watchdog.c -SRC += $(FLIGHTLIB)/fifo_buffer.c +ifndef TESTAPP +## MODULES +SRC += ${foreach MOD, ${MODULES}, ${wildcard ${OPMODULEDIR}/${MOD}/*.c}} +## OPENPILOT CORE: +SRC += ${OPMODULEDIR}/System/systemmod.c +SRC += $(OPSYSTEM)/pipxtreme.c +SRC += $(OPSYSTEM)/pios_board.c +SRC += $(OPSYSTEM)/alarms.c +SRC += $(OPUAVTALK)/uavtalk.c +SRC += $(OPUAVOBJ)/uavobjectmanager.c +SRC += $(OPUAVOBJ)/eventdispatcher.c +else +## TESTCODE +SRC += $(OPTESTS)/test_common.c +SRC += $(OPTESTS)/$(TESTAPP).c +endif + + + +## UAVOBJECTS +ifndef TESTAPP +SRC += $(OPUAVSYNTHDIR)/accessorydesired.c +SRC += $(OPUAVSYNTHDIR)/objectpersistence.c +SRC += $(OPUAVSYNTHDIR)/gcstelemetrystats.c +SRC += $(OPUAVSYNTHDIR)/flighttelemetrystats.c +SRC += $(OPUAVSYNTHDIR)/flightstatus.c +SRC += $(OPUAVSYNTHDIR)/systemstats.c +SRC += $(OPUAVSYNTHDIR)/systemalarms.c +SRC += $(OPUAVSYNTHDIR)/systemsettings.c +SRC += $(OPUAVSYNTHDIR)/stabilizationdesired.c +SRC += $(OPUAVSYNTHDIR)/stabilizationsettings.c +SRC += $(OPUAVSYNTHDIR)/actuatorcommand.c +SRC += $(OPUAVSYNTHDIR)/actuatordesired.c +SRC += $(OPUAVSYNTHDIR)/actuatorsettings.c +SRC += $(OPUAVSYNTHDIR)/attituderaw.c +SRC += $(OPUAVSYNTHDIR)/attitudeactual.c +SRC += $(OPUAVSYNTHDIR)/manualcontrolcommand.c +SRC += $(OPUAVSYNTHDIR)/i2cstats.c +SRC += $(OPUAVSYNTHDIR)/watchdogstatus.c +SRC += $(OPUAVSYNTHDIR)/manualcontrolsettings.c +SRC += $(OPUAVSYNTHDIR)/mixersettings.c +SRC += $(OPUAVSYNTHDIR)/firmwareiapobj.c +SRC += $(OPUAVSYNTHDIR)/attitudesettings.c +SRC += $(OPUAVSYNTHDIR)/camerastabsettings.c +SRC += $(OPUAVSYNTHDIR)/cameradesired.c +SRC += $(OPUAVSYNTHDIR)/hwsettings.c +SRC += $(OPUAVSYNTHDIR)/gcsreceiver.c +SRC += $(OPUAVSYNTHDIR)/receiveractivity.c +SRC += $(OPUAVSYNTHDIR)/taskinfo.c +SRC += $(OPUAVSYNTHDIR)/mixerstatus.c +SRC += $(OPUAVSYNTHDIR)/ratedesired.c + +endif ## PIOS Hardware (STM32F10x) SRC += $(PIOSSTM32F10X)/pios_sys.c @@ -105,24 +187,30 @@ SRC += $(PIOSSTM32F10X)/pios_delay.c SRC += $(PIOSSTM32F10X)/pios_usart.c SRC += $(PIOSSTM32F10X)/pios_irq.c SRC += $(PIOSSTM32F10X)/pios_adc.c -SRC += $(PIOSSTM32F10X)/pios_gpio.c +SRC += $(PIOSSTM32F10X)/pios_i2c.c SRC += $(PIOSSTM32F10X)/pios_spi.c SRC += $(PIOSSTM32F10X)/pios_ppm.c +SRC += $(PIOSSTM32F10X)/pios_debug.c +SRC += $(PIOSSTM32F10X)/pios_gpio.c +SRC += $(PIOSSTM32F10X)/pios_exti.c +SRC += $(PIOSSTM32F10X)/pios_rtc.c +SRC += $(PIOSSTM32F10X)/pios_wdg.c +SRC += $(PIOSSTM32F10X)/pios_tim.c +SRC += $(PIOSSTM32F10X)/pios_pwm.c -# PIOS USB related files (seperated to make code maintenance more easy) -ifeq ($(USE_USB), YES) - SRC += $(PIOSSTM32F10X)/pios_usb.c - SRC += $(PIOSSTM32F10X)/pios_usbhook.c - SRC += $(PIOSSTM32F10X)/pios_usb_hid.c - SRC += $(PIOSSTM32F10X)/pios_usb_hid_istr.c - SRC += $(PIOSSTM32F10X)/pios_usb_hid_pwr.c - SRC += $(HOME_DIR)/pios_usb_board_data.c - SRC += $(PIOSCOMMON)/pios_usb_desc_hid_only.c -endif ## PIOS Hardware (Common) +SRC += $(PIOSCOMMON)/pios_crc.c SRC += $(PIOSCOMMON)/pios_com.c +SRC += $(PIOSCOMMON)/pios_i2c_esc.c +SRC += $(PIOSCOMMON)/pios_iap.c +SRC += $(PIOSCOMMON)/pios_bl_helper.c +SRC += $(PIOSCOMMON)/pios_rcvr.c SRC += $(PIOSCOMMON)/printf-stdarg.c +## Libraries for flight calculations +SRC += $(FLIGHTLIB)/fifo_buffer.c +SRC += $(FLIGHTLIB)/CoordinateConversions.c +SRC += $(FLIGHTLIB)/taskmonitor.c ## CMSIS for STM32 SRC += $(CMSISDIR)/core_cm3.c @@ -133,12 +221,10 @@ SRC += $(STMSPDSRCDIR)/stm32f10x_adc.c SRC += $(STMSPDSRCDIR)/stm32f10x_bkp.c SRC += $(STMSPDSRCDIR)/stm32f10x_crc.c SRC += $(STMSPDSRCDIR)/stm32f10x_dac.c -SRC += $(STMSPDSRCDIR)/stm32f10x_dbgmcu.c SRC += $(STMSPDSRCDIR)/stm32f10x_dma.c SRC += $(STMSPDSRCDIR)/stm32f10x_exti.c SRC += $(STMSPDSRCDIR)/stm32f10x_flash.c SRC += $(STMSPDSRCDIR)/stm32f10x_gpio.c -SRC += $(STMSPDSRCDIR)/stm32f10x_iwdg.c SRC += $(STMSPDSRCDIR)/stm32f10x_i2c.c SRC += $(STMSPDSRCDIR)/stm32f10x_pwr.c SRC += $(STMSPDSRCDIR)/stm32f10x_rcc.c @@ -146,31 +232,60 @@ SRC += $(STMSPDSRCDIR)/stm32f10x_rtc.c SRC += $(STMSPDSRCDIR)/stm32f10x_spi.c SRC += $(STMSPDSRCDIR)/stm32f10x_tim.c SRC += $(STMSPDSRCDIR)/stm32f10x_usart.c +SRC += $(STMSPDSRCDIR)/stm32f10x_iwdg.c +SRC += $(STMSPDSRCDIR)/stm32f10x_dbgmcu.c SRC += $(STMSPDSRCDIR)/misc.c ## STM32 USB Library -ifeq ($(USE_USB), YES) - SRC += $(STMUSBSRCDIR)/usb_core.c - SRC += $(STMUSBSRCDIR)/usb_init.c - SRC += $(STMUSBSRCDIR)/usb_int.c - SRC += $(STMUSBSRCDIR)/usb_mem.c - SRC += $(STMUSBSRCDIR)/usb_regs.c - SRC += $(STMUSBSRCDIR)/usb_sil.c -endif +SRC += $(STMUSBSRCDIR)/usb_core.c +SRC += $(STMUSBSRCDIR)/usb_init.c +SRC += $(STMUSBSRCDIR)/usb_int.c +SRC += $(STMUSBSRCDIR)/usb_mem.c +SRC += $(STMUSBSRCDIR)/usb_regs.c +SRC += $(STMUSBSRCDIR)/usb_sil.c + +## RTOS +SRC += $(RTOSSRCDIR)/list.c +SRC += $(RTOSSRCDIR)/queue.c +SRC += $(RTOSSRCDIR)/tasks.c + +## RTOS Portable +SRC += $(RTOSSRCDIR)/portable/GCC/ARM_CM3/port.c +SRC += $(RTOSSRCDIR)/portable/MemMang/heap_1.c + +## Dosfs file system +#SRC += $(DOSFSDIR)/dosfs.c +#SRC += $(DOSFSDIR)/dfs_sdcard.c + +## PyMite files +#SRC += $(wildcard ${PYMITEVM}/*.c) +#SRC += $(wildcard ${PYMITEPLAT}/*.c) +#SRC += $(OUTDIR)/pmlib_img.c +#SRC += $(OUTDIR)/pmlib_nat.c +#SRC += $(OUTDIR)/pmlibusr_img.c +#SRC += $(OUTDIR)/pmlibusr_nat.c + +## Mass Storage Device +#SRC += $(MSDDIR)/msd.c +#SRC += $(MSDDIR)/msd_bot.c +#SRC += $(MSDDIR)/msd_desc.c +#SRC += $(MSDDIR)/msd_memory.c +#SRC += $(MSDDIR)/msd_scsi.c +#SRC += $(MSDDIR)/msd_scsi_data.c # List C source files here which must be compiled in ARM-Mode (no -mthumb). # use file-extension c for "c-only"-files ## just for testing, timer.c could be compiled in thumb-mode too -SRCARM = +SRCARM = # List C++ source files here. # use file-extension .cpp for C++-files (not .C) -CPPSRC = +CPPSRC = # List C++ source files here which must be compiled in ARM-Mode. # use file-extension .cpp for C++-files (not .C) #CPPSRCARM = $(TARGET).cpp -CPPSRCARM = +CPPSRCARM = # List Assembler source files here. # Make them always end in a capital .S. Files ending in a lowercase .s @@ -182,12 +297,17 @@ CPPSRCARM = ASRC = $(PIOSSTM32F10X)/startup_stm32f10x_$(MODEL)$(MODEL_SUFFIX).S # List Assembler source files here which must be assembled in ARM-Mode.. -ASRCARM = +ASRCARM = # List any extra directories to look for include files here. # Each directory must be seperated by a space. -EXTRAINCDIRS += $(HOME_DIR) -EXTRAINCDIRS += $(HOME_DIR_INC) +EXTRAINCDIRS = $(OPSYSTEM) +EXTRAINCDIRS += $(OPSYSTEMINC) +EXTRAINCDIRS += $(OPUAVTALK) +EXTRAINCDIRS += $(OPUAVTALKINC) +EXTRAINCDIRS += $(OPUAVOBJ) +EXTRAINCDIRS += $(OPUAVOBJINC) +EXTRAINCDIRS += $(OPUAVSYNTHDIR) EXTRAINCDIRS += $(PIOS) EXTRAINCDIRS += $(PIOSINC) EXTRAINCDIRS += $(FLIGHTLIBINC) @@ -195,22 +315,28 @@ EXTRAINCDIRS += $(PIOSSTM32F10X) EXTRAINCDIRS += $(PIOSCOMMON) EXTRAINCDIRS += $(PIOSBOARDS) EXTRAINCDIRS += $(STMSPDINCDIR) -ifeq ($(USE_USB), YES) - EXTRAINCDIRS += $(STMUSBINCDIR) -endif +EXTRAINCDIRS += $(STMUSBINCDIR) EXTRAINCDIRS += $(CMSISDIR) -EXTRAINCDIRS += $(BOOTINC) -EXTRAINCDIRS += $(HWDEFSINC) +EXTRAINCDIRS += $(DOSFSDIR) +EXTRAINCDIRS += $(MSDDIR) +EXTRAINCDIRS += $(RTOSINCDIR) +EXTRAINCDIRS += $(APPLIBDIR) +EXTRAINCDIRS += $(RTOSSRCDIR)/portable/GCC/ARM_CM3 +EXTRAINCDIRS += $(AHRSBOOTLOADERINC) +EXTRAINCDIRS += $(PYMITEINC) + +EXTRAINCDIRS += ${foreach MOD, ${OPTMODULES} ${MODULES}, ${OPMODULEDIR}/${MOD}/inc} ${OPMODULEDIR}/System/inc + # List any extra directories to look for library files here. # Also add directories where the linker should search for # includes from linker-script to the list # Each directory must be seperated by a space. -EXTRA_LIBDIRS = +EXTRA_LIBDIRS = # Extra Libraries # Each library-name must be seperated by a space. -# i.e. to link with libxyz.a, libabc.a and libefsl.a: +# i.e. to link with libxyz.a, libabc.a and libefsl.a: # EXTRA_LIBS = xyz abc efsl # for newlib-lpc (file: libnewlibc-lpc.a): # EXTRA_LIBS = newlib-lpc @@ -219,19 +345,18 @@ EXTRA_LIBS = # Path to Linker-Scripts LINKERSCRIPTPATH = $(PIOSSTM32F10X) -# Optimization level, can be [0, 1, 2, 3, s]. +# Optimization level, can be [0, 1, 2, 3, s]. # 0 = turn off optimization. s = optimize for size. # (Note: 3 is not always the best optimization level. See avr-libc FAQ.) ifeq ($(DEBUG),YES) -OPT = 0 +OPT = 1 else OPT = s -#OPT = 2 endif # Output format. (can be ihex or binary or both) -# binary to create a load-image in raw-binary format i.e. for SAM-BA, +# binary to create a load-image in raw-binary format i.e. for SAM-BA, # ihex to create a load-image in Intel hex format #LOADFORMAT = ihex #LOADFORMAT = binary @@ -240,13 +365,43 @@ LOADFORMAT = both # Debugging format. DEBUGF = dwarf-2 -# Place project-specific -D (define) and/or +# Place project-specific -D (define) and/or # -U options for C here. CDEFS = -DSTM32F10X_$(MODEL) CDEFS += -DUSE_STDPERIPH_DRIVER CDEFS += -DUSE_$(BOARD) +ifeq ($(ENABLE_DEBUG_PINS), YES) +CDEFS += -DPIOS_ENABLE_DEBUG_PINS +endif +ifeq ($(ENABLE_AUX_UART), YES) +CDEFS += -DPIOS_ENABLE_AUX_UART +endif +ifeq ($(ERASE_FLASH), YES) +CDEFS += -DERASE_FLASH +endif -# Place project-specific -D and/or -U options for +ifneq ($(USE_GPS), NO) +CDEFS += -DUSE_GPS +endif + +ifeq ($(USE_I2C), YES) +CDEFS += -DUSE_I2C +endif + +ifeq ($(ENABLE_TRANSMITTER_BOX), YES) +CDEFS += -DTRANSMITTER_BOX +endif +ifeq ($(ENABLE_ANALOG_TRANSMITTER), YES) +CDEFS += -DANALOG_TRANSMITTER +endif +ifeq ($(ENABLE_MOVE_CONTROLLER), YES) +CDEFS += -DMOVE_CONTROLLER +endif +ifeq ($(ENABLE_MAPLE_MINI_TRANSMITTER), YES) +CDEFS += -DMAPLE_MINI +endif + +# Place project-specific -D and/or -U options for # Assembler with preprocessor here. #ADEFS = -DUSE_IRQ_ASM_WRAPPER ADEFS = -D__ASSEMBLY__ @@ -272,18 +427,27 @@ CSTANDARD = -std=gnu99 # Flags for C and C++ (arm-elf-gcc/arm-elf-g++) ifeq ($(DEBUG),YES) -CFLAGS = -g$(DEBUGF) +CFLAGS = -DDEBUG endif -CFLAGS += -O$(OPT) -ifeq ($(DEBUG),NO) -CFLAGS += -fdata-sections -ffunction-sections +ifeq ($(DIAGNOSTICS),YES) +CFLAGS = -DDIAGNOSTICS endif + +CFLAGS += -g$(DEBUGF) +CFLAGS += -O$(OPT) CFLAGS += -mcpu=$(MCU) CFLAGS += $(CDEFS) CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS)) -I. -CFLAGS += -mapcs-frame +#CFLAGS += -fno-cprop-registers -fno-defer-pop -fno-guess-branch-probability -fno-section-anchors +#CFLAGS += -fno-if-conversion -fno-if-conversion2 -fno-ipa-pure-const -fno-ipa-reference -fno-merge-constants +#CFLAGS += -fno-split-wide-types -fno-tree-ccp -fno-tree-ch -fno-tree-copy-prop -fno-tree-copyrename +#CFLAGS += -fno-tree-dce -fno-tree-dominator-opts -fno-tree-dse -fno-tree-fre -fno-tree-sink -fno-tree-sra +#CFLAGS += -fno-tree-ter +#CFLAGS += -g$(DEBUGF) -DDEBUG + +CFLAGS += -mapcs-frame CFLAGS += -fomit-frame-pointer ifeq ($(CODE_SOURCERY), YES) CFLAGS += -fpromote-loop-indices @@ -296,7 +460,7 @@ CFLAGS += -Wa,-adhlns=$(addprefix $(OUTDIR)/, $(notdir $(addsuffix .lst, $(basen CFLAGS += -MD -MP -MF $(OUTDIR)/dep/$(@F).d # flags only for C -#CONLYFLAGS += -Wnested-externs +#CONLYFLAGS += -Wnested-externs CONLYFLAGS += $(CSTANDARD) # Assembler flags. @@ -314,14 +478,11 @@ MATH_LIB = -lm # -Map: create map file # --cref: add cross reference to map file LDFLAGS = -nostartfiles -Wl,-Map=$(OUTDIR)/$(TARGET).map,--cref,--gc-sections -ifeq ($(DEBUG),NO) -LDFLAGS += -Wl,-static -Wl,-s -endif LDFLAGS += $(patsubst %,-L%,$(EXTRA_LIBDIRS)) LDFLAGS += -lc LDFLAGS += $(patsubst %,-l%,$(EXTRA_LIBS)) LDFLAGS += $(MATH_LIB) -LDFLAGS += -lc -lgcc +LDFLAGS += -lc -lgcc # Set linker-script name depending on selected submodel name LDFLAGS += -T$(LINKERSCRIPTPATH)/link_$(BOARD)_memory.ld @@ -329,6 +490,7 @@ LDFLAGS += -T$(LINKERSCRIPTPATH)/link_$(BOARD)_sections.ld # Define programs and commands. REMOVE = $(REMOVE_CMD) -f +PYTHON = python # List of all source files. ALLSRC = $(ASRCARM) $(ASRC) $(SRCARM) $(SRC) $(CPPSRCARM) $(CPPSRC) @@ -348,38 +510,45 @@ all: build ifeq ($(LOADFORMAT),ihex) build: elf hex lss sym -else +else ifeq ($(LOADFORMAT),binary) build: elf bin lss sym -else +else ifeq ($(LOADFORMAT),both) build: elf hex bin lss sym -else +else $(error "$(MSG_FORMATERROR) $(FORMAT)") endif endif endif +# Generate code for PyMite +#$(OUTDIR)/pmlib_img.c $(OUTDIR)/pmlib_nat.c $(OUTDIR)/pmlibusr_img.c $(OUTDIR)/pmlibusr_nat.c $(OUTDIR)/pmfeatures.h: $(wildcard $(PYMITELIB)/*.py) $(wildcard $(PYMITEPLAT)/*.py) $(wildcard $(FLIGHTPLANLIB)/*.py) $(wildcard $(FLIGHTPLANS)/*.py) +# @echo $(MSG_PYMITEINIT) $(call toprel, $@) +# @$(PYTHON) $(PYMITETOOLS)/pmImgCreator.py -f $(PYMITEPLAT)/pmfeatures.py -c -s --memspace=flash -o $(OUTDIR)/pmlib_img.c --native-file=$(OUTDIR)/pmlib_nat.c $(PYMITELIB)/list.py $(PYMITELIB)/dict.py $(PYMITELIB)/__bi.py $(PYMITELIB)/sys.py $(PYMITELIB)/string.py $(wildcard $(FLIGHTPLANLIB)/*.py) +# @$(PYTHON) $(PYMITETOOLS)/pmGenPmFeatures.py $(PYMITEPLAT)/pmfeatures.py > $(OUTDIR)/pmfeatures.h +# @$(PYTHON) $(PYMITETOOLS)/pmImgCreator.py -f $(PYMITEPLAT)/pmfeatures.py -c -u -o $(OUTDIR)/pmlibusr_img.c --native-file=$(OUTDIR)/pmlibusr_nat.c $(FLIGHTPLANS)/test.py + # Link: create ELF output file from object files. $(eval $(call LINK_TEMPLATE, $(OUTDIR)/$(TARGET).elf, $(ALLOBJ))) # Assemble: create object files from assembler source files. -$(foreach src, $(ASRC), $(eval $(call ASSEMBLE_TEMPLATE, $(src)))) +$(foreach src, $(ASRC), $(eval $(call ASSEMBLE_TEMPLATE, $(src)))) # Assemble: create object files from assembler source files. ARM-only -$(foreach src, $(ASRCARM), $(eval $(call ASSEMBLE_ARM_TEMPLATE, $(src)))) +$(foreach src, $(ASRCARM), $(eval $(call ASSEMBLE_ARM_TEMPLATE, $(src)))) # Compile: create object files from C source files. -$(foreach src, $(SRC), $(eval $(call COMPILE_C_TEMPLATE, $(src)))) +$(foreach src, $(SRC), $(eval $(call COMPILE_C_TEMPLATE, $(src)))) # Compile: create object files from C source files. ARM-only -$(foreach src, $(SRCARM), $(eval $(call COMPILE_C_ARM_TEMPLATE, $(src)))) +$(foreach src, $(SRCARM), $(eval $(call COMPILE_C_ARM_TEMPLATE, $(src)))) # Compile: create object files from C++ source files. -$(foreach src, $(CPPSRC), $(eval $(call COMPILE_CPP_TEMPLATE, $(src)))) +$(foreach src, $(CPPSRC), $(eval $(call COMPILE_CPP_TEMPLATE, $(src)))) # Compile: create object files from C++ source files. ARM-only -$(foreach src, $(CPPSRCARM), $(eval $(call COMPILE_CPP_ARM_TEMPLATE, $(src)))) +$(foreach src, $(CPPSRCARM), $(eval $(call COMPILE_CPP_ARM_TEMPLATE, $(src)))) # Compile: create assembler files from C source files. ARM/Thumb $(eval $(call PARTIAL_COMPILE_TEMPLATE, SRC)) @@ -396,7 +565,7 @@ $(eval $(call JTAG_TEMPLATE,$(OUTDIR)/$(TARGET).bin,$(FW_BANK_BASE),$(FW_BANK_SI .PHONY: elf lss sym hex bin bino opfw elf: $(OUTDIR)/$(TARGET).elf -lss: $(OUTDIR)/$(TARGET).lss +lss: $(OUTDIR)/$(TARGET).lss sym: $(OUTDIR)/$(TARGET).sym hex: $(OUTDIR)/$(TARGET).hex bin: $(OUTDIR)/$(TARGET).bin @@ -432,6 +601,8 @@ clean_list : $(V1) $(REMOVE) $(OUTDIR)/$(TARGET).sym $(V1) $(REMOVE) $(OUTDIR)/$(TARGET).lss $(V1) $(REMOVE) $(OUTDIR)/$(TARGET).bin.o + $(V1) $(REMOVE) $(wildcard $(OUTDIR)/*.c) + $(V1) $(REMOVE) $(wildcard $(OUTDIR)/*.h) $(V1) $(REMOVE) $(ALLOBJ) $(V1) $(REMOVE) $(LSTFILES) $(V1) $(REMOVE) $(DEPFILES) diff --git a/flight/PipXtreme/System/alarms.c b/flight/PipXtreme/System/alarms.c new file mode 100755 index 000000000..01d79a1e5 --- /dev/null +++ b/flight/PipXtreme/System/alarms.c @@ -0,0 +1,214 @@ +/** + ****************************************************************************** + * @addtogroup OpenPilotSystem OpenPilot System + * @{ + * @addtogroup OpenPilotLibraries OpenPilot System Libraries + * @brief OpenPilot System libraries are available to all OP modules. + * @{ + * @file alarms.c + * @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2010. + * @brief Library for setting and clearing system alarms + * @see The GNU Public License (GPL) Version 3 + * + *****************************************************************************/ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include "openpilot.h" +#include "alarms.h" + +// Private constants + +// Private types + +// Private variables +static xSemaphoreHandle lock; + +// Private functions +static int32_t hasSeverity(SystemAlarmsAlarmOptions severity); + +/** + * Initialize the alarms library + */ +int32_t AlarmsInitialize(void) +{ + SystemAlarmsInitialize(); + + lock = xSemaphoreCreateRecursiveMutex(); + //do not change the default states of the alarms, let the init code generated by the uavobjectgenerator handle that + //AlarmsClearAll(); + //AlarmsDefaultAll(); + return 0; +} + +/** + * Set an alarm + * @param alarm The system alarm to be modified + * @param severity The alarm severity + * @return 0 if success, -1 if an error + */ +int32_t AlarmsSet(SystemAlarmsAlarmElem alarm, SystemAlarmsAlarmOptions severity) +{ + SystemAlarmsData alarms; + + // Check that this is a valid alarm + if (alarm >= SYSTEMALARMS_ALARM_NUMELEM) + { + return -1; + } + + // Lock + xSemaphoreTakeRecursive(lock, portMAX_DELAY); + + // Read alarm and update its severity only if it was changed + SystemAlarmsGet(&alarms); + if ( alarms.Alarm[alarm] != severity ) + { + alarms.Alarm[alarm] = severity; + SystemAlarmsSet(&alarms); + } + + // Release lock + xSemaphoreGiveRecursive(lock); + return 0; + +} + +/** + * Get an alarm + * @param alarm The system alarm to be read + * @return Alarm severity + */ +SystemAlarmsAlarmOptions AlarmsGet(SystemAlarmsAlarmElem alarm) +{ + SystemAlarmsData alarms; + + // Check that this is a valid alarm + if (alarm >= SYSTEMALARMS_ALARM_NUMELEM) + { + return 0; + } + + // Read alarm + SystemAlarmsGet(&alarms); + return alarms.Alarm[alarm]; +} + +/** + * Set an alarm to it's default value + * @param alarm The system alarm to be modified + * @return 0 if success, -1 if an error + */ +int32_t AlarmsDefault(SystemAlarmsAlarmElem alarm) +{ + return AlarmsSet(alarm, SYSTEMALARMS_ALARM_DEFAULT); +} + +/** + * Default all alarms + */ +void AlarmsDefaultAll() +{ + uint32_t n; + for (n = 0; n < SYSTEMALARMS_ALARM_NUMELEM; ++n) + { + AlarmsDefault(n); + } +} + +/** + * Clear an alarm + * @param alarm The system alarm to be modified + * @return 0 if success, -1 if an error + */ +int32_t AlarmsClear(SystemAlarmsAlarmElem alarm) +{ + return AlarmsSet(alarm, SYSTEMALARMS_ALARM_OK); +} + +/** + * Clear all alarms + */ +void AlarmsClearAll() +{ + uint32_t n; + for (n = 0; n < SYSTEMALARMS_ALARM_NUMELEM; ++n) + { + AlarmsClear(n); + } +} + +/** + * Check if there are any alarms with the given or higher severity + * @return 0 if no alarms are found, 1 if at least one alarm is found + */ +int32_t AlarmsHasWarnings() +{ + return hasSeverity(SYSTEMALARMS_ALARM_WARNING); +} + +/** + * Check if there are any alarms with error or higher severity + * @return 0 if no alarms are found, 1 if at least one alarm is found + */ +int32_t AlarmsHasErrors() +{ + return hasSeverity(SYSTEMALARMS_ALARM_ERROR); +}; + +/** + * Check if there are any alarms with critical or higher severity + * @return 0 if no alarms are found, 1 if at least one alarm is found + */ +int32_t AlarmsHasCritical() +{ + return hasSeverity(SYSTEMALARMS_ALARM_CRITICAL); +}; + +/** + * Check if there are any alarms with the given or higher severity + * @return 0 if no alarms are found, 1 if at least one alarm is found + */ +static int32_t hasSeverity(SystemAlarmsAlarmOptions severity) +{ + SystemAlarmsData alarms; + uint32_t n; + + // Lock + xSemaphoreTakeRecursive(lock, portMAX_DELAY); + + // Read alarms + SystemAlarmsGet(&alarms); + + // Go through alarms and check if any are of the given severity or higher + for (n = 0; n < SYSTEMALARMS_ALARM_NUMELEM; ++n) + { + if ( alarms.Alarm[n] >= severity) + { + xSemaphoreGiveRecursive(lock); + return 1; + } + } + + // If this point is reached then no alarms found + xSemaphoreGiveRecursive(lock); + return 0; +} +/** + * @} + * @} + */ + diff --git a/flight/PipXtreme/System/inc/FreeRTOSConfig.h b/flight/PipXtreme/System/inc/FreeRTOSConfig.h new file mode 100755 index 000000000..994956008 --- /dev/null +++ b/flight/PipXtreme/System/inc/FreeRTOSConfig.h @@ -0,0 +1,99 @@ + +#ifndef FREERTOS_CONFIG_H +#define FREERTOS_CONFIG_H + +/*----------------------------------------------------------- + * Application specific definitions. + * + * These definitions should be adjusted for your particular hardware and + * application requirements. + * + * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE + * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. + * + * See http://www.freertos.org/a00110.html. + *----------------------------------------------------------*/ + +/** + * @addtogroup PIOS PIOS + * @{ + * @addtogroup FreeRTOS FreeRTOS + * @{ + */ + +/* Notes: We use 5 task priorities */ + +#define configUSE_PREEMPTION 1 +#define configUSE_IDLE_HOOK 1 +#define configUSE_TICK_HOOK 0 +#define configUSE_MALLOC_FAILED_HOOK 1 +#define configCPU_CLOCK_HZ ( ( unsigned long ) 72000000 ) +#define configTICK_RATE_HZ ( ( portTickType ) 1000 ) +#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 5 ) +#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 48 ) +#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 54 * 256) ) +#define configMAX_TASK_NAME_LEN ( 16 ) +#define configUSE_TRACE_FACILITY 0 +#define configUSE_16_BIT_TICKS 0 +#define configIDLE_SHOULD_YIELD 0 +#define configUSE_MUTEXES 1 +#define configUSE_RECURSIVE_MUTEXES 1 +#define configUSE_COUNTING_SEMAPHORES 0 +#define configUSE_ALTERNATIVE_API 0 +#define configQUEUE_REGISTRY_SIZE 10 + +/* Co-routine definitions. */ +#define configUSE_CO_ROUTINES 0 +#define configMAX_CO_ROUTINE_PRIORITIES ( 2 ) + +/* Set the following definitions to 1 to include the API function, or zero +to exclude the API function. */ + +#define INCLUDE_vTaskPrioritySet 1 +#define INCLUDE_uxTaskPriorityGet 1 +#define INCLUDE_vTaskDelete 1 +#define INCLUDE_vTaskCleanUpResources 0 +#define INCLUDE_vTaskSuspend 1 +#define INCLUDE_vTaskDelayUntil 1 +#define INCLUDE_vTaskDelay 1 +#define INCLUDE_xTaskGetSchedulerState 1 +#define INCLUDE_xTaskGetCurrentTaskHandle 1 +#define INCLUDE_uxTaskGetStackHighWaterMark 1 + +/* This is the raw value as per the Cortex-M3 NVIC. Values can be 255 +(lowest) to 1 (highest maskable) to 0 (highest non-maskable). */ +#define configKERNEL_INTERRUPT_PRIORITY 15 << 4 /* equivalent to NVIC priority 15 */ +#define configMAX_SYSCALL_INTERRUPT_PRIORITY 3 << 4 /* equivalent to NVIC priority 3 */ + +/* This is the value being used as per the ST library which permits 16 +priority values, 0 to 15. This must correspond to the +configKERNEL_INTERRUPT_PRIORITY setting. Here 15 corresponds to the lowest +NVIC value of 255. */ +#define configLIBRARY_KERNEL_INTERRUPT_PRIORITY 15 + +#if !defined(ARCH_POSIX) && !defined(ARCH_WIN32) +#define CHECK_IRQ_STACK +#endif + +/* Enable run time stats collection */ +#if defined(DIAGNOSTICS) +#define configCHECK_FOR_STACK_OVERFLOW 2 + +#define configGENERATE_RUN_TIME_STATS 1 +#define INCLUDE_uxTaskGetRunTime 1 +#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS()\ +do {\ +(*(unsigned long *)0xe000edfc) |= (1<<24);/* DEMCR |= DEMCR_TRCENA */\ +(*(unsigned long *)0xe0001000) |= 1; /* DWT_CTRL |= DWT_CYCCNT_ENA */\ +} while(0) +#define portGET_RUN_TIME_COUNTER_VALUE() (*(unsigned long *)0xe0001004)/* DWT_CYCCNT */ +#else +#define configCHECK_FOR_STACK_OVERFLOW 1 +#endif + + +/** + * @} + */ + +#endif /* FREERTOS_CONFIG_H */ diff --git a/flight/PipXtreme/System/inc/alarms.h b/flight/PipXtreme/System/inc/alarms.h new file mode 100755 index 000000000..9fb047dca --- /dev/null +++ b/flight/PipXtreme/System/inc/alarms.h @@ -0,0 +1,50 @@ +/** + ****************************************************************************** + * @addtogroup OpenPilotSystem OpenPilot System + * @{ + * @addtogroup OpenPilotLibraries OpenPilot System Libraries + * @{ + * @file alarms.h + * @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2010. + * @brief Include file of the alarm library + * @see The GNU Public License (GPL) Version 3 + * + *****************************************************************************/ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef ALARMS_H +#define ALARMS_H + +#include "systemalarms.h" +#define SYSTEMALARMS_ALARM_DEFAULT SYSTEMALARMS_ALARM_UNINITIALISED + +int32_t AlarmsInitialize(void); +int32_t AlarmsSet(SystemAlarmsAlarmElem alarm, SystemAlarmsAlarmOptions severity); +SystemAlarmsAlarmOptions AlarmsGet(SystemAlarmsAlarmElem alarm); +int32_t AlarmsDefault(SystemAlarmsAlarmElem alarm); +void AlarmsDefaultAll(); +int32_t AlarmsClear(SystemAlarmsAlarmElem alarm); +void AlarmsClearAll(); +int32_t AlarmsHasWarnings(); +int32_t AlarmsHasErrors(); +int32_t AlarmsHasCritical(); + +#endif // ALARMS_H + +/** + * @} + * @} + */ diff --git a/flight/PipXtreme/System/inc/op_config.h b/flight/PipXtreme/System/inc/op_config.h new file mode 100755 index 000000000..97910f392 --- /dev/null +++ b/flight/PipXtreme/System/inc/op_config.h @@ -0,0 +1,39 @@ +/** + ****************************************************************************** + * @addtogroup OpenPilotSystem OpenPilot System + * @{ + * @addtogroup OpenPilotCore OpenPilot Core + * @{ + * + * @file op_config.h + * @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2010. + * @brief OpenPilot configuration header. + * Compile time config for OpenPilot Application + * @see The GNU Public License (GPL) Version 3 + * + *****************************************************************************/ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + + +#ifndef OP_CONFIG_H +#define OP_CONFIG_H + +#endif /* OP_CONFIG_H */ +/** + * @} + * @} + */ diff --git a/flight/PipXtreme/System/inc/openpilot.h b/flight/PipXtreme/System/inc/openpilot.h new file mode 100755 index 000000000..59ae76fd4 --- /dev/null +++ b/flight/PipXtreme/System/inc/openpilot.h @@ -0,0 +1,53 @@ +/** + ****************************************************************************** + * @addtogroup OpenPilotSystem OpenPilot System + * @{ + * @addtogroup OpenPilotCore OpenPilot Core + * @{ + * @file openpilot.h + * @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2010. + * @brief Main OpenPilot header. + * @see The GNU Public License (GPL) Version 3 + * + *****************************************************************************/ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + + +#ifndef OPENPILOT_H +#define OPENPILOT_H + + +/* PIOS Includes */ +#include + +/* OpenPilot Libraries */ +#include "op_config.h" +#include "utlist.h" +#include "uavobjectmanager.h" +#include "eventdispatcher.h" +#include "alarms.h" +#include "taskmonitor.h" +#include "uavtalk.h" + +/* Global Functions */ +void OpenPilotInit(void); + +#endif /* OPENPILOT_H */ +/** + * @} + * @} + */ diff --git a/flight/PipXtreme/System/inc/pios_board_posix.h b/flight/PipXtreme/System/inc/pios_board_posix.h new file mode 100755 index 000000000..741f36ba7 --- /dev/null +++ b/flight/PipXtreme/System/inc/pios_board_posix.h @@ -0,0 +1,84 @@ +/** + ****************************************************************************** + * + * @file pios_board.h + * @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2010. + * @brief Defines board hardware for the OpenPilot Version 1.1 hardware. + * @see The GNU Public License (GPL) Version 3 + * + *****************************************************************************/ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + + +#ifndef PIOS_BOARD_H +#define PIOS_BOARD_H + + + + +//------------------------ +// PIOS_LED +//------------------------ +//#define PIOS_LED_LED1_GPIO_PORT GPIOC +//#define PIOS_LED_LED1_GPIO_PIN GPIO_Pin_12 +//#define PIOS_LED_LED1_GPIO_CLK RCC_APB2Periph_GPIOC +//#define PIOS_LED_LED2_GPIO_PORT GPIOC +//#define PIOS_LED_LED2_GPIO_PIN GPIO_Pin_13 +//#define PIOS_LED_LED2_GPIO_CLK RCC_APB2Periph_GPIOC +#define PIOS_LED_NUM 2 +//#define PIOS_LED_PORTS { PIOS_LED_LED1_GPIO_PORT, PIOS_LED_LED2_GPIO_PORT } +//#define PIOS_LED_PINS { PIOS_LED_LED1_GPIO_PIN, PIOS_LED_LED2_GPIO_PIN } +//#define PIOS_LED_CLKS { PIOS_LED_LED1_GPIO_CLK, PIOS_LED_LED2_GPIO_CLK } + + +//------------------------- +// COM +// +// See also pios_board_posix.c +//------------------------- +//#define PIOS_USART_TX_BUFFER_SIZE 256 +#define PIOS_COM_BUFFER_SIZE 1024 +#define PIOS_UDP_RX_BUFFER_SIZE PIOS_COM_BUFFER_SIZE + +#define PIOS_COM_TELEM_RF 0 +#define PIOS_COM_GPS 1 +#define PIOS_COM_TELEM_USB 2 + +#ifdef PIOS_ENABLE_AUX_UART +#define PIOS_COM_AUX 3 +#define PIOS_COM_DEBUG PIOS_COM_AUX +#endif + +/** + * glue macros for file IO + * STM32 uses DOSFS for file IO + */ +#define PIOS_FOPEN_READ(filename,file) (file=fopen((char*)filename,"r"))==NULL + +#define PIOS_FOPEN_WRITE(filename,file) (file=fopen((char*)filename,"w"))==NULL + +#define PIOS_FREAD(file,bufferadr,length,resultadr) (*resultadr=fread((uint8_t*)bufferadr,1,length,*file)) != length + +#define PIOS_FWRITE(file,bufferadr,length,resultadr) *resultadr=fwrite((uint8_t*)bufferadr,1,length,*file) + + + +#define PIOS_FCLOSE(file) fclose(file) + +#define PIOS_FUNLINK(file) unlink((char*)filename) + +#endif /* PIOS_BOARD_H */ diff --git a/flight/PipXtreme/System/inc/pios_config.h b/flight/PipXtreme/System/inc/pios_config.h new file mode 100755 index 000000000..5767ff9a3 --- /dev/null +++ b/flight/PipXtreme/System/inc/pios_config.h @@ -0,0 +1,121 @@ +/** + ****************************************************************************** + * @addtogroup OpenPilotSystem OpenPilot System + * @{ + * @addtogroup OpenPilotCore OpenPilot Core + * @{ + * + * @file pios_config.h + * @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2010. + * @brief PiOS configuration header. + * Central compile time config for the project. + * In particular, pios_config.h is where you define which PiOS libraries + * and features are included in the firmware. + * @see The GNU Public License (GPL) Version 3 + * + *****************************************************************************/ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef PIOS_CONFIG_H +#define PIOS_CONFIG_H + +/* Enable/Disable PiOS Modules */ +#define PIOS_INCLUDE_ADC +#define PIOS_INCLUDE_DELAY +#ifdef MOVE_CONTROLLER +#define PIOS_INCLUDE_I2C +#endif +#define PIOS_INCLUDE_IRQ +#define PIOS_INCLUDE_LED +#define PIOS_INCLUDE_IAP + +#define PIOS_INCLUDE_RCVR + +/* Supported receiver interfaces */ +//#define PIOS_INCLUDE_SPEKTRUM +//#define PIOS_INCLUDE_SBUS +#define PIOS_INCLUDE_PPM +#define PIOS_INCLUDE_PWM + +/* Supported USART-based PIOS modules */ +#define PIOS_INCLUDE_TELEMETRY_RF +//#define PIOS_INCLUDE_GPS + +//#define PIOS_INCLUDE_SERVO +//#define PIOS_INCLUDE_SPI +#define PIOS_INCLUDE_SYS +#define PIOS_INCLUDE_USART +#define PIOS_INCLUDE_COM +#define PIOS_INCLUDE_SETTINGS +#define PIOS_INCLUDE_FREERTOS +#define PIOS_INCLUDE_GPIO +#define PIOS_INCLUDE_EXTI +#define PIOS_INCLUDE_RTC +//#define PIOS_INCLUDE_WDG +#define PIOS_INCLUDE_BL_HELPER + +#define PIOS_INCLUDE_FLASH +#ifdef MOVE_CONTROLLER +#define PIOS_INCLUDE_MARG_MAHONY +#define PIOS_INCLUDE_AK8974 +#define PIOS_INCLUDE_KXSC4 +#endif + +#define PIOS_UAVTALK_DEBUG + +/* A really shitty setting saving implementation */ +//#define PIOS_INCLUDE_FLASH_SECTOR_SETTINGS + +/* Defaults for Logging */ +#define LOG_FILENAME "PIOS.LOG" +#define STARTUP_LOG_ENABLED 1 + +/* COM Module */ +#define GPS_BAUDRATE 19200 +#define TELEM_BAUDRATE 19200 +#define AUXUART_ENABLED 0 +#define AUXUART_BAUDRATE 19200 + +/* Alarm Thresholds */ +#define HEAP_LIMIT_WARNING 220 +#define HEAP_LIMIT_CRITICAL 40 +#define IRQSTACK_LIMIT_WARNING 100 +#define IRQSTACK_LIMIT_CRITICAL 60 +#define CPULOAD_LIMIT_WARNING 85 +#define CPULOAD_LIMIT_CRITICAL 95 + +/* Task stack sizes */ +#define PIOS_ACTUATOR_STACK_SIZE 1020 +#define PIOS_MANUAL_STACK_SIZE 724 +#define PIOS_SYSTEM_STACK_SIZE 460 +#define PIOS_STABILIZATION_STACK_SIZE 524 +#define PIOS_TELEM_STACK_SIZE 500 +#define PIOS_EVENTDISPATCHER_STACK_SIZE 130 +#define IDLE_COUNTS_PER_SEC_AT_NO_LOAD 1995998 +//#define PIOS_QUATERNION_STABILIZATION + +// This can't be too high to stop eventdispatcher thread overflowing +#define PIOS_EVENTDISAPTCHER_QUEUE 10 + +/* PIOS Initcall infrastructure */ +#define PIOS_INCLUDE_INITCALL + +#endif /* PIOS_CONFIG_H */ +/** + * @} + * @} + */ diff --git a/flight/PipXtreme/System/inc/pios_config_posix.h b/flight/PipXtreme/System/inc/pios_config_posix.h new file mode 100755 index 000000000..ddf7ee5d4 --- /dev/null +++ b/flight/PipXtreme/System/inc/pios_config_posix.h @@ -0,0 +1,54 @@ +/** + ****************************************************************************** + * + * @file pios_config.h + * @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2010. + * @brief PiOS configuration header. + * Central compile time config for the project. + * @see The GNU Public License (GPL) Version 3 + * + *****************************************************************************/ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + + +#ifndef PIOS_CONFIG_POSIX_H +#define PIOS_CONFIG_POSIX_H + + +/* Enable/Disable PiOS Modules */ +#define PIOS_INCLUDE_SYS +#define PIOS_INCLUDE_DELAY +#define PIOS_INCLUDE_LED +#define PIOS_INCLUDE_SDCARD +#define PIOS_INCLUDE_FREERTOS +#define PIOS_INCLUDE_COM +#define PIOS_INCLUDE_UDP +#define PIOS_INCLUDE_SERVO + + +/* Defaults for Logging */ +#define LOG_FILENAME "PIOS.LOG" +#define STARTUP_LOG_ENABLED 1 + +/* COM Module */ +#define GPS_BAUDRATE 19200 +#define TELEM_BAUDRATE 19200 +#define AUXUART_ENABLED 0 +#define AUXUART_BAUDRATE 19200 + + +#endif /* PIOS_CONFIG_POSIX_H */ diff --git a/flight/PipXtreme/System/pios_board.c b/flight/PipXtreme/System/pios_board.c new file mode 100755 index 000000000..e2c6a6136 --- /dev/null +++ b/flight/PipXtreme/System/pios_board.c @@ -0,0 +1,849 @@ +/* -*- Mode: c; c-basic-offset: 2; tab-width: 2; indent-tabs-mode: t -*- */ +/** + ****************************************************************************** + * @addtogroup OpenPilotSystem OpenPilot System + * @{ + * @addtogroup OpenPilotCore OpenPilot Core + * @{ + * + * @file pios_board.c + * @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2010. + * @brief Defines board specific static initializers for hardware for the OpenPilot board. + * @see The GNU Public License (GPL) Version 3 + * + *****************************************************************************/ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include +#include + +/* + * ADC system + */ +#include "pios_adc_priv.h" +extern void PIOS_ADC_handler(void); +void DMA1_Channel1_IRQHandler() __attribute__ ((alias("PIOS_ADC_handler"))); +// Remap the ADC DMA handler to this one +static const struct pios_adc_cfg pios_adc_cfg = { + .dma = { + .ahb_clk = RCC_AHBPeriph_DMA1, + .irq = { + .flags = (DMA1_FLAG_TC1 | DMA1_FLAG_TE1 | DMA1_FLAG_HT1 | DMA1_FLAG_GL1), + .init = { + .NVIC_IRQChannel = DMA1_Channel1_IRQn, + .NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGH, + .NVIC_IRQChannelSubPriority = 0, + .NVIC_IRQChannelCmd = ENABLE, + }, + }, + .rx = { + .channel = DMA1_Channel1, + .init = { + .DMA_PeripheralBaseAddr = (uint32_t) & ADC1->DR, + .DMA_DIR = DMA_DIR_PeripheralSRC, + .DMA_PeripheralInc = DMA_PeripheralInc_Disable, + .DMA_MemoryInc = DMA_MemoryInc_Enable, + .DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word, + .DMA_MemoryDataSize = DMA_MemoryDataSize_Word, + .DMA_Mode = DMA_Mode_Circular, + .DMA_Priority = DMA_Priority_High, + .DMA_M2M = DMA_M2M_Disable, + }, + } + }, + .half_flag = DMA1_IT_HT1, + .full_flag = DMA1_IT_TC1, +}; + +struct pios_adc_dev pios_adc_devs[] = { + { + .cfg = &pios_adc_cfg, + .callback_function = NULL, + }, +}; + +uint8_t pios_adc_num_devices = NELEMENTS(pios_adc_devs); + +void PIOS_ADC_handler() { + PIOS_ADC_DMA_Handler(); +} + +#if defined(PIOS_INCLUDE_USART) + +#include "pios_usart_priv.h" + +#if defined(PIOS_INCLUDE_TELEMETRY_RF) +/* + * Telemetry USART + */ +static const struct pios_usart_cfg pios_usart_telem_main_cfg = { + .regs = USART1, + .init = { + .USART_BaudRate = 57600, + .USART_WordLength = USART_WordLength_8b, + .USART_Parity = USART_Parity_No, + .USART_StopBits = USART_StopBits_1, + .USART_HardwareFlowControl = USART_HardwareFlowControl_None, + .USART_Mode = USART_Mode_Rx | USART_Mode_Tx, + }, + .irq = { + .init = { + .NVIC_IRQChannel = USART1_IRQn, + .NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_MID, + .NVIC_IRQChannelSubPriority = 0, + .NVIC_IRQChannelCmd = ENABLE, + }, + }, + .rx = { +#ifdef MOVE_CONTROLLER + .gpio = GPIOB, +#else + .gpio = GPIOA, +#endif + .init = { +#ifdef MOVE_CONTROLLER + .GPIO_Pin = GPIO_Pin_7, +#else + .GPIO_Pin = GPIO_Pin_10, +#endif + .GPIO_Speed = GPIO_Speed_2MHz, + .GPIO_Mode = GPIO_Mode_IPU, + }, + }, + .tx = { +#ifdef MOVE_CONTROLLER + .gpio = GPIOB, +#else + .gpio = GPIOA, +#endif + .init = { +#ifdef MOVE_CONTROLLER + .GPIO_Pin = GPIO_Pin_6, +#else + .GPIO_Pin = GPIO_Pin_9, +#endif + .GPIO_Speed = GPIO_Speed_2MHz, + .GPIO_Mode = GPIO_Mode_AF_PP, + }, + }, +#ifdef MOVE_CONTROLLER + .remap = AFIO_MAPR_USART1_REMAP, +#endif +}; + +static const struct pios_usart_cfg pios_usart_usart2_cfg = { + .regs = USART2, + .init = { + .USART_BaudRate = 57600, + .USART_WordLength = USART_WordLength_8b, + .USART_Parity = USART_Parity_No, + .USART_StopBits = USART_StopBits_1, + .USART_HardwareFlowControl = USART_HardwareFlowControl_None, + .USART_Mode = USART_Mode_Rx | USART_Mode_Tx, + }, + .irq = { + .init = { + .NVIC_IRQChannel = USART2_IRQn, + .NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_MID, + .NVIC_IRQChannelSubPriority = 0, + .NVIC_IRQChannelCmd = ENABLE, + }, + }, + .rx = { + .gpio = GPIOA, + .init = { + .GPIO_Pin = GPIO_Pin_3, + .GPIO_Speed = GPIO_Speed_2MHz, + .GPIO_Mode = GPIO_Mode_IPU, + }, + }, + .tx = { + .gpio = GPIOA, + .init = { + .GPIO_Pin = GPIO_Pin_2, + .GPIO_Speed = GPIO_Speed_2MHz, + .GPIO_Mode = GPIO_Mode_AF_PP, + }, + }, +}; + +static const struct pios_usart_cfg pios_usart_telem_flexi_cfg = { + .regs = USART3, + .init = { + .USART_BaudRate = 57600, + .USART_WordLength = USART_WordLength_8b, + .USART_Parity = USART_Parity_No, + .USART_StopBits = USART_StopBits_1, + .USART_HardwareFlowControl = USART_HardwareFlowControl_None, + .USART_Mode = USART_Mode_Rx | USART_Mode_Tx, + }, + .irq = { + .init = { + .NVIC_IRQChannel = USART3_IRQn, + .NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_MID, + .NVIC_IRQChannelSubPriority = 0, + .NVIC_IRQChannelCmd = ENABLE, + }, + }, + .rx = { + .gpio = GPIOB, + .init = { + .GPIO_Pin = GPIO_Pin_11, + .GPIO_Speed = GPIO_Speed_2MHz, + .GPIO_Mode = GPIO_Mode_IPU, + }, + }, + .tx = { + .gpio = GPIOB, + .init = { + .GPIO_Pin = GPIO_Pin_10, + .GPIO_Speed = GPIO_Speed_2MHz, + .GPIO_Mode = GPIO_Mode_AF_PP, + }, + }, +}; +#endif /* PIOS_INCLUDE_TELEMETRY_RF */ + +#endif /* PIOS_INCLUDE_USART */ + +#if defined(PIOS_INCLUDE_COM) + +#include "pios_com_priv.h" + +#define PIOS_COM_TELEM_RF_RX_BUF_LEN 192 +#define PIOS_COM_TELEM_RF_TX_BUF_LEN 192 + +#define PIOS_COM_GPS_RX_BUF_LEN 96 + +#define PIOS_COM_TELEM_USB_RX_BUF_LEN 192 +#define PIOS_COM_TELEM_USB_TX_BUF_LEN 192 + +#endif /* PIOS_INCLUDE_COM */ + +#if defined(PIOS_INCLUDE_RTC) +/* + * Realtime Clock (RTC) + */ +#include + +void PIOS_RTC_IRQ_Handler (void); +void RTC_IRQHandler() __attribute__ ((alias ("PIOS_RTC_IRQ_Handler"))); +static const struct pios_rtc_cfg pios_rtc_main_cfg = { + .clksrc = RCC_RTCCLKSource_HSE_Div128, + .prescaler = 100, + .irq = { + .init = { + .NVIC_IRQChannel = RTC_IRQn, + .NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_MID, + .NVIC_IRQChannelSubPriority = 0, + .NVIC_IRQChannelCmd = ENABLE, + }, + }, +}; + +void PIOS_RTC_IRQ_Handler (void) +{ + PIOS_RTC_irq_handler (); +} + +#endif + +#include "pios_tim_priv.h" + +static const TIM_TimeBaseInitTypeDef tim_1_2_3_4_time_base = { + .TIM_Prescaler = (PIOS_MASTER_CLOCK / 1000000) - 1, + .TIM_ClockDivision = TIM_CKD_DIV1, + .TIM_CounterMode = TIM_CounterMode_Up, + .TIM_Period = ((1000000 / PIOS_SERVO_UPDATE_HZ) - 1), + .TIM_RepetitionCounter = 0x0000, +}; + +static const struct pios_tim_clock_cfg tim_1_cfg = { + .timer = TIM1, + .time_base_init = &tim_1_2_3_4_time_base, + .irq = { + .init = { + .NVIC_IRQChannel = TIM1_CC_IRQn, + .NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_MID, + .NVIC_IRQChannelSubPriority = 0, + .NVIC_IRQChannelCmd = ENABLE, + }, + }, +}; + +static const struct pios_tim_clock_cfg tim_2_cfg = { + .timer = TIM2, + .time_base_init = &tim_1_2_3_4_time_base, + .irq = { + .init = { + .NVIC_IRQChannel = TIM2_IRQn, + .NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_MID, + .NVIC_IRQChannelSubPriority = 0, + .NVIC_IRQChannelCmd = ENABLE, + }, + }, +}; + +static const struct pios_tim_clock_cfg tim_3_cfg = { + .timer = TIM3, + .time_base_init = &tim_1_2_3_4_time_base, + .irq = { + .init = { + .NVIC_IRQChannel = TIM3_IRQn, + .NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_MID, + .NVIC_IRQChannelSubPriority = 0, + .NVIC_IRQChannelCmd = ENABLE, + }, + }, +}; + +static const struct pios_tim_clock_cfg tim_4_cfg = { + .timer = TIM4, + .time_base_init = &tim_1_2_3_4_time_base, + .irq = { + .init = { + .NVIC_IRQChannel = TIM4_IRQn, + .NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_MID, + .NVIC_IRQChannelSubPriority = 0, + .NVIC_IRQChannelCmd = ENABLE, + }, + }, +}; + +static const struct pios_tim_channel pios_tim_rcvrport_all_channels[] = { +#ifdef MOVE_CONTROLLER + { + .timer = TIM4, + .timer_chan = TIM_Channel_1, + .pin = { + .gpio = GPIOE, + .init = { + .GPIO_Pin = GPIO_Pin_12, + .GPIO_Mode = GPIO_Mode_IPD, + .GPIO_Speed = GPIO_Speed_2MHz, + }, + }, + }, +#else + { + .timer = TIM4, + .timer_chan = TIM_Channel_1, + .pin = { + .gpio = GPIOB, + .init = { + .GPIO_Pin = GPIO_Pin_6, + .GPIO_Mode = GPIO_Mode_IPD, + .GPIO_Speed = GPIO_Speed_2MHz, + }, + }, + }, +#endif + { + .timer = TIM3, + .timer_chan = TIM_Channel_2, + .pin = { + .gpio = GPIOB, + .init = { + .GPIO_Pin = GPIO_Pin_5, + .GPIO_Mode = GPIO_Mode_IPD, + .GPIO_Speed = GPIO_Speed_2MHz, + }, + }, + .remap = GPIO_PartialRemap_TIM3, + }, + { + .timer = TIM3, + .timer_chan = TIM_Channel_3, + .pin = { + .gpio = GPIOB, + .init = { + .GPIO_Pin = GPIO_Pin_0, + .GPIO_Mode = GPIO_Mode_IPD, + .GPIO_Speed = GPIO_Speed_2MHz, + }, + }, + }, + { + .timer = TIM3, + .timer_chan = TIM_Channel_4, + .pin = { + .gpio = GPIOB, + .init = { + .GPIO_Pin = GPIO_Pin_1, + .GPIO_Mode = GPIO_Mode_IPD, + .GPIO_Speed = GPIO_Speed_2MHz, + }, + }, + }, + { + .timer = TIM2, + .timer_chan = TIM_Channel_1, + .pin = { + .gpio = GPIOA, + .init = { + .GPIO_Pin = GPIO_Pin_0, + .GPIO_Mode = GPIO_Mode_IPD, + .GPIO_Speed = GPIO_Speed_2MHz, + }, + }, + }, + { + .timer = TIM2, + .timer_chan = TIM_Channel_2, + .pin = { + .gpio = GPIOA, + .init = { + .GPIO_Pin = GPIO_Pin_1, + .GPIO_Mode = GPIO_Mode_IPD, + .GPIO_Speed = GPIO_Speed_2MHz, + }, + }, + }, +}; + +/* PPM */ +#include + +const struct pios_ppm_cfg pios_ppm_cfg = { + .tim_ic_init = { + .TIM_ICPolarity = TIM_ICPolarity_Rising, + .TIM_ICSelection = TIM_ICSelection_DirectTI, + .TIM_ICPrescaler = TIM_ICPSC_DIV1, + .TIM_ICFilter = 0x0, + }, + /* Use only the first channel for ppm */ + .channels = &pios_tim_rcvrport_all_channels[0], + .num_channels = 1, +}; + +#include "pios_rcvr_priv.h" + +/* One slot per selectable receiver group. + * eg. PWM, PPM, GCS, DSMMAINPORT, DSMFLEXIPORT, SBUS + * NOTE: No slot in this map for NONE. + */ +uint32_t pios_rcvr_group_map[MANUALCONTROLSETTINGS_CHANNELGROUPS_NONE]; + +#include + +static const struct pios_tim_channel pios_tim_rssi_pwm_channel = { +#if defined(ANALOG_TRANSMITTER) + .timer = TIM3, + .timer_chan = TIM_Channel_2, + .pin = { + .gpio = GPIOB, + .init = { + .GPIO_Pin = GPIO_Pin_5, + .GPIO_Mode = GPIO_Mode_IPD, + .GPIO_Speed = GPIO_Speed_2MHz, + }, + }, + .remap = GPIO_PartialRemap_TIM3, +#else + .timer = TIM2, + .timer_chan = TIM_Channel_2, + .pin = { + .gpio = GPIOA, + .init = { + .GPIO_Pin = GPIO_Pin_1, + .GPIO_Mode = GPIO_Mode_IPD, + .GPIO_Speed = GPIO_Speed_2MHz, + }, + }, +#endif +}; + +const struct pios_pwm_cfg pios_pwm_cfg = { + .tim_ic_init = { + .TIM_ICPolarity = TIM_ICPolarity_Rising, + .TIM_ICSelection = TIM_ICSelection_DirectTI, + .TIM_ICPrescaler = TIM_ICPSC_DIV1, + .TIM_ICFilter = 0x0, + }, + .channels = &pios_tim_rssi_pwm_channel, + .num_channels = 1, +}; + +#if defined(PIOS_INCLUDE_I2C) + + +#include + +/* + * I2C Adapters + */ + +void PIOS_I2C_flexi_adapter_ev_irq_handler(void); +void PIOS_I2C_flexi_adapter_er_irq_handler(void); +void I2C2_EV_IRQHandler() __attribute__ ((alias ("PIOS_I2C_flexi_adapter_ev_irq_handler"))); +void I2C2_ER_IRQHandler() __attribute__ ((alias ("PIOS_I2C_flexi_adapter_er_irq_handler"))); + +static const struct pios_i2c_adapter_cfg pios_i2c_flexi_adapter_cfg = { + .regs = I2C2, + .init = { + .I2C_Mode = I2C_Mode_I2C, + .I2C_OwnAddress1 = 0, + .I2C_Ack = I2C_Ack_Enable, + .I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit, + .I2C_DutyCycle = I2C_DutyCycle_2, + .I2C_ClockSpeed = 400000, /* bits/s */ + }, + .transfer_timeout_ms = 50, + .scl = { + .gpio = GPIOB, + .init = { + .GPIO_Pin = GPIO_Pin_10, + .GPIO_Speed = GPIO_Speed_10MHz, + .GPIO_Mode = GPIO_Mode_AF_OD, + }, + }, + .sda = { + .gpio = GPIOB, + .init = { + .GPIO_Pin = GPIO_Pin_11, + .GPIO_Speed = GPIO_Speed_10MHz, + .GPIO_Mode = GPIO_Mode_AF_OD, + }, + }, + .event = { + .flags = 0, /* FIXME: check this */ + .init = { + .NVIC_IRQChannel = I2C2_EV_IRQn, + .NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGHEST, + .NVIC_IRQChannelSubPriority = 0, + .NVIC_IRQChannelCmd = ENABLE, + }, + }, + .error = { + .flags = 0, /* FIXME: check this */ + .init = { + .NVIC_IRQChannel = I2C2_ER_IRQn, + .NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGHEST, + .NVIC_IRQChannelSubPriority = 0, + .NVIC_IRQChannelCmd = ENABLE, + }, + }, +}; + +uint32_t pios_i2c_flexi_adapter_id; +void PIOS_I2C_flexi_adapter_ev_irq_handler(void) +{ + /* Call into the generic code to handle the IRQ for this specific device */ + PIOS_I2C_EV_IRQ_Handler(pios_i2c_flexi_adapter_id); +} + +void PIOS_I2C_flexi_adapter_er_irq_handler(void) +{ + /* Call into the generic code to handle the IRQ for this specific device */ + PIOS_I2C_ER_IRQ_Handler(pios_i2c_flexi_adapter_id); +} + +#endif /* PIOS_INCLUDE_I2C */ + +uint32_t rssi_pwm_id; + +uint32_t pios_com_usart1_id; +#ifndef MOVE_CONTROLLER +uint32_t pios_com_usart2_id; +uint32_t pios_com_usart3_id; +#endif + +/** + * PIOS_Board_Init() + * initializes all the core subsystems on this specific hardware + * called from System/openpilot.c + */ +void PIOS_Board_Init(void) { + + /* Delay system */ + PIOS_DELAY_Init(); + + /* Initialize UAVObject libraries */ + EventDispatcherInitialize(); + UAVObjInitialize(); + + HwSettingsInitialize(); + +#ifndef ERASE_FLASH + /* Initialize watchdog as early as possible to catch faults during init */ + PIOS_WDG_Init(); +#endif + + /* Initialize the alarms library */ + AlarmsInitialize(); + + /* Initialize IAP */ + PIOS_IAP_Init(); + +#if defined(PIOS_INCLUDE_RTC) + /* Initialize the real-time clock and its associated tick */ + PIOS_RTC_Init(&pios_rtc_main_cfg); +#endif + + /* Initialize the task monitor library */ + TaskMonitorInitialize(); + + /* Set up pulse timers */ + PIOS_TIM_InitClock(&tim_1_cfg); + PIOS_TIM_InitClock(&tim_2_cfg); + PIOS_TIM_InitClock(&tim_3_cfg); + PIOS_TIM_InitClock(&tim_4_cfg); + +#ifdef TRANSMITTER_BOX + /* Configure the rcvr port */ + { + uint32_t pios_ppm_id; + PIOS_PPM_Init(&pios_ppm_id, &pios_ppm_cfg); + + uint32_t pios_ppm_rcvr_id; + if (PIOS_RCVR_Init(&pios_ppm_rcvr_id, &pios_ppm_rcvr_driver, pios_ppm_id)) { + PIOS_Assert(0); + } + pios_rcvr_group_map[MANUALCONTROLSETTINGS_CHANNELGROUPS_PPM] = pios_ppm_rcvr_id; + } +#endif + + /* Configure USART1 */ + { + uint32_t pios_usart1_id; + if (PIOS_USART_Init(&pios_usart1_id, &pios_usart_telem_main_cfg)) { + PIOS_Assert(0); + } + + uint8_t * rx_buffer = (uint8_t *) pvPortMalloc(PIOS_COM_TELEM_RF_RX_BUF_LEN); + uint8_t * tx_buffer = (uint8_t *) pvPortMalloc(PIOS_COM_TELEM_RF_TX_BUF_LEN); + PIOS_Assert(rx_buffer); + PIOS_Assert(tx_buffer); + if (PIOS_COM_Init(&pios_com_usart1_id, &pios_usart_com_driver, pios_usart1_id, + rx_buffer, PIOS_COM_TELEM_RF_RX_BUF_LEN, + tx_buffer, PIOS_COM_TELEM_RF_TX_BUF_LEN)) { + PIOS_Assert(0); + } + } + +#ifndef MOVE_CONTROLLER + /* Configure USART2 */ + { + uint32_t pios_usart2_id; + if (PIOS_USART_Init(&pios_usart2_id, &pios_usart_usart2_cfg)) { + PIOS_Assert(0); + } + + uint8_t * rx_buffer = (uint8_t *) pvPortMalloc(PIOS_COM_TELEM_RF_RX_BUF_LEN); + uint8_t * tx_buffer = (uint8_t *) pvPortMalloc(PIOS_COM_TELEM_RF_TX_BUF_LEN); + PIOS_Assert(rx_buffer); + PIOS_Assert(tx_buffer); + if (PIOS_COM_Init(&pios_com_usart2_id, &pios_usart_com_driver, pios_usart2_id, + rx_buffer, PIOS_COM_TELEM_RF_RX_BUF_LEN, + tx_buffer, PIOS_COM_TELEM_RF_TX_BUF_LEN)) { + PIOS_Assert(0); + } + } + + /* Configure USART3 */ + { + uint32_t pios_usart3_id; + if (PIOS_USART_Init(&pios_usart3_id, &pios_usart_telem_flexi_cfg)) { + PIOS_Assert(0); + } + uint8_t * rx_buffer = (uint8_t *) pvPortMalloc(PIOS_COM_TELEM_RF_RX_BUF_LEN); + uint8_t * tx_buffer = (uint8_t *) pvPortMalloc(PIOS_COM_TELEM_RF_TX_BUF_LEN); + PIOS_Assert(rx_buffer); + PIOS_Assert(tx_buffer); + if (PIOS_COM_Init(&pios_com_usart3_id, &pios_usart_com_driver, pios_usart3_id, + rx_buffer, PIOS_COM_TELEM_RF_RX_BUF_LEN, + tx_buffer, PIOS_COM_TELEM_RF_TX_BUF_LEN)) { + PIOS_Assert(0); + } + } +#endif + PIOS_COM_SendString(PIOS_COM_DEBUG, "Hello Debug\n\r"); + //PIOS_COM_SendString(PIOS_COM_TELEM_GCS, "Hello GCS\n\r"); + //PIOS_COM_SendString(PIOS_COM_TELEM_OUT, "Hello CC\n\r"); + +#if defined(PIOS_INCLUDE_I2C) + if (PIOS_I2C_Init(&pios_i2c_flexi_adapter_id, &pios_i2c_flexi_adapter_cfg)) { + PIOS_Assert(0); + } +#endif /* PIOS_INCLUDE_AK8974 */ + +#if defined(ANALOG_TRANSMITTER) + // Initialize switch GPIO pins + { + GPIO_TypeDef *GPIO_GPIOxs[] = { + GPIOA, GPIOB, GPIOB, GPIOB, GPIOB, GPIOB + }; + GPIO_InitTypeDef GPIO_InitStructures[] = { + { + .GPIO_Speed = GPIO_Speed_2MHz, + .GPIO_Pin = GPIO_Pin_8, + .GPIO_Mode = GPIO_Mode_IN_FLOATING, + }, + { + .GPIO_Speed = GPIO_Speed_2MHz, + .GPIO_Pin = GPIO_Pin_7, + .GPIO_Mode = GPIO_Mode_IN_FLOATING, + }, + { + .GPIO_Speed = GPIO_Speed_2MHz, + .GPIO_Pin = GPIO_Pin_14, + .GPIO_Mode = GPIO_Mode_IN_FLOATING, + }, + { + .GPIO_Speed = GPIO_Speed_2MHz, + .GPIO_Pin = GPIO_Pin_13, + .GPIO_Mode = GPIO_Mode_IN_FLOATING, + }, + { + .GPIO_Speed = GPIO_Speed_2MHz, + .GPIO_Pin = GPIO_Pin_15, + .GPIO_Mode = GPIO_Mode_IN_FLOATING, + }, + { + .GPIO_Speed = GPIO_Speed_2MHz, + .GPIO_Pin = GPIO_Pin_9, + .GPIO_Mode = GPIO_Mode_Out_OD, + }, + }; + unsigned int i; + for (i = 0; i < sizeof(GPIO_GPIOxs) / sizeof(GPIO_TypeDef); ++i) + GPIO_Init(GPIO_GPIOxs[i], GPIO_InitStructures + i); + } + + // Initialize the XBee RSSI PWM input. + PIOS_PWM_Init(&rssi_pwm_id, &pios_pwm_cfg); + +#elif defined(MAPLE_MINI) + + // Initialize switch GPIO pins + { + GPIO_TypeDef *GPIO_GPIOxs[] = { + GPIOB, GPIOB, GPIOB + }; + GPIO_InitTypeDef GPIO_InitStructures[] = { + { + .GPIO_Speed = GPIO_Speed_2MHz, + .GPIO_Pin = GPIO_Pin_0, + .GPIO_Mode = GPIO_Mode_IPU, + }, + { + .GPIO_Speed = GPIO_Speed_2MHz, + .GPIO_Pin = GPIO_Pin_2, + .GPIO_Mode = GPIO_Mode_IPU, + }, + { + .GPIO_Speed = GPIO_Speed_2MHz, + .GPIO_Pin = GPIO_Pin_9, + .GPIO_Mode = GPIO_Mode_Out_OD, + }, + }; + unsigned int i; + for (i = 0; i < sizeof(GPIO_GPIOxs) / sizeof(GPIO_TypeDef); ++i) + GPIO_Init(GPIO_GPIOxs[i], GPIO_InitStructures + i); + } + + // Initialize the XBee RSSI PWM input. + PIOS_PWM_Init(&rssi_pwm_id, &pios_pwm_cfg); + + // Turn on the USB port on the Maple Mini */ + GPIO_ResetBits(GPIOB, GPIO_Pin_9); + +#elif defined(MOVE_CONTROLLER) + + // Initialize switch GPIO pins + // PA0 - PS Button + // PB8 - Select Button + // PB9 - Start Button + // PD5 - Square Button + // PC13 - Circle Button + // PC14 - X Button + // PC15 - Triangle Button + // PE0 - Move Button + { + GPIO_TypeDef *GPIO_GPIOxs[] = { + GPIOA, GPIOB, GPIOB, GPIOD, GPIOC, GPIOC, GPIOC, GPIOE, GPIOD, GPIOD + }; + GPIO_InitTypeDef GPIO_InitStructures[] = { + { + .GPIO_Speed = GPIO_Speed_2MHz, + .GPIO_Pin = GPIO_Pin_0, + .GPIO_Mode = GPIO_Mode_IPD, + }, + { + .GPIO_Speed = GPIO_Speed_2MHz, + .GPIO_Pin = GPIO_Pin_8, + .GPIO_Mode = GPIO_Mode_IPD, + }, + { + .GPIO_Speed = GPIO_Speed_2MHz, + .GPIO_Pin = GPIO_Pin_9, + .GPIO_Mode = GPIO_Mode_IPD, + }, + { + .GPIO_Speed = GPIO_Speed_2MHz, + .GPIO_Pin = GPIO_Pin_5, + .GPIO_Mode = GPIO_Mode_IPD, + }, + { + .GPIO_Speed = GPIO_Speed_2MHz, + .GPIO_Pin = GPIO_Pin_13, + .GPIO_Mode = GPIO_Mode_IPD, + }, + { + .GPIO_Speed = GPIO_Speed_2MHz, + .GPIO_Pin = GPIO_Pin_14, + .GPIO_Mode = GPIO_Mode_IPD, + }, + { + .GPIO_Speed = GPIO_Speed_2MHz, + .GPIO_Pin = GPIO_Pin_15, + .GPIO_Mode = GPIO_Mode_IPD, + }, + { + .GPIO_Speed = GPIO_Speed_2MHz, + .GPIO_Pin = GPIO_Pin_0, + .GPIO_Mode = GPIO_Mode_IPD, + }, + { + .GPIO_Speed = GPIO_Speed_50MHz, + .GPIO_Pin = GPIO_Pin_0, + .GPIO_Mode = GPIO_Mode_Out_PP, + }, + }; + unsigned int i; + for (i = 0; i < sizeof(GPIO_GPIOxs) / sizeof(GPIO_TypeDef); ++i) + GPIO_Init(GPIO_GPIOxs[i], GPIO_InitStructures + i); + + // Set the referece voltage for T button potentiometer + GPIO_ResetBits(GPIOD, GPIO_Pin_0); + } +#endif + + /* Remap AFIO pin */ + GPIO_PinRemapConfig( GPIO_Remap_SWJ_NoJTRST, ENABLE); + + PIOS_ADC_Init(); + PIOS_GPIO_Init(); +} + +/** + * @} + */ diff --git a/flight/PipXtreme/System/pios_board_posix.c b/flight/PipXtreme/System/pios_board_posix.c new file mode 100755 index 000000000..30f949830 --- /dev/null +++ b/flight/PipXtreme/System/pios_board_posix.c @@ -0,0 +1,142 @@ +/** + ****************************************************************************** + * + * @file pios_board.c + * @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2010. + * @brief Defines board specific static initializers for hardware for the OpenPilot board. + * @see The GNU Public License (GPL) Version 3 + * + *****************************************************************************/ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include + +/** + * PIOS_Board_Init() + * initializes all the core systems on this specific hardware + * called from System/openpilot.c + */ +void PIOS_Board_Init(void) { + + /* Delay system */ + PIOS_DELAY_Init(); + + /* Initialize UAVObject libraries */ + EventDispatcherInitialize(); + UAVObjInitialize(); + + /* Initialize the alarms library */ + AlarmsInitialize(); + + /* Initialize the task monitor library */ + TaskMonitorInitialize(); + + /* Initialize the PiOS library */ + PIOS_COM_Init(); + +} + + +const struct pios_udp_cfg pios_udp0_cfg = { + .ip = "0.0.0.0", + .port = 9000, +}; +const struct pios_udp_cfg pios_udp1_cfg = { + .ip = "0.0.0.0", + .port = 9001, +}; +const struct pios_udp_cfg pios_udp2_cfg = { + .ip = "0.0.0.0", + .port = 9002, +}; + +#ifdef PIOS_COM_AUX +/* + * AUX USART + */ +const struct pios_udp_cfg pios_udp3_cfg = { + .ip = "0.0.0.0", + .port = 9003, +}; +#endif + +/* + * Board specific number of devices. + */ +struct pios_udp_dev pios_udp_devs[] = { +#define PIOS_UDP_TELEM 0 + { + .cfg = &pios_udp0_cfg, + }, +#define PIOS_UDP_GPS 1 + { + .cfg = &pios_udp1_cfg, + }, +#define PIOS_UDP_LOCAL 2 + { + .cfg = &pios_udp2_cfg, + }, +#ifdef PIOS_COM_AUX +#define PIOS_UDP_AUX 3 + { + .cfg = &pios_udp3_cfg, + }, +#endif +}; + +uint8_t pios_udp_num_devices = NELEMENTS(pios_udp_devs); + +/* + * COM devices + */ + +/* + * Board specific number of devices. + */ +extern const struct pios_com_driver pios_serial_com_driver; +extern const struct pios_com_driver pios_udp_com_driver; + +struct pios_com_dev pios_com_devs[] = { + { + .id = PIOS_UDP_TELEM, + .driver = &pios_udp_com_driver, + }, + { + .id = PIOS_UDP_GPS, + .driver = &pios_udp_com_driver, + }, + { + .id = PIOS_UDP_LOCAL, + .driver = &pios_udp_com_driver, + }, +#ifdef PIOS_COM_AUX + { + .id = PIOS_UDP_AUX, + .driver = &pios_udp_com_driver, + }, +#endif +}; + +const uint8_t pios_com_num_devices = NELEMENTS(pios_com_devs); + +/** + * @} + */ diff --git a/make/boards/pipxtreme/board-info.mk b/make/boards/pipxtreme/board-info.mk index dbcb314df..52e1a471a 100644 --- a/make/boards/pipxtreme/board-info.mk +++ b/make/boards/pipxtreme/board-info.mk @@ -7,7 +7,9 @@ MCU := cortex-m3 CHIP := STM32F103CBT BOARD := STM32103CB_PIPXTREME MODEL := MD -MODEL_SUFFIX := +MODEL_SUFFIX := _PX + +OPENOCD_CONFIG := stm32f1x.cfg # Note: These must match the values in link_$(BOARD)_memory.ld BL_BANK_BASE := 0x08000000 # Start of bootloader flash diff --git a/make/firmware-defs.mk b/make/firmware-defs.mk index 2eb0a13d8..cfc837cbe 100644 --- a/make/firmware-defs.mk +++ b/make/firmware-defs.mk @@ -216,7 +216,7 @@ OOCD_EXE ?= openocd OOCD_JTAG_SETUP = -d0 # interface and board/target settings (using the OOCD target-library here) OOCD_JTAG_SETUP += -s $(TOP)/flight/Project/OpenOCD -OOCD_JTAG_SETUP += -f foss-jtag.revb.cfg -f $(4) +OOCD_JTAG_SETUP += -f flyswatter.cfg -f $(4) # initialize OOCD_BOARD_RESET = -c init