From f864d723dd6117af76295f9b9cfb71ac6eebc499 Mon Sep 17 00:00:00 2001 From: Mathieu Rondonneau Date: Sun, 3 Jul 2011 18:45:02 -0700 Subject: [PATCH] OP-423: Cleanup and remove recently added *_BL.S startup file. --- flight/Bootloaders/BootloaderUpdater/Makefile | 4 ---- .../link_STM32103CB_CC_Rev1_BL_sections.ld | 21 ++++++++++++++++++- .../link_STM32103CB_CC_Rev1_sections.ld | 6 ++---- .../STM32F10x/link_STM3210E_INS_sections.ld | 1 + .../STM32F10x/link_STM3210E_OP_BL_sections.ld | 3 +-- .../PiOS/STM32F10x/startup_stm32f10x_HD_OP.S | 21 ++++++++++++------- .../PiOS/STM32F10x/startup_stm32f10x_MD_CC.S | 20 +++++++++++------- 7 files changed, 50 insertions(+), 26 deletions(-) diff --git a/flight/Bootloaders/BootloaderUpdater/Makefile b/flight/Bootloaders/BootloaderUpdater/Makefile index f16fdef52..81aa163ec 100644 --- a/flight/Bootloaders/BootloaderUpdater/Makefile +++ b/flight/Bootloaders/BootloaderUpdater/Makefile @@ -138,11 +138,7 @@ CPPSRCARM = # Even though the DOS/Win* filesystem matches both .s and .S the same, # it will preserve the spelling of the filenames, and gcc itself does # care about how the name is spelled on its command-line. -ifeq ($(MODEL_SUFFIX),) ASRC = $(PIOSSTM32F10X)/startup_stm32f10x_$(MODEL)$(MODEL_SUFFIX).S -else -ASRC = $(PIOSSTM32F10X)/startup_stm32f10x_$(MODEL)$(MODEL_SUFFIX)_BL.S -endif # List Assembler source files here which must be assembled in ARM-Mode.. ASRCARM = diff --git a/flight/PiOS/STM32F10x/link_STM32103CB_CC_Rev1_BL_sections.ld b/flight/PiOS/STM32F10x/link_STM32103CB_CC_Rev1_BL_sections.ld index c16bd7af9..f818fff42 100644 --- a/flight/PiOS/STM32F10x/link_STM32103CB_CC_Rev1_BL_sections.ld +++ b/flight/PiOS/STM32F10x/link_STM32103CB_CC_Rev1_BL_sections.ld @@ -3,7 +3,8 @@ PROVIDE ( vPortSVCHandler = 0 ) ; PROVIDE ( xPortPendSVHandler = 0 ) ; PROVIDE ( xPortSysTickHandler = 0 ) ; -_estack = 0x20004FF0; +/* This is the size of the stack for early init and for all FreeRTOS IRQs */ +_irq_stack_size = 0x400; /* Section Definitions */ SECTIONS @@ -59,6 +60,24 @@ SECTIONS _ebss = . ; } > SRAM + /* + * This stack is used both as the initial sp during early init as well as ultimately + * being used as the STM32's MSP (Main Stack Pointer) which is the same stack that + * is used for _all_ interrupt handlers. The end of this stack should be placed + * against the lowest address in RAM so that a stack overrun results in a hard fault + * at the first access beyond the end of the stack. + */ + .irq_stack : + { + . = ALIGN(4); + _irq_stack_end = . ; + . = . + _irq_stack_size ; + . = ALIGN(4); + _irq_stack_top = . - 4 ; + _init_stack_top = _irq_stack_top; + . = ALIGN(4); + } > SRAM + . = ALIGN(4); _end = . ; diff --git a/flight/PiOS/STM32F10x/link_STM32103CB_CC_Rev1_sections.ld b/flight/PiOS/STM32F10x/link_STM32103CB_CC_Rev1_sections.ld index 8d54fd4fd..6f4fefaa0 100644 --- a/flight/PiOS/STM32F10x/link_STM32103CB_CC_Rev1_sections.ld +++ b/flight/PiOS/STM32F10x/link_STM32103CB_CC_Rev1_sections.ld @@ -2,6 +2,8 @@ _irq_stack_size = 0x180; /* This is the size of the stack for early init: life span is until scheduler starts */ _init_stack_size = 0x80; +/* there is probably a way to get that from the MEMORY section */ +_eram = ORIGIN(SRAM) + LENGTH(SRAM); /* Stub out these functions since we don't use them anyway */ PROVIDE ( vPortSVCHandler = 0 ) ; @@ -10,10 +12,6 @@ PROVIDE ( xPortSysTickHandler = 0 ) ; PROVIDE(pios_board_info_blob = ORIGIN(BD_INFO)); -_estack = 0x20004FF0; -/* there is probably a way to get that from the MEMORY section */ -_eram = ORIGIN(SRAM) + LENGTH(SRAM); - /* Section Definitions */ SECTIONS { diff --git a/flight/PiOS/STM32F10x/link_STM3210E_INS_sections.ld b/flight/PiOS/STM32F10x/link_STM3210E_INS_sections.ld index 31e35b305..ef25c9344 100644 --- a/flight/PiOS/STM32F10x/link_STM3210E_INS_sections.ld +++ b/flight/PiOS/STM32F10x/link_STM3210E_INS_sections.ld @@ -250,6 +250,7 @@ SECTIONS . = . + _irq_stack_size ; . = ALIGN(4); _irq_stack_top = . - 4 ; + _init_stack_top = _irq_stack_top; . = ALIGN(4); } >RAM diff --git a/flight/PiOS/STM32F10x/link_STM3210E_OP_BL_sections.ld b/flight/PiOS/STM32F10x/link_STM3210E_OP_BL_sections.ld index fa01b6c41..7716ccbf2 100644 --- a/flight/PiOS/STM32F10x/link_STM3210E_OP_BL_sections.ld +++ b/flight/PiOS/STM32F10x/link_STM3210E_OP_BL_sections.ld @@ -223,6 +223,7 @@ SECTIONS . = . + _irq_stack_size ; . = ALIGN(4); _irq_stack_top = . - 4 ; + _init_stack_top = _irq_stack_top; . = ALIGN(4); } >RAM @@ -364,5 +365,3 @@ SECTIONS .debug_typenames 0 : { *(.debug_typenames) } .debug_varnames 0 : { *(.debug_varnames) } } - - diff --git a/flight/PiOS/STM32F10x/startup_stm32f10x_HD_OP.S b/flight/PiOS/STM32F10x/startup_stm32f10x_HD_OP.S index f6b6ba7a8..159a9dd66 100644 --- a/flight/PiOS/STM32F10x/startup_stm32f10x_HD_OP.S +++ b/flight/PiOS/STM32F10x/startup_stm32f10x_HD_OP.S @@ -36,8 +36,8 @@ .global g_pfnVectors .global SystemInit_ExtMemCtl_Dummy .global Default_Handler -.global vTaskStartScheduler .global xPortIncreaseHeapSize +.global Stack_Change /* start address for the initialization values of the .data section. defined in linker script */ @@ -73,14 +73,19 @@ Reset_Handler: /* restore original stack pointer */ LDR r0, =_irq_stack_top MSR msp, r0 - LDR r0, =_init_stack_top - MSR psp, r0 + LDR r2, =_init_stack_top + MSR psp, r2 + /* check if irq and init stack are the same */ + /* if they are, we don't do stack swap */ + /* and lets bypass the monitoring as well for now */ + cmp r0, r2 + beq SectionBssInit /* DO * - stay in thread process mode * - stay in privilege level * - use process stack */ - add r0, #2 + movs r0, #2 MSR control, r0 ISB /* Fill IRQ stack for watermark monitoring */ @@ -95,6 +100,8 @@ LoopFillIRQStack: ldr r3, = _irq_stack_top cmp r2, r3 bcc FillIRQStack + +SectionBssInit: /* Copy the data segment initializers from flash to SRAM */ movs r1, #0 b LoopCopyDataInit @@ -166,12 +173,12 @@ SystemInit_ExtMemCtl_Dummy: .size SystemInit_ExtMemCtl_Dummy, .-SystemInit_ExtMemCtl_Dummy /** - * @brief This is the code that gets called when the processor receives an + * @brief This is the code that gets called when the processor receives an * unexpected interrupt. This simply enters an infinite loop, preserving * the system state for examination by a debugger. * - * @param None - * @retval : None + * @param None + * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: diff --git a/flight/PiOS/STM32F10x/startup_stm32f10x_MD_CC.S b/flight/PiOS/STM32F10x/startup_stm32f10x_MD_CC.S index 9c511b5c3..828462ab6 100644 --- a/flight/PiOS/STM32F10x/startup_stm32f10x_MD_CC.S +++ b/flight/PiOS/STM32F10x/startup_stm32f10x_MD_CC.S @@ -33,7 +33,6 @@ .global g_pfnVectors .global Default_Handler -.global vTaskStartScheduler .global xPortIncreaseHeapSize .global Stack_Change @@ -50,8 +49,6 @@ defined in linker script */ .word _ebss .equ BootRAM, 0xF108F85F -.equ WWDG, 0x40002C00 - /** * @brief This is the code that gets called when the processor first * starts execution following a reset event. Only the absolutely @@ -78,14 +75,19 @@ Reset_Handler: /* Do set/reset the stack pointers */ LDR r0, =_irq_stack_top MSR msp, r0 - LDR r0, =_init_stack_top - MSR psp, r0 + LDR r2, =_init_stack_top + MSR psp, r2 + /* check if irq and init stack are the same */ + /* if they are, we don't do stack swap */ + /* and lets bypass the monitoring as well for now */ + cmp r0, r2 + beq SectionBssInit /* DO * - stay in thread process mode * - stay in privilege level * - use process stack */ - add r0, #2 + movs r0, #2 MSR control, r0 ISB /* Fill IRQ stack for watermark monitoring */ @@ -100,6 +102,8 @@ LoopFillIRQStack: ldr r3, = _irq_stack_top cmp r2, r3 bcc FillIRQStack + +SectionBssInit: /* Copy the data segment initializers from flash to SRAM */ movs r1, #0 b LoopCopyDataInit @@ -136,8 +140,8 @@ LoopFillZerobss: /** * @brief This is the code that swaps stack (from end of heap to irq_stack). * Also reclaim the heap that was used as a stack. - * @param None - * @retval : None + * @param None + * @retval : None */ .section .text.Stack_Change .weak Stack_Change