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INS: Get bootloader working again
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parent
cf6a59468f
commit
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@ -86,7 +86,7 @@ SRC += $(PIOSSTM32FXX)/pios_irq.c
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#SRC += $(PIOSSTM32FXX)/pios_gpio.c
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SRC += $(PIOSSTM32FXX)/pios_spi.c
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SRC += $(PIOSSTM32FXX)/pios_iap.c
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SRC += $(PIOSSTM32FXX)/pios_debug.c
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#SRC += $(PIOSSTM32FXX)/pios_debug.c
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## PIOS Hardware (Common)
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#SRC += $(PIOSCOMMON)/pios_com.c
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@ -359,8 +359,10 @@ $(eval $(call PARTIAL_COMPILE_ARM_TEMPLATE, SRCARM))
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$(OUTDIR)/$(TARGET).bin.o: $(OUTDIR)/$(TARGET).bin
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$(eval $(call OPFW_TEMPLATE,$(OUTDIR)/$(TARGET).bin,$(BOARD_TYPE),$(BOARD_REVISION)))
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# Add jtag targets (program and wipe)
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$(eval $(call JTAG_TEMPLATE_F2X,$(OUTDIR)/$(TARGET).bin,$(BL_BANK_BASE),$(BL_BANK_SIZE)))
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$(eval $(call JTAG_TEMPLATE,$(OUTDIR)/$(TARGET).bin,$(FW_BANK_BASE),$(FW_BANK_SIZE),$(OPENOCD_CONFIG)))
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.PHONY: elf lss sym hex bin bino
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elf: $(OUTDIR)/$(TARGET).elf
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@ -1,8 +1,8 @@
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define connect
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target remote localhost:3334
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monitor cortex_m3 vector_catch all
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file ./build/fw_ins/fw_ins.elf
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# file ./build/bl_ins/bl_ins.elf
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# file ./build/fw_ins/fw_ins.elf
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file ./build/bl_ins/bl_ins.elf
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end
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#monitor reset halt
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@ -9,7 +9,7 @@ BOARD := STM32F2xx_INS
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MODEL := HD
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MODEL_SUFFIX :=
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OPENOCD_CONFIG := stm32f1x.cfg
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OPENOCD_CONFIG := stm32f2x.cfg
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# Note: These must match the values in link_$(BOARD)_memory.ld
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BL_BANK_BASE := 0x08000000 # Start of bootloader flash
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