James Cotton
18a64e261f
Going a bit overkill with this - deinit who SPI block between transactions.
2012-02-02 12:32:57 -06:00
James Cotton
03cfb1453a
DeInit SPI DMA between transactions. Somehow if this doesn't happen the next
...
transaction doesn't start at the beginning again. Something is still not quite
right because first few bytes aren't getting across. Need logic analyzer.
2012-02-02 11:37:35 -06:00
James Cotton
77a6abb341
For PIOS_SPI F4 do not enable the TX irq. Also do not wait for the
...
transmission to finish either.
2012-02-02 11:24:14 -06:00
James Cotton
0a71a48c57
Sending all FF finally again
2012-02-02 10:36:09 -06:00
James Cotton
29237f97ae
For SPI slave devices we need to handle the interrupt differently since
...
transactions should already be completed. Also reset the callback so in the
case of noise on the IRQ line it will not keep firing interrupts.
I suspect we should probably disable interrupts in this handler to prevent
refiring.
2012-02-02 10:13:09 -06:00
James Cotton
aaf1c5dfdd
Update the F1 SPI library to support multiple NSS lines
2012-01-23 23:27:02 -06:00
James Cotton
ff0bd87f4e
PIOS SPI: Add a second claim bus method for use in ISR. This has no timeout
...
and uses an ISR safe queue claiming method. This avoids deadlocks when ISR
blocks other tasks from freeing the bus.
2012-01-21 09:07:06 -06:00
James Cotton
0da6109871
Update the F4 copyright headers to 2012
2012-01-04 19:29:29 -06:00
James Cotton
c080080810
Add ability to change the SPI bus runs at
2011-12-29 00:09:53 -06:00
James Cotton
79730d5afa
Try and get the MPU6000 buffer to run down. Staying high for some reason.
2011-11-17 11:23:31 -06:00
James Cotton
3388843fb5
Merge in PixHawk F4 work
2011-11-01 01:09:55 -05:00
