No functional changes. Whitespace/tab fixups only.
Use TRUE/FALSE instead of 1/0.
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@1430 ebee16cc-31ac-478f-84a7-5cbb03baadba
No need to have boolean flags being floats.
Some of the attitude message was being populated twice.
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@1428 ebee16cc-31ac-478f-84a7-5cbb03baadba
Debug code was previously using the q4 element
in the attitude message to encode a cycle counter
to measure performance on the AHRS. This is no
longer valid.
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@1357 ebee16cc-31ac-478f-84a7-5cbb03baadba
into NED reference frame and used in the INSGPS algorithm, although currently this
information isn't propagated back to OP. Data structures related to the GPS position
into the algorithm and the position estimate out will likely be in flux.
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@1334 ebee16cc-31ac-478f-84a7-5cbb03baadba
Altitude/pressure sensor data is sent to the AHRS whenever
the AltitudeActual object is updated.
Altitude, Pressure and Temperature are sent as floats.
Same as in the UAVObject that goes to the GCS.
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@1291 ebee16cc-31ac-478f-84a7-5cbb03baadba
The STM32 I2C block has a number of errata associated with it.
These errata are primarily related to timing sensitivities between
the peripheral and the interrupt handler. In particular, the
correct generation of the stop bit relies on the I2C IRQ running
immediately and not being held off for any reason.
NOTE: The I2C interrupts must be the highest priority IRQs in the
system to ensure correct operation.
I2C protocol is now implemented as a formal state machine.
See: stm32_i2c_fsm.{dot,jpg} for FSM description.
I2C init is now expressed by const initializers in pios_board.c
for both OP and AHRS boards.
I2C device drivers (ie. bmp085/hmc5843) now pass in const arrays
of an unlimited number of bus transfers to be done atomically.
The I2C adapter driver now handles all bus-level locking across the
list of transactions. Generation of start/restart/stop conditions
are handled automatically over the list of transactions.
Timeouts have been removed from the API for now. May be added
back later.
This driver has run error free on both the OP and AHRS boards for
up to 48hrs but it still sometimes fails earlier than that on the OP
board. There is another possible set of improvements to the driver
that could employ the DMA engine for transfers of >= 2bytes. This
change would reduce the timing sensitivities between the peripheral
and the driver but unfortunately, both the SPI and I2C interfaces
share the DMA1 engine. That means only one of these two peripherals
can use the DMA engine and right now, SPI between OP and AHRS is
already using it.
Failures are currently fatal and will lock up the CPU. This allows
useful information to be obtained in the failure cases.
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@1241 ebee16cc-31ac-478f-84a7-5cbb03baadba
- AHRS mainloop now runs flat out updating sensor data and
processing any messages sent from the OP board.
- Raw data is provided from the magnetometers
- Fake data is provided for attitude solution
- Correct data is provided for serial number queries
Note: There is a bug in the i2c code that very quickly leaves the
magnetometer in a broken state and returning incorrect values.
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@1013 ebee16cc-31ac-478f-84a7-5cbb03baadba
PIOS SPI devices may now make use of automatic CRC generation
and checking on block transfers. Only supports CRC8 for now.
Since the SPI interface CRC calculation continues across message
boundaries (ie. not reset on every transfer), we must manually reset
the CRC registers for every transfer to allow the two sides of the
link to resynchronize.
Unfortunately, resetting the CRC registers requires disabling the
SPI peripheral which must now be done on every block transfer.
Note: The last byte of the tx buffer is never sent and is assumed to
be a place holder for the tx CRC8.
Note: The last byte of the rx buffer is expected to hold the rx CRC8.
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@1011 ebee16cc-31ac-478f-84a7-5cbb03baadba
The input data lines between the OP and AHRS boards had internal
pull-ups enabled. This seemed to be causing issues early on
during development of the inter-board comms. Not sure if this
is still necessary but this is how the current code was tested.
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@1006 ebee16cc-31ac-478f-84a7-5cbb03baadba
To the outside world, the AHRS can be in one of only a few
primary states:
Not present - AHRS is absent or non-responsive via SPI
Inactive - Only link-level status messages are processed
Ready - Ready to receive the next application level message
Busy - Application level message is being processed
Internal to the AHRS, there are many more states that need to be
managed. This FSM provides the necessary decoupling between the
ISR (which is being driven by the SPI link) and the AHRS main
processing loop which must continue to run its filters independently
of the SPI messaging rate.
With this structure, SPI messages can be received at any time but
processed at only specific points within the filter chains.
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@1005 ebee16cc-31ac-478f-84a7-5cbb03baadba
This defines the SPI message format as well as a few
initial messages for moving data across the link.
The v0 messages are place holders for firmware download
in the bootloader.
The v1 messages are to be used by the main application.
Note: This is not the final protocol definition.
Subject to change without notice.
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@1004 ebee16cc-31ac-478f-84a7-5cbb03baadba
Mark the device specific DMA IRQ handlers as strongly linked
aliases for the genericly named interrupt vector symbol.
Here's how this works...
* The address of the symbol DMA1_Channel2_IRQHandler is written
into the DMA1/Channel2 interrupt vector by the linker script.
* The startup_*.S file specifies Default_Handler() as a weakly
linked alias for DMA1_Channel2_IRQHandler.
* We now override the weakly linked alias with the strongly linked
PIOS_SPI_sdcard_irq_handler().
* This results in the address of PIOS_SPI_sdcard_irq_handler() being
written to the vector table for the DMA1/Channel2 interrupt.
* The PIOS_SPI_sdcard_irq_handler() function is now called whenever
the DMA1/Channel2 interrupt fires.
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@1003 ebee16cc-31ac-478f-84a7-5cbb03baadba
- Created a pluggable COM layer
- Converted COM + USART init into static initializers
rather than typedefs
- Generalized the USB HID COM API to match the USART
API.
- Changed USART and COM layers to be data driven rather
than #ifdef'ing/switching on the specifics of each port
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@760 ebee16cc-31ac-478f-84a7-5cbb03baadba
Added support for SPI slave configurations to the pios SPI layer.
Converted the board specific configuration for the PIOS SPI layer to
use const static initializers rather than #defines (see pios_board.c).
SPI interface between the OP board and the AHRS is now operational at
a basic level, capable of moving simple single byte messages between
boards. Multi-byte, CRC protected messages will be added on top of this.
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@759 ebee16cc-31ac-478f-84a7-5cbb03baadba
Split the floss-jtag.cfg file into separate versions
for OP and AHRS.
Push AHRS onto non-default ports for gdb, tcl and
telnet.
Update the AHRS gdb setup script to point at the new
gdb port.
Add (commented out) example sytax to support distinguishing
between multiple floss-jtag boards that don't have serial
numbers. Uses the usb bus address of each device as the
selector. See this patch posted to the openocd mailing list
for how to add this functionality to openocd:
http://lists.berlios.de/pipermail/openocd-development/2010-June/015785.html
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@755 ebee16cc-31ac-478f-84a7-5cbb03baadba
