Added support for SPI slave configurations to the pios SPI layer.
Converted the board specific configuration for the PIOS SPI layer to
use const static initializers rather than #defines (see pios_board.c).
SPI interface between the OP board and the AHRS is now operational at
a basic level, capable of moving simple single byte messages between
boards. Multi-byte, CRC protected messages will be added on top of this.
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@759 ebee16cc-31ac-478f-84a7-5cbb03baadba
Both EVents and ERrors were mistakenly being mapped to the
EVent IRQ channel.
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@659 ebee16cc-31ac-478f-84a7-5cbb03baadba
FreeRTOS has a strict requirement that even interrupt-safe API calls (ie.
those ending in "FromISR") can only be called from ISRs that are at lesser
or equal priorities to configMAX_SYSCALL_INTERRUPT_PRIORITY. See the
"configKERNEL_INTERRUPT_PRIORITY and configMAX_SYSCALL_INTERRUPT_PRIORITY"
section at:
http://www.freertos.org/a00110.html
The interrupt numbers used on the Cortex-M3 CPU has a somewhat backward
representation of the interrupt numbers so 255 = lowest priority and
0 = highest priority.
The calculation is further complicated by the STM32 implementation only using
the upper 4 bits of the priority value. Only 0x00, 0x10, 0x20, ..., 0xE0, 0xF0
represent useful interrupt priorities.
FreeRTOS requires that MAX_SYSCALL and KERNEL interrupt priorities are expressed
as raw unshifted 8-bit values to be programmed directly into the BASEPRI register.
The priority values passed to the NVIC initialization, however, are expected
to be 4-bit values and are shifted up by 4 within NVIC_Init() for you.
The end result is that we need this arrangement:
[highest priority]
NVIC_0 (Non-maskable-interrupt)
NVIC_1
NVIC_2
[Must NOT call FreeRTOS APIs above here]
configMAX_SYSCALL_INTERRUPT_PRIORITY (now at 48 = 0x30 = NVIC_3)
PIOS_IRQ_PRIO_HIGHEST (cur. NVIC_4)
PIOS_IRQ_PRIO_HIGH (cur. NVIC_5)
PIOS_IRQ_PRIO_MID (cur. NVIC_8)
PIOS_IRQ_PRIO_LOW (cur. NVIC_12)
configKERNEL_INTERRUPT_PRIORITY (240 = 0xF0 = NVIC_15)
[lowest priority]
The previous config had configMAX_SYSCALL_INTERRUPT_PRIORITY set at
191 (0xBF) which is effectively NVIC_11. This was allowing all of
the MID, HIGH and HIGHEST interrupt handlers to preempt the OS in
its critical sections. Since some of these ISRs were calling
FreeRTOS APIs, this would result in corrupting internal data structures
within the OS.
It should be ok to move the configKERNEL_INTERRUPT_PRIORITY to a higher
priority as long as it is less than configMAX_SYSCALL_INTERRUPT_PRIORITY.
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@637 ebee16cc-31ac-478f-84a7-5cbb03baadba
Added timer usage diagram to pios_board.h
Removed bloat for extra optimisation in PIOS_DELAY.
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@265 ebee16cc-31ac-478f-84a7-5cbb03baadba
