James Cotton
b0e04e5f79
PIOS SPI: Make sure the non-freertos busy flag inits to zero
2011-08-19 10:52:50 -05:00
James Cotton
3b6ffc8afa
PiSO SPI: Implement a poor mans semaphore for non-freertos systems.
2011-08-18 12:51:00 -05:00
James Cotton
71a1cdff62
PiOS SPI: For F2 need to have the same receive and transmit length when using
...
CRC. This wasn't the case on F1. With CRC the last byte of the buffer passed
to PIOS_SPI_TransferBlock is NOT USED. This is the case on both F1 and F2.
Also need to DeInit DMA before enabling or it doesn't enable successfully.
Finally added a timeout which sets a fail on the pios spi transfer in the case
that either of the dma channels fails to enable.
2011-08-16 11:29:15 -05:00
James Cotton
bcca705750
Disable beta hardware bmp085 driver until it's updated. Not necessary anyway
...
since on the INS.
2011-08-16 08:55:02 -05:00
James Cotton
db9c73db45
Get SPI closer to working. The flags in the pios_config should match the
...
stream number, not channel number. Also DeInit DMA section in the init process
which makes debugging and init behavior more reliable.
2011-08-15 04:47:53 -05:00
James Cotton
c5ed82086d
Configure the interrupt information before enabling. Still looping in IRQ so
...
configuration needs work.
2011-08-14 02:00:52 -05:00
James Cotton
d1c9ac0705
PiOS F2: Commit the F2 port of PiOS from Zippe. Thanks for doing all the hard
...
work man :-D
2011-08-06 19:36:56 -05:00
