1
0
mirror of https://bitbucket.org/librepilot/librepilot.git synced 2024-11-30 08:24:11 +01:00
Commit Graph

16 Commits

Author SHA1 Message Date
peabody124
0259b6d1f1 OP-269 PIOS/ADC: First part of conversion to driver structures
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@2444 ebee16cc-31ac-478f-84a7-5cbb03baadba
2011-01-16 02:45:39 +00:00
peabody124
e393000c34 OP-238 PIOS/SPI: Decrease pin clock rate from 50 to 10 Mhz. Since data at
1.125 MHz this should slow down the slew rates

git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@2361 ebee16cc-31ac-478f-84a7-5cbb03baadba
2011-01-09 20:49:46 +00:00
peabody124
0f07d7f671 OP-240 OP-176 Flight: Setting the priority group back to 4 (anything higher
priority preempts) and adjusting the priorities around to be more sensible.

git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@2355 ebee16cc-31ac-478f-84a7-5cbb03baadba
2011-01-09 20:49:26 +00:00
peabody124
a1a3b0774f Flight/AHRS: Update code to coding conventions.
find ./flight/AHRS/ \! \( -name '*~' -a -prune \) -type f    | xargs -I{} bash -c 'echo {}; dos2unix {}; gnuindent -npro -kr -i8 -ts8 -sob -ss -ncs -cp1 -il0 {};'

git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@1707 ebee16cc-31ac-478f-84a7-5cbb03baadba
2010-09-21 19:29:39 +00:00
pip
cf864225fe Added easier to find USART baudrate setting PIOS_USART_BAUDRATE.
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@1640 ebee16cc-31ac-478f-84a7-5cbb03baadba
2010-09-15 17:07:37 +00:00
peabody124
1051d894b9 AHRS: Merged in some new code from Dschin that expliclity writes the prediction terms in the covariance matrix. Also made changes to compile with -Os. Now runs around 125 - 150 Hz depending on corrections used (this will become adjustable from GCS shortly).
Squashed commit of the following:

commit 897e3365ab6c762584c34238efd12dc144e72af0
Author: James Cotton <peabody124@gmail.com>
Date:   Mon Sep 13 22:15:21 2010 -0500

    AHRS: Getting it running nice and quickly.

commit 53d72fb849164730c89873cab81c9e09be0b112b
Author: James Cotton <peabody124@gmail.com>
Date:   Mon Sep 13 15:57:46 2010 -0500

    AHRS: Make more variables volatile for -Os.

commit 4fa90821b5d3d8c2ea5e67756313a8a63c0eeb8c
Author: James Cotton <peabody124@gmail.com>
Date:   Mon Sep 13 15:11:31 2010 -0500

    AHRS/Makefile: -O0 not added to allow me to try various space flags that don't break code.

commit 5bd17a304dc28dc271c2f3e8c6cb8ad4a830404f
Author: James Cotton <peabody124@gmail.com>
Date:   Mon Sep 13 14:44:05 2010 -0500

    AHRS: Make debuggign USART easy to disable

commit 5453f2a7939492769fe9e9cc822e69c107320670
Author: James Cotton <peabody124@gmail.com>
Date:   Mon Sep 13 14:38:37 2010 -0500

    AHRS: Explicitly expand covariance prediction.  Brings computations from 160 to 90.  Makes it not fit in AHRS though.

commit b6712da7eece2a464a2073d24b77be22bfa47094
Author: James Cotton <peabody124@gmail.com>
Date:   Sun Sep 12 22:59:42 2010 -0500

    AHRS: Make it easy to comment out the I2C/Magnetometers.

commit 8c84d0091f3d6f6bedc7a0224a4ed9cb099b022b
Author: James Cotton <peabody124@gmail.com>
Date:   Thu Sep 9 00:49:50 2010 -0500

    AHRS: Small change to INSGPS analysis tools

git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@1613 ebee16cc-31ac-478f-84a7-5cbb03baadba
2010-09-14 06:42:56 +00:00
peabody124
56131476ef AHRS: Switch to sampling at 2khz, plenty of CPU usage. However need to make EKF rate different for outdoor mode with this patch because otherwise will drop samples :-(
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@1592 ebee16cc-31ac-478f-84a7-5cbb03baadba
2010-09-12 02:54:47 +00:00
peabody124
e499f33fd5 AHRS: Improved code to stream raw data from AHRS and added a matlab function to acquire and analyze the data. The QT program to analyze it should work but QextSerial seems to have a bug and drops or inserts data
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@1559 ebee16cc-31ac-478f-84a7-5cbb03baadba
2010-09-08 06:15:18 +00:00
stac
f74c6ffdd5 i2c: rewrite i2c layer
The STM32 I2C block has a number of errata associated with it.
These errata are primarily related to timing sensitivities between
the peripheral and the interrupt handler.  In particular, the
correct generation of the stop bit relies on the I2C IRQ running
immediately and not being held off for any reason.

NOTE: The I2C interrupts must be the highest priority IRQs in the
      system to ensure correct operation.

I2C protocol is now implemented as a formal state machine.
See: stm32_i2c_fsm.{dot,jpg} for FSM description.

I2C init is now expressed by const initializers in pios_board.c
for both OP and AHRS boards.

I2C device drivers (ie. bmp085/hmc5843) now pass in const arrays
of an unlimited number of bus transfers to be done atomically.
The I2C adapter driver now handles all bus-level locking across the
list of transactions.  Generation of start/restart/stop conditions
are handled automatically over the list of transactions.

Timeouts have been removed from the API for now.  May be added
back later.

This driver has run error free on both the OP and AHRS boards for
up to 48hrs but it still sometimes fails earlier than that on the OP
board.  There is another possible set of improvements to the driver
that could employ the DMA engine for transfers of >= 2bytes.  This
change would reduce the timing sensitivities between the peripheral
and the driver but unfortunately, both the SPI and I2C interfaces
share the DMA1 engine.  That means only one of these two peripherals
can use the DMA engine and right now, SPI between OP and AHRS is
already using it.

Failures are currently fatal and will lock up the CPU.  This allows
useful information to be obtained in the failure cases.

git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@1241 ebee16cc-31ac-478f-84a7-5cbb03baadba
2010-08-08 04:15:08 +00:00
stac
a3a2dbd634 spi: Add support for hardware CRC generation/checking
PIOS SPI devices may now make use of automatic CRC generation
and checking on block transfers.  Only supports CRC8 for now.

Since the SPI interface CRC calculation continues across message
boundaries (ie. not reset on every transfer), we must manually reset
the CRC registers for every transfer to allow the two sides of the
link to resynchronize.

Unfortunately, resetting the CRC registers requires disabling the
SPI peripheral which must now be done on every block transfer.

Note: The last byte of the tx buffer is never sent and is assumed to
      be a place holder for the tx CRC8.
Note: The last byte of the rx buffer is expected to hold the rx CRC8.

git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@1011 ebee16cc-31ac-478f-84a7-5cbb03baadba
2010-07-04 02:21:42 +00:00
stac
0e6294ca27 spi: remove internal pull-up from input data lines
The input data lines between the OP and AHRS boards had internal
pull-ups enabled.  This seemed to be causing issues early on
during development of the inter-board comms.  Not sure if this
is still necessary but this is how the current code was tested.

git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@1006 ebee16cc-31ac-478f-84a7-5cbb03baadba
2010-07-04 02:21:26 +00:00
stac
e3824a6d78 ahrs spi: Add AHRS SPI link management FSM
To the outside world, the AHRS can be in one of only a few
primary states:
 Not present - AHRS is absent or non-responsive via SPI
 Inactive - Only link-level status messages are processed
 Ready - Ready to receive the next application level message
 Busy - Application level message is being processed

Internal to the AHRS, there are many more states that need to be
managed.  This FSM provides the necessary decoupling between the
ISR (which is being driven by the SPI link) and the AHRS main
processing loop which must continue to run its filters independently
of the SPI messaging rate.

With this structure, SPI messages can be received at any time but
processed at only specific points within the filter chains.

git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@1005 ebee16cc-31ac-478f-84a7-5cbb03baadba
2010-07-04 02:21:22 +00:00
stac
3eceef43d3 spi: Connect device specific DMA IRQ handlers
Mark the device specific DMA IRQ handlers as strongly linked
aliases for the genericly named interrupt vector symbol.

Here's how this works...
 * The address of the symbol DMA1_Channel2_IRQHandler is written
   into the DMA1/Channel2 interrupt vector by the linker script.
 * The startup_*.S file specifies Default_Handler() as a weakly
   linked alias for DMA1_Channel2_IRQHandler.
 * We now override the weakly linked alias with the strongly linked
   PIOS_SPI_sdcard_irq_handler().
 * This results in the address of PIOS_SPI_sdcard_irq_handler() being
   written to the vector table for the DMA1/Channel2 interrupt.
 * The PIOS_SPI_sdcard_irq_handler() function is now called whenever
   the DMA1/Channel2 interrupt fires.

git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@1003 ebee16cc-31ac-478f-84a7-5cbb03baadba
2010-07-04 02:21:13 +00:00
FredericG
5d9a718430 Made pios_com_num_devices const
git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@837 ebee16cc-31ac-478f-84a7-5cbb03baadba
2010-06-20 17:59:48 +00:00
stac
771a56ca9d com/usart: generalize com driver API
- Created a pluggable COM layer
- Converted COM + USART init into static initializers
  rather than typedefs
- Generalized the USB HID COM API to match the USART
  API.
- Changed USART and COM layers to be data driven rather
  than #ifdef'ing/switching on the specifics of each port

git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@760 ebee16cc-31ac-478f-84a7-5cbb03baadba
2010-06-13 04:24:26 +00:00
stac
8d015a57d0 pios spi: support both master and slave configs
Added support for SPI slave configurations to the pios SPI layer.

Converted the board specific configuration for the PIOS SPI layer to
use const static initializers rather than #defines (see pios_board.c).

SPI interface between the OP board and the AHRS is now operational at
a basic level, capable of moving simple single byte messages between
boards.  Multi-byte, CRC protected messages will be added on top of this.

git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@759 ebee16cc-31ac-478f-84a7-5cbb03baadba
2010-06-13 04:23:44 +00:00