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LibrePilot/flight/pios/stm32f30x/link_memory.lds
2017-05-25 22:08:36 +02:00

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#define SRAM_BANK_BASE 0x20000000
#define CCSRAM_BANK_BASE 0x10000000
#ifdef STM32F303xC
# define SRAM_BANK_SIZE 0x00A000
# define CCSRAM_BANK_SIZE 0x002000
#endif
#ifdef STM32F303xE
# define SRAM_BANK_SIZE 0x010000
# define CCSRAM_BANK_SIZE 0x004000
#endif
MEMORY
{
BD_INFO (r) : ORIGIN = (BL_BANK_BASE + BL_BANK_SIZE) - 0x80, LENGTH = 0x000080
#ifdef EE_BANK_BASE
EE_BANK (rx) : ORIGIN = EE_BANK_BASE, LENGTH = EE_BANK_SIZE
#endif /* EE_BANK_BASE */
#ifdef BOOTLOADER
FLASH (rx) : ORIGIN = BL_BANK_BASE, LENGTH = BL_BANK_SIZE
#else
FLASH (rx) : ORIGIN = FW_BANK_BASE, LENGTH = FW_BANK_SIZE
#endif
SRAM (rwx) : ORIGIN = SRAM_BANK_BASE, LENGTH = SRAM_BANK_SIZE
CCSRAM (rw) : ORIGIN = CCSRAM_BANK_BASE, LENGTH = CCSRAM_BANK_SIZE
}