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439 lines
13 KiB
C
439 lines
13 KiB
C
/**
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******************************************************************************
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* @addtogroup PIOS PIOS Core hardware abstraction layer
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* @{
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* @addtogroup PIOS_USART USART Functions
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* @brief PIOS interface for USART port
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* @{
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*
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* @file pios_usart.c
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* @author The LibrePilot Project, http://www.librepilot.org, Copyright (c) 2016-2017.
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* The OpenPilot Team, http://www.openpilot.org Copyright (C) 2010.
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* @brief USART commands. Inits USARTs, controls USARTs & Interupt handlers. (STM32 dependent)
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* @see The GNU Public License (GPL) Version 3
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*
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*****************************************************************************/
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "pios.h"
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#ifdef PIOS_INCLUDE_USART
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#include <pios_usart_priv.h>
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#include <pios_usart.h>
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/* Provide a COM driver */
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static void PIOS_USART_ChangeConfig(uint32_t usart_id, enum PIOS_COM_Word_Length word_len, enum PIOS_COM_StopBits stop_bits, enum PIOS_COM_Parity parity, uint32_t baud_rate, enum PIOS_COM_Mode mode);
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static void PIOS_USART_ChangeBaud(uint32_t usart_id, uint32_t baud);
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static void PIOS_USART_RegisterRxCallback(uint32_t usart_id, pios_com_callback rx_in_cb, uint32_t context);
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static void PIOS_USART_RegisterTxCallback(uint32_t usart_id, pios_com_callback tx_out_cb, uint32_t context);
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static void PIOS_USART_TxStart(uint32_t usart_id, uint16_t tx_bytes_avail);
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static void PIOS_USART_RxStart(uint32_t usart_id, uint16_t rx_bytes_avail);
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const struct pios_com_driver pios_usart_com_driver = {
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.set_baud = PIOS_USART_ChangeBaud,
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.set_config = PIOS_USART_ChangeConfig,
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.tx_start = PIOS_USART_TxStart,
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.rx_start = PIOS_USART_RxStart,
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.bind_tx_cb = PIOS_USART_RegisterTxCallback,
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.bind_rx_cb = PIOS_USART_RegisterRxCallback,
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};
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enum pios_usart_dev_magic {
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PIOS_USART_DEV_MAGIC = 0x11223344,
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};
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struct pios_usart_dev {
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enum pios_usart_dev_magic magic;
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const struct pios_usart_cfg *cfg;
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USART_InitTypeDef init;
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pios_com_callback rx_in_cb;
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uint32_t rx_in_context;
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pios_com_callback tx_out_cb;
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uint32_t tx_out_context;
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uint32_t rx_dropped;
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};
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static bool PIOS_USART_validate(struct pios_usart_dev *usart_dev)
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{
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return usart_dev->magic == PIOS_USART_DEV_MAGIC;
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}
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#if defined(PIOS_INCLUDE_FREERTOS)
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static struct pios_usart_dev *PIOS_USART_alloc(void)
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{
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struct pios_usart_dev *usart_dev;
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usart_dev = (struct pios_usart_dev *)pios_malloc(sizeof(struct pios_usart_dev));
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if (!usart_dev) {
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return NULL;
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}
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memset(usart_dev, 0, sizeof(struct pios_usart_dev));
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usart_dev->magic = PIOS_USART_DEV_MAGIC;
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return usart_dev;
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}
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#else
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static struct pios_usart_dev pios_usart_devs[PIOS_USART_MAX_DEVS];
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static uint8_t pios_usart_num_devs;
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static struct pios_usart_dev *PIOS_USART_alloc(void)
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{
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struct pios_usart_dev *usart_dev;
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if (pios_usart_num_devs >= PIOS_USART_MAX_DEVS) {
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return NULL;
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}
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usart_dev = &pios_usart_devs[pios_usart_num_devs++];
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memset(usart_dev, 0, sizeof(struct pios_usart_dev));
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usart_dev->magic = PIOS_USART_DEV_MAGIC;
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return usart_dev;
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}
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#endif /* if defined(PIOS_INCLUDE_FREERTOS) */
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/* Bind Interrupt Handlers
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*
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* Map all valid USART IRQs to the common interrupt handler
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* and provide storage for a 32-bit device id IRQ to map
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* each physical IRQ to a specific registered device instance.
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*/
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static void PIOS_USART_generic_irq_handler(uint32_t usart_id);
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static uint32_t PIOS_USART_1_id;
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void USART1_IRQHandler(void) __attribute__((alias("PIOS_USART_1_irq_handler")));
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static void PIOS_USART_1_irq_handler(void)
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{
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PIOS_USART_generic_irq_handler(PIOS_USART_1_id);
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}
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static uint32_t PIOS_USART_2_id;
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void USART2_IRQHandler(void) __attribute__((alias("PIOS_USART_2_irq_handler")));
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static void PIOS_USART_2_irq_handler(void)
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{
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PIOS_USART_generic_irq_handler(PIOS_USART_2_id);
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}
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static uint32_t PIOS_USART_3_id;
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void USART3_IRQHandler(void) __attribute__((alias("PIOS_USART_3_irq_handler")));
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static void PIOS_USART_3_irq_handler(void)
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{
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PIOS_USART_generic_irq_handler(PIOS_USART_3_id);
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}
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/**
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* Initialise a single USART device
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*/
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int32_t PIOS_USART_Init(uint32_t *usart_id, const struct pios_usart_cfg *cfg)
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{
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PIOS_DEBUG_Assert(usart_id);
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PIOS_DEBUG_Assert(cfg);
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struct pios_usart_dev *usart_dev;
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usart_dev = (struct pios_usart_dev *)PIOS_USART_alloc();
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if (!usart_dev) {
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goto out_fail;
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}
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/* Bind the configuration to the device instance */
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usart_dev->cfg = cfg;
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/* Copy the comm parameter structure */
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usart_dev->init = cfg->init;
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/* Enable the USART Pins Software Remapping */
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if (usart_dev->cfg->remap) {
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GPIO_PinRemapConfig(usart_dev->cfg->remap, ENABLE);
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}
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/* Initialize the USART Rx and Tx pins */
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GPIO_Init(usart_dev->cfg->rx.gpio, &usart_dev->cfg->rx.init);
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GPIO_Init(usart_dev->cfg->tx.gpio, &usart_dev->cfg->tx.init);
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/* Enable USART clock */
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switch ((uint32_t)usart_dev->cfg->regs) {
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case (uint32_t)USART1:
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
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break;
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case (uint32_t)USART2:
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
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break;
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case (uint32_t)USART3:
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
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break;
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}
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/* Configure the USART */
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USART_Init(usart_dev->cfg->regs, &usart_dev->init);
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*usart_id = (uint32_t)usart_dev;
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/* Configure USART Interrupts */
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switch ((uint32_t)usart_dev->cfg->regs) {
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case (uint32_t)USART1:
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PIOS_USART_1_id = (uint32_t)usart_dev;
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break;
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case (uint32_t)USART2:
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PIOS_USART_2_id = (uint32_t)usart_dev;
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break;
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case (uint32_t)USART3:
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PIOS_USART_3_id = (uint32_t)usart_dev;
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break;
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}
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NVIC_Init(&usart_dev->cfg->irq.init);
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USART_ITConfig(usart_dev->cfg->regs, USART_IT_RXNE, ENABLE);
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USART_ITConfig(usart_dev->cfg->regs, USART_IT_TXE, ENABLE);
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/* Enable USART */
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USART_Cmd(usart_dev->cfg->regs, ENABLE);
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return 0;
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out_fail:
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return -1;
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}
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static void PIOS_USART_RxStart(uint32_t usart_id, __attribute__((unused)) uint16_t rx_bytes_avail)
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{
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struct pios_usart_dev *usart_dev = (struct pios_usart_dev *)usart_id;
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bool valid = PIOS_USART_validate(usart_dev);
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PIOS_Assert(valid);
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USART_ITConfig(usart_dev->cfg->regs, USART_IT_RXNE, ENABLE);
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}
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static void PIOS_USART_TxStart(uint32_t usart_id, __attribute__((unused)) uint16_t tx_bytes_avail)
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{
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struct pios_usart_dev *usart_dev = (struct pios_usart_dev *)usart_id;
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bool valid = PIOS_USART_validate(usart_dev);
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PIOS_Assert(valid);
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USART_ITConfig(usart_dev->cfg->regs, USART_IT_TXE, ENABLE);
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}
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/**
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* Changes the baud rate of the USART peripheral without re-initialising.
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* \param[in] usart_id USART name (GPS, TELEM, AUX)
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* \param[in] baud Requested baud rate
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*/
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static void PIOS_USART_ChangeBaud(uint32_t usart_id, uint32_t baud)
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{
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struct pios_usart_dev *usart_dev = (struct pios_usart_dev *)usart_id;
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bool valid = PIOS_USART_validate(usart_dev);
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PIOS_Assert(valid);
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/* Use our working copy of the usart init structure */
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usart_dev->init.USART_BaudRate = baud;
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/* Write back the modified configuration */
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USART_Init(usart_dev->cfg->regs, &usart_dev->init);
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}
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/**
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* Changes configuration of the USART peripheral without re-initialising.
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* \param[in] usart_id USART name (GPS, TELEM, AUX)
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* \param[in] word_len Requested word length
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* \param[in] stop_bits Requested stop bits
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* \param[in] parity Requested parity
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* \param[in] baud_rate Requested baud rate
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* \param[in] mode Requested mode
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*
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*/
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static void PIOS_USART_ChangeConfig(uint32_t usart_id,
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enum PIOS_COM_Word_Length word_len,
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enum PIOS_COM_StopBits stop_bits,
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enum PIOS_COM_Parity parity,
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uint32_t baud_rate,
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enum PIOS_COM_Mode mode)
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{
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struct pios_usart_dev *usart_dev = (struct pios_usart_dev *)usart_id;
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bool valid = PIOS_USART_validate(usart_dev);
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PIOS_Assert(valid);
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switch (word_len) {
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case PIOS_COM_Word_length_8b:
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usart_dev->init.USART_WordLength = USART_WordLength_8b;
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break;
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case PIOS_COM_Word_length_9b:
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usart_dev->init.USART_WordLength = USART_WordLength_9b;
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break;
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default:
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break;
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}
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switch (stop_bits) {
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case PIOS_COM_StopBits_0_5:
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usart_dev->init.USART_StopBits = USART_StopBits_0_5;
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break;
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case PIOS_COM_StopBits_1:
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usart_dev->init.USART_StopBits = USART_StopBits_1;
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break;
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case PIOS_COM_StopBits_1_5:
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usart_dev->init.USART_StopBits = USART_StopBits_1_5;
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break;
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case PIOS_COM_StopBits_2:
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usart_dev->init.USART_StopBits = USART_StopBits_2;
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break;
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default:
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break;
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}
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switch (parity) {
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case PIOS_COM_Parity_No:
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usart_dev->init.USART_Parity = USART_Parity_No;
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break;
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case PIOS_COM_Parity_Even:
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usart_dev->init.USART_Parity = USART_Parity_Even;
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break;
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case PIOS_COM_Parity_Odd:
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usart_dev->init.USART_Parity = USART_Parity_Odd;
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break;
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default:
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break;
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}
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if (baud_rate) {
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usart_dev->init.USART_BaudRate = baud_rate;
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}
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switch (mode) {
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case PIOS_COM_Mode_Rx:
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usart_dev->init.USART_Mode = USART_Mode_Rx;
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break;
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case PIOS_COM_Mode_Tx:
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usart_dev->init.USART_Mode = USART_Mode_Tx;
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break;
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case PIOS_COM_Mode_RxTx:
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usart_dev->init.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
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break;
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default:
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break;
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}
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/* Write back the modified configuration */
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USART_Init(usart_dev->cfg->regs, &usart_dev->init);
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/*
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* Re enable USART.
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*/
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USART_Cmd(usart_dev->cfg->regs, ENABLE);
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}
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static void PIOS_USART_RegisterRxCallback(uint32_t usart_id, pios_com_callback rx_in_cb, uint32_t context)
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{
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struct pios_usart_dev *usart_dev = (struct pios_usart_dev *)usart_id;
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bool valid = PIOS_USART_validate(usart_dev);
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PIOS_Assert(valid);
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/*
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* Order is important in these assignments since ISR uses _cb
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* field to determine if it's ok to dereference _cb and _context
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*/
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usart_dev->rx_in_context = context;
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usart_dev->rx_in_cb = rx_in_cb;
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}
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static void PIOS_USART_RegisterTxCallback(uint32_t usart_id, pios_com_callback tx_out_cb, uint32_t context)
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{
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struct pios_usart_dev *usart_dev = (struct pios_usart_dev *)usart_id;
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bool valid = PIOS_USART_validate(usart_dev);
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PIOS_Assert(valid);
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/*
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* Order is important in these assignments since ISR uses _cb
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* field to determine if it's ok to dereference _cb and _context
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*/
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usart_dev->tx_out_context = context;
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usart_dev->tx_out_cb = tx_out_cb;
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}
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static void PIOS_USART_generic_irq_handler(uint32_t usart_id)
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{
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struct pios_usart_dev *usart_dev = (struct pios_usart_dev *)usart_id;
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bool valid = PIOS_USART_validate(usart_dev);
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PIOS_Assert(valid);
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/* Force read of dr after sr to make sure to clear error flags */
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volatile uint16_t sr = usart_dev->cfg->regs->SR;
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volatile uint8_t dr = usart_dev->cfg->regs->DR;
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/* Check if RXNE flag is set */
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bool rx_need_yield = false;
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if (sr & USART_SR_RXNE) {
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uint8_t byte = dr;
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if (usart_dev->rx_in_cb) {
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uint16_t rc;
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rc = (usart_dev->rx_in_cb)(usart_dev->rx_in_context, &byte, 1, NULL, &rx_need_yield);
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if (rc < 1) {
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/* Lost bytes on rx */
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usart_dev->rx_dropped += 1;
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}
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}
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}
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/* Check if TXE flag is set */
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bool tx_need_yield = false;
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if (sr & USART_SR_TXE) {
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if (usart_dev->tx_out_cb) {
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uint8_t b;
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uint16_t bytes_to_send;
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bytes_to_send = (usart_dev->tx_out_cb)(usart_dev->tx_out_context, &b, 1, NULL, &tx_need_yield);
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if (bytes_to_send > 0) {
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/* Send the byte we've been given */
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usart_dev->cfg->regs->DR = b;
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} else {
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/* No bytes to send, disable TXE interrupt */
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USART_ITConfig(usart_dev->cfg->regs, USART_IT_TXE, DISABLE);
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}
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} else {
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/* No bytes to send, disable TXE interrupt */
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USART_ITConfig(usart_dev->cfg->regs, USART_IT_TXE, DISABLE);
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}
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}
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#if defined(PIOS_INCLUDE_FREERTOS)
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if (rx_need_yield || tx_need_yield) {
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vPortYield();
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}
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#endif /* PIOS_INCLUDE_FREERTOS */
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}
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#endif /* PIOS_INCLUDE_USART */
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/**
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* @}
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* @}
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*/
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