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5f8760a55c
This allows the spektrum and sbus receiver drivers to bind directly to the usart layer using a properly exported API rather than overriding the interrupt handler. Bytes are now pushed directly from the usart layer into the com layer without any buffering. The com layer performs all of the buffering. A further benefit from this approach is that we can put all blocking/non-blocking behaviour into the COM layer and not in the underlying drivers. Misc related changes: - Remove obsolete .handler field from irq configs - Adapt all users of PIOS_COM_* functions to new API - Fixup callers of PIOS_USB_HID_Init()
222 lines
6.6 KiB
C
222 lines
6.6 KiB
C
/**
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******************************************************************************
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* @addtogroup PIOS PIOS Core hardware abstraction layer
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* @{
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* @addtogroup PIOS_PWM PWM Input Functions
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* @brief Code to measure with PWM input
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* @{
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*
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* @file pios_pwm.c
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* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2010.
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* @brief PWM Input functions (STM32 dependent)
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* @see The GNU Public License (GPL) Version 3
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*
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*****************************************************************************/
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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/* Project Includes */
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#include "pios.h"
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#include "pios_pwm_priv.h"
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#if defined(PIOS_INCLUDE_PWM)
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/* Provide a RCVR driver */
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static int32_t PIOS_PWM_Get(uint32_t rcvr_id, uint8_t channel);
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const struct pios_rcvr_driver pios_pwm_rcvr_driver = {
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.read = PIOS_PWM_Get,
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};
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/* Local Variables */
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static uint8_t CaptureState[PIOS_PWM_NUM_INPUTS];
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static uint16_t RiseValue[PIOS_PWM_NUM_INPUTS];
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static uint16_t FallValue[PIOS_PWM_NUM_INPUTS];
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static uint32_t CaptureValue[PIOS_PWM_NUM_INPUTS];
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static uint32_t CapCounter[PIOS_PWM_NUM_INPUTS];
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/**
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* Initialises all the pins
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*/
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void PIOS_PWM_Init(void)
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{
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for (uint8_t i = 0; i < pios_pwm_cfg.num_channels; i++) {
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/* Flush counter variables */
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CaptureState[i] = 0;
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RiseValue[i] = 0;
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FallValue[i] = 0;
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CaptureValue[i] = 0;
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NVIC_InitTypeDef NVIC_InitStructure = pios_pwm_cfg.irq.init;
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GPIO_InitTypeDef GPIO_InitStructure = pios_pwm_cfg.gpio_init;
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TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure = pios_pwm_cfg.tim_base_init;
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TIM_ICInitTypeDef TIM_ICInitStructure = pios_pwm_cfg.tim_ic_init;
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struct pios_pwm_channel channel = pios_pwm_cfg.channels[i];
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/* Enable appropriate clock to timer module */
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switch((int32_t) channel.timer) {
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case (int32_t)TIM1:
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NVIC_InitStructure.NVIC_IRQChannel = TIM1_CC_IRQn;
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE);
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break;
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case (int32_t)TIM2:
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NVIC_InitStructure.NVIC_IRQChannel = TIM2_IRQn;
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);
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break;
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case (int32_t)TIM3:
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NVIC_InitStructure.NVIC_IRQChannel = TIM3_IRQn;
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE);
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break;
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case (int32_t)TIM4:
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NVIC_InitStructure.NVIC_IRQChannel = TIM4_IRQn;
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE);
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break;
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#ifdef STM32F10X_HD
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case (int32_t)TIM5:
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NVIC_InitStructure.NVIC_IRQChannel = TIM5_IRQn;
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM5, ENABLE);
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break;
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case (int32_t)TIM6:
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NVIC_InitStructure.NVIC_IRQChannel = TIM6_IRQn;
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM6, ENABLE);
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break;
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case (int32_t)TIM7:
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NVIC_InitStructure.NVIC_IRQChannel = TIM7_IRQn;
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM7, ENABLE);
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break;
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case (int32_t)TIM8:
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NVIC_InitStructure.NVIC_IRQChannel = TIM8_CC_IRQn;
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM8, ENABLE);
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break;
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#endif
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}
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NVIC_Init(&NVIC_InitStructure);
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/* Enable GPIO */
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GPIO_InitStructure.GPIO_Pin = channel.pin;
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GPIO_Init(channel.port, &GPIO_InitStructure);
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/* Configure timer for input capture */
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TIM_ICInitStructure.TIM_Channel = channel.channel;
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TIM_ICInit(channel.timer, &TIM_ICInitStructure);
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/* Configure timer clocks */
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TIM_InternalClockConfig(channel.timer);
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if(channel.timer->PSC != ((PIOS_MASTER_CLOCK / 1000000) - 1))
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TIM_TimeBaseInit(channel.timer, &TIM_TimeBaseStructure);
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/* Enable the Capture Compare Interrupt Request */
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TIM_ITConfig(channel.timer, channel.ccr, ENABLE);
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/* Enable timers */
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TIM_Cmd(channel.timer, ENABLE);
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}
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if(pios_pwm_cfg.remap) {
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/* Warning, I don't think this will work for multiple remaps at once */
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GPIO_PinRemapConfig(pios_pwm_cfg.remap, ENABLE);
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}
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}
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/**
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* Get the value of an input channel
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* \param[in] Channel Number of the channel desired
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* \output -1 Channel not available
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* \output >0 Channel value
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*/
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static int32_t PIOS_PWM_Get(uint32_t rcvr_id, uint8_t channel)
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{
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/* Return error if channel not available */
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if (channel >= pios_pwm_cfg.num_channels) {
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return -1;
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}
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return CaptureValue[channel];
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}
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void PIOS_PWM_irq_handler(TIM_TypeDef * timer)
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{
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uint16_t val = 0;
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for(uint8_t i = 0; i < pios_pwm_cfg.num_channels; i++) {
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struct pios_pwm_channel channel = pios_pwm_cfg.channels[i];
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if ((channel.timer == timer) && (TIM_GetITStatus(channel.timer, channel.ccr) == SET)) {
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TIM_ClearITPendingBit(channel.timer, channel.ccr);
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switch(channel.channel) {
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case TIM_Channel_1:
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val = TIM_GetCapture1(channel.timer);
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break;
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case TIM_Channel_2:
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val = TIM_GetCapture2(channel.timer);
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break;
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case TIM_Channel_3:
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val = TIM_GetCapture3(channel.timer);
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break;
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case TIM_Channel_4:
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val = TIM_GetCapture4(channel.timer);
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break;
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}
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if (CaptureState[i] == 0) {
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RiseValue[i] = val;
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} else {
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FallValue[i] = val;
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}
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// flip state machine and capture value here
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/* Simple rise or fall state machine */
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TIM_ICInitTypeDef TIM_ICInitStructure = pios_pwm_cfg.tim_ic_init;
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if (CaptureState[i] == 0) {
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/* Switch states */
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CaptureState[i] = 1;
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/* Switch polarity of input capture */
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TIM_ICInitStructure.TIM_ICPolarity = TIM_ICPolarity_Falling;
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TIM_ICInitStructure.TIM_Channel = channel.channel;
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TIM_ICInit(channel.timer, &TIM_ICInitStructure);
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} else {
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/* Capture computation */
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if (FallValue[i] > RiseValue[i]) {
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CaptureValue[i] = (FallValue[i] - RiseValue[i]);
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} else {
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CaptureValue[i] = ((channel.timer->ARR - RiseValue[i]) + FallValue[i]);
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}
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/* Switch states */
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CaptureState[i] = 0;
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/* Increase supervisor counter */
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CapCounter[i]++;
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/* Switch polarity of input capture */
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TIM_ICInitStructure.TIM_ICPolarity = TIM_ICPolarity_Rising;
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TIM_ICInitStructure.TIM_Channel = channel.channel;
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TIM_ICInit(channel.timer, &TIM_ICInitStructure);
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}
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}
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}
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}
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#endif
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/**
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* @}
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* @}
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*/
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