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Since the i2c bus is bidirectional, there are certain states (eg. part way through a read) where the slave device is in control of driving the SDA line. On a cold start (power on), the slave devices are all quiescent and will not drive the bus. However, on a warm start (eg. watchdog or jtag restart), it is possible that as the CPU boots, the slave device may be holding the SDA line low. This is a bus busy condition and will prevent the I2C bus master in the CPU from being able to seize the bus during init. The fix for this is to clock the i2c bus sufficiently to ensure that the the slave device finishes its transaction and releases the bus. Once the slave has released the bus, the bus master can properly initialize and assert a STOP condition on the bus. git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@1349 ebee16cc-31ac-478f-84a7-5cbb03baadba
100 lines
3.0 KiB
C
100 lines
3.0 KiB
C
/**
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******************************************************************************
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*
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* @file pios_i2c_priv.h
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* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2010.
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* Parts by Thorsten Klose (tk@midibox.org)
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* @brief I2C private definitions.
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* @see The GNU Public License (GPL) Version 3
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*
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*****************************************************************************/
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef PIOS_I2C_PRIV_H
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#define PIOS_I2C_PRIV_H
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#include <pios.h>
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#include <pios_stm32.h>
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#include <stdbool.h>
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struct pios_i2c_adapter_cfg {
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I2C_TypeDef * regs;
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I2C_InitTypeDef init;
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uint32_t transfer_timeout_ms;
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struct stm32_gpio scl;
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struct stm32_gpio sda;
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struct stm32_irq event;
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struct stm32_irq error;
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};
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enum i2c_adapter_state {
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I2C_STATE_FAULTED = 0, /* Must be zero so undefined transitions land here */
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I2C_STATE_STOPPED,
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I2C_STATE_STOPPING,
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I2C_STATE_STARTING,
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I2C_STATE_R_MORE_TXN_ADDR,
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I2C_STATE_R_MORE_TXN_PRE_ONE,
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I2C_STATE_R_MORE_TXN_PRE_FIRST,
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I2C_STATE_R_MORE_TXN_PRE_MIDDLE,
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I2C_STATE_R_MORE_TXN_PRE_LAST,
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I2C_STATE_R_MORE_TXN_POST_LAST,
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I2C_STATE_R_LAST_TXN_ADDR,
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I2C_STATE_R_LAST_TXN_PRE_ONE,
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I2C_STATE_R_LAST_TXN_PRE_FIRST,
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I2C_STATE_R_LAST_TXN_PRE_MIDDLE,
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I2C_STATE_R_LAST_TXN_PRE_LAST,
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I2C_STATE_R_LAST_TXN_POST_LAST,
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I2C_STATE_W_MORE_TXN_ADDR,
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I2C_STATE_W_MORE_TXN_MIDDLE,
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I2C_STATE_W_MORE_TXN_LAST,
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I2C_STATE_W_LAST_TXN_ADDR,
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I2C_STATE_W_LAST_TXN_MIDDLE,
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I2C_STATE_W_LAST_TXN_LAST,
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I2C_STATE_NUM_STATES /* Must be last */
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};
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struct pios_i2c_adapter {
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const struct pios_i2c_adapter_cfg * const cfg;
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void (*callback)(uint8_t, uint8_t);
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#ifdef PIOS_INCLUDE_FREERTOS
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xSemaphoreHandle sem_busy;
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xSemaphoreHandle sem_ready;
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#endif
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bool bus_needed_reset;
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enum i2c_adapter_state curr_state;
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const struct pios_i2c_txn * first_txn;
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const struct pios_i2c_txn * active_txn;
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const struct pios_i2c_txn * last_txn;
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uint8_t * active_byte;
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uint8_t * last_byte;
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};
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extern struct pios_i2c_adapter pios_i2c_adapters[];
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extern uint8_t pios_i2c_num_adapters;
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#endif /* PIOS_I2C_PRIV_H */
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