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80 lines
2.5 KiB
Diff
80 lines
2.5 KiB
Diff
From 7a8a1dbf856a2183c91f441cfdd2eee5b3d9151b Mon Sep 17 00:00:00 2001
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From: Stacey Sheldon <stac@solidgoldbomb.org>
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Date: Thu, 2 Feb 2012 22:42:03 -0500
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Subject: [PATCH 1/2] armv7m: remove dummy FP regs for new gdb
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---
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src/rtos/rtos_standard_stackings.c | 6 ++++++
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src/target/armv7m.c | 16 ++++++++++++++++
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2 files changed, 22 insertions(+), 0 deletions(-)
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diff --git a/src/rtos/rtos_standard_stackings.c b/src/rtos/rtos_standard_stackings.c
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index 278d3ef..7ef4659 100644
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--- a/src/rtos/rtos_standard_stackings.c
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+++ b/src/rtos/rtos_standard_stackings.c
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@@ -41,6 +41,7 @@ static const struct stack_register_offset rtos_standard_Cortex_M3_stack_offsets[
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{ -2, 32 }, /* sp */
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{ 0x34, 32 }, /* lr */
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{ 0x38, 32 }, /* pc */
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+#ifdef USE_DUMMY_FP_REGS
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{ -1, 96 }, /* FPA1 */
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{ -1, 96 }, /* FPA2 */
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{ -1, 96 }, /* FPA3 */
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@@ -50,6 +51,7 @@ static const struct stack_register_offset rtos_standard_Cortex_M3_stack_offsets[
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{ -1, 96 }, /* FPA7 */
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{ -1, 96 }, /* FPA8 */
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{ -1, 32 }, /* FPS */
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+#endif
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{ 0x3c, 32 }, /* xPSR */
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};
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@@ -58,7 +60,11 @@ const struct rtos_register_stacking rtos_standard_Cortex_M3_stacking =
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{
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0x40, /* stack_registers_size */
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-1, /* stack_growth_direction */
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+#ifdef USE_DUMMY_FP_REGS
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26, /* num_output_registers */
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+#else
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+ 17,
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+#endif
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8, /* stack_alignment */
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rtos_standard_Cortex_M3_stack_offsets /* register_offsets */
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};
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diff --git a/src/target/armv7m.c b/src/target/armv7m.c
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index 6c1732e..7bb53c7 100644
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--- a/src/target/armv7m.c
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+++ b/src/target/armv7m.c
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@@ -272,6 +272,7 @@ int armv7m_get_gdb_reg_list(struct target *target, struct reg **reg_list[], int
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struct armv7m_common *armv7m = target_to_armv7m(target);
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int i;
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+#ifdef USE_DUMMY_FP_REGS
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*reg_list_size = 26;
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*reg_list = malloc(sizeof(struct reg*) * (*reg_list_size));
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@@ -302,6 +303,21 @@ int armv7m_get_gdb_reg_list(struct target *target, struct reg **reg_list[], int
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(*reg_list)[25] = &armv7m->core_cache->reg_list[ARMV7M_xPSR];
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#endif
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+#else
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+ *reg_list_size = 17;
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+ *reg_list = malloc(sizeof(struct reg*) * (*reg_list_size));
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+
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+ /*
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+ * GDB register packet format for ARM:
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+ * - the first 16 registers are r0..r15
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+ * - followed by xPSR
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+ */
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+ for (i = 0; i < *reg_list_size; i++)
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+ {
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+ (*reg_list)[i] = &armv7m->core_cache->reg_list[i];
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+ }
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+#endif
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+
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return ERROR_OK;
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}
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--
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1.7.1
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