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50b74fa90c
The F4 CPUs have 16KB x 4, 64KB x 1 and 128KB x 7 sectors of flash. The FW image currently ends in the middle of a 128KB sector. FW_BANK is now increased to end on a sector boundary.
25 lines
772 B
Makefile
25 lines
772 B
Makefile
BOARD_TYPE := 0x09
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BOARD_REVISION := 0x01
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BOOTLOADER_VERSION := 0x01
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HW_TYPE := 0x00
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MCU := cortex-m4
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CHIP := STM32F405RGT
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BOARD := STM32F4xx_OP
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MODEL := HD
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MODEL_SUFFIX :=
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OPENOCD_JTAG_CONFIG := stlink-v2.cfg
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OPENOCD_CONFIG := stm32f4xx.stlink.cfg
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# Note: These must match the values in link_$(BOARD)_memory.ld
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BL_BANK_BASE := 0x08000000 # Start of bootloader flash
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BL_BANK_SIZE := 0x00008000 # Should include BD_INFO region
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FW_BANK_BASE := 0x08008000 # Start of firmware flash
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FW_BANK_SIZE := 0x00038000 # Should include FW_DESC_SIZE
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FW_DESC_SIZE := 0x00000064
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OSCILLATOR_FREQ := 8000000
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SYSCLK_FREQ := 168000000
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