mirror of
https://bitbucket.org/librepilot/librepilot.git
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7598e898fa
- use IRQStack for ISRs (at begening of SRAM) (let's call it the irq stack) - use end of heap for stack needed during initialization (let's call it the init stack). - the systemStats in GCS indicate the remaining bytes in the IRQ stack (this is realy usefull to monitor our (nested) IRQs. This is the base ground to provide as much memory as possible available at task creation time. Next step is to re-organize the initialization in order to move all the init out of the thread's stacks onto the init stack. This will provide as much memory as possible available at task creation time. Basically the stack during initialization will be destroyed once the scheduler starts and dynamic alloc are made (since the init stack is at the end of the heap). We will need to make sure we don't clobber the heap during initialization otherwise this will lead to stack corruption.
133 lines
3.7 KiB
Plaintext
133 lines
3.7 KiB
Plaintext
/* This is the size of the stack for early init and for all FreeRTOS IRQs */
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_irq_stack_size = 0x180;
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/* Stub out these functions since we don't use them anyway */
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PROVIDE ( vPortSVCHandler = 0 ) ;
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PROVIDE ( xPortPendSVHandler = 0 ) ;
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PROVIDE ( xPortSysTickHandler = 0 ) ;
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PROVIDE(pios_board_info_blob = ORIGIN(BD_INFO));
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_estack = 0x20004FF0;
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/* Section Definitions */
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SECTIONS
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{
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.text :
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{
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PROVIDE (pios_isr_vector_table_base = .);
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KEEP(*(.isr_vector .isr_vector.*))
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*(.text .text.* .gnu.linkonce.t.*)
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*(.glue_7t) *(.glue_7)
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*(.rodata .rodata* .gnu.linkonce.r.*)
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} > FLASH
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/* init sections */
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.initcalluavobj.init :
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{
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. = ALIGN(4);
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__uavobj_initcall_start = .;
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KEEP(*(.initcalluavobj.init))
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. = ALIGN(4);
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__uavobj_initcall_end = .;
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} >FLASH
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.ARM.extab :
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{
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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} > FLASH
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.ARM.exidx :
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{
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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} > FLASH
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. = ALIGN(4);
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_etext = .;
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_sidata = .;
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/*
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* This stack is used both as the initial sp during early init as well as ultimately
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* being used as the STM32's MSP (Main Stack Pointer) which is the same stack that
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* is used for _all_ interrupt handlers. The end of this stack should be placed
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* against the lowest address in RAM so that a stack overrun results in a hard fault
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* at the first access beyond the end of the stack.
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*/
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.irq_stack :
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{
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. = ALIGN(4);
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_irq_stack_end = . ;
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. = . + _irq_stack_size ;
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. = ALIGN(4);
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_irq_stack_top = . - 4 ;
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. = ALIGN(4);
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} > SRAM
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.data : AT (_etext)
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{
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_sdata = .;
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*(.data .data.*)
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. = ALIGN(4);
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_edata = . ;
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} > SRAM
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/* .bss section which is used for uninitialized data */
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.bss (NOLOAD) :
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{
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_sbss = . ;
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*(.bss .bss.*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = . ;
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} > SRAM
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.heap (NOLOAD) :
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{
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_sheap = . ;
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*(.heap)
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. = ALIGN(4);
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_eheap = . ;
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_init_stack_top = . - 4 ;
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. = ALIGN(4);
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} > SRAM
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. = ALIGN(4);
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_end = . ;
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/* Stabs debugging sections. */
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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.stab.excl 0 : { *(.stab.excl) }
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.stab.exclstr 0 : { *(.stab.exclstr) }
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.stab.index 0 : { *(.stab.index) }
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.stab.indexstr 0 : { *(.stab.indexstr) }
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.comment 0 : { *(.comment) }
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/* DWARF debug sections.
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Symbols in the DWARF debugging sections are relative to the beginning
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of the section so we begin them at 0. */
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/* DWARF 1 */
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.debug 0 : { *(.debug) }
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.line 0 : { *(.line) }
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/* GNU DWARF 1 extensions */
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.debug_srcinfo 0 : { *(.debug_srcinfo) }
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.debug_sfnames 0 : { *(.debug_sfnames) }
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/* DWARF 1.1 and DWARF 2 */
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.debug_aranges 0 : { *(.debug_aranges) }
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.debug_pubnames 0 : { *(.debug_pubnames) }
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/* DWARF 2 */
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.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
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.debug_abbrev 0 : { *(.debug_abbrev) }
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.debug_line 0 : { *(.debug_line) }
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.debug_frame 0 : { *(.debug_frame) }
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.debug_str 0 : { *(.debug_str) }
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.debug_loc 0 : { *(.debug_loc) }
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.debug_macinfo 0 : { *(.debug_macinfo) }
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/* SGI/MIPS DWARF 2 extensions */
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.debug_weaknames 0 : { *(.debug_weaknames) }
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.debug_funcnames 0 : { *(.debug_funcnames) }
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.debug_typenames 0 : { *(.debug_typenames) }
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.debug_varnames 0 : { *(.debug_varnames) }
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}
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