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151 lines
4.6 KiB
C
151 lines
4.6 KiB
C
/**
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******************************************************************************
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*
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* @file pios_board.c
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* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2010.
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* @brief Defines board specific static initializers for hardware for the AHRS board.
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* @see The GNU Public License (GPL) Version 3
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*
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*****************************************************************************/
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <pios.h>
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#if defined(PIOS_INCLUDE_SPI)
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#include <pios_spi_priv.h>
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/* OP Interface
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*
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* NOTE: Leave this declared as const data so that it ends up in the
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* .rodata section (ie. Flash) rather than in the .bss section (RAM).
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*/
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void PIOS_SPI_op_irq_handler(void);
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void DMA1_Channel5_IRQHandler() __attribute__ ((alias ("PIOS_SPI_op_irq_handler")));
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void DMA1_Channel4_IRQHandler() __attribute__ ((alias ("PIOS_SPI_op_irq_handler")));
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static const struct pios_spi_cfg pios_spi_op_cfg = {
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.regs = SPI2,
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.init = {
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.SPI_Mode = SPI_Mode_Slave,
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.SPI_Direction = SPI_Direction_2Lines_FullDuplex,
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.SPI_DataSize = SPI_DataSize_8b,
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.SPI_NSS = SPI_NSS_Hard,
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.SPI_FirstBit = SPI_FirstBit_MSB,
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.SPI_CRCPolynomial = 7,
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.SPI_CPOL = SPI_CPOL_High,
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.SPI_CPHA = SPI_CPHA_2Edge,
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},
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.use_crc = TRUE,
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.dma = {
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.ahb_clk = RCC_AHBPeriph_DMA1,
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.irq = {
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.handler = PIOS_SPI_op_irq_handler,
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.flags = (DMA1_FLAG_TC4 | DMA1_FLAG_TE4 | DMA1_FLAG_HT4 | DMA1_FLAG_GL4),
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.init = {
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.NVIC_IRQChannel = DMA1_Channel4_IRQn,
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.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_HIGH,
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.NVIC_IRQChannelSubPriority = 0,
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.NVIC_IRQChannelCmd = ENABLE,
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},
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},
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.rx = {
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.channel = DMA1_Channel4,
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.init = {
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.DMA_PeripheralBaseAddr = (uint32_t)&(SPI2->DR),
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.DMA_DIR = DMA_DIR_PeripheralSRC,
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.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
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.DMA_MemoryInc = DMA_MemoryInc_Enable,
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.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
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.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
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.DMA_Mode = DMA_Mode_Normal,
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.DMA_Priority = DMA_Priority_Medium,
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.DMA_M2M = DMA_M2M_Disable,
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},
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},
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.tx = {
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.channel = DMA1_Channel5,
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.init = {
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.DMA_PeripheralBaseAddr = (uint32_t)&(SPI2->DR),
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.DMA_DIR = DMA_DIR_PeripheralDST,
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.DMA_PeripheralInc = DMA_PeripheralInc_Disable,
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.DMA_MemoryInc = DMA_MemoryInc_Enable,
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.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte,
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.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte,
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.DMA_Mode = DMA_Mode_Normal,
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.DMA_Priority = DMA_Priority_Medium,
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.DMA_M2M = DMA_M2M_Disable,
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},
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},
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},
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.ssel = {
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.gpio = GPIOB,
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.init = {
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.GPIO_Pin = GPIO_Pin_12,
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.GPIO_Speed = GPIO_Speed_50MHz,
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.GPIO_Mode = GPIO_Mode_IN_FLOATING,
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},
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},
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.sclk = {
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.gpio = GPIOB,
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.init = {
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.GPIO_Pin = GPIO_Pin_13,
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.GPIO_Speed = GPIO_Speed_50MHz,
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.GPIO_Mode = GPIO_Mode_IN_FLOATING,
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},
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},
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.miso = {
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.gpio = GPIOB,
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.init = {
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.GPIO_Pin = GPIO_Pin_14,
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.GPIO_Speed = GPIO_Speed_50MHz,
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.GPIO_Mode = GPIO_Mode_AF_PP,
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},
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},
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.mosi = {
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.gpio = GPIOB,
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.init = {
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.GPIO_Pin = GPIO_Pin_15,
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.GPIO_Speed = GPIO_Speed_50MHz,
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.GPIO_Mode = GPIO_Mode_IN_FLOATING,
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},
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},
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};
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uint32_t pios_spi_op_id;
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void PIOS_SPI_op_irq_handler(void)
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{
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/* Call into the generic code to handle the IRQ for this specific device */
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PIOS_SPI_IRQ_Handler(pios_spi_op_id);
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}
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#endif /* PIOS_INCLUDE_SPI */
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#include "bl_fsm.h" /* lfsm_* */
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void PIOS_Board_Init()
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{
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/* Set up the SPI interface to the OP board */
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if (PIOS_SPI_Init(&pios_spi_op_id, &pios_spi_op_cfg)) {
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PIOS_DEBUG_Assert(0);
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}
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lfsm_attach(pios_spi_op_id);
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lfsm_init();
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}
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