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570 lines
16 KiB
C
570 lines
16 KiB
C
/**
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******************************************************************************
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*
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* @addtogroup PIOS PIOS Core hardware abstraction layer
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* @{
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* @addtogroup PIOS_FLASH Flash device handler
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* @{
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*
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* @file pios_flash_w25x.c
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* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2010.
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* @author PhoenixPilot, http://github.com/PhoenixPilot, Copyright (C) 2012
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* @brief Driver for talking to W25X flash chip (and most JEDEC chips)
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* @see The GNU Public License (GPL) Version 3
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*
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*****************************************************************************/
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "pios.h"
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#ifdef PIOS_INCLUDE_FLASH
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#include "pios_flash_jedec_priv.h"
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#define JEDEC_WRITE_ENABLE 0x06
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#define JEDEC_WRITE_DISABLE 0x04
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#define JEDEC_READ_STATUS 0x05
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#define JEDEC_WRITE_STATUS 0x01
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#define JEDEC_READ_DATA 0x03
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#define JEDEC_FAST_READ 0x0b
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#define JEDEC_DEVICE_ID 0x9F
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#define JEDEC_PAGE_WRITE 0x02
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#define JEDEC_STATUS_BUSY 0x01
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#define JEDEC_STATUS_WRITEPROTECT 0x02
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#define JEDEC_STATUS_BP0 0x04
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#define JEDEC_STATUS_BP1 0x08
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#define JEDEC_STATUS_BP2 0x10
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#define JEDEC_STATUS_TP 0x20
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#define JEDEC_STATUS_SEC 0x40
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#define JEDEC_STATUS_SRP0 0x80
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enum pios_jedec_dev_magic {
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PIOS_JEDEC_DEV_MAGIC = 0xcb55aa55,
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};
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//! Device handle structure
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struct jedec_flash_dev {
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uint32_t spi_id;
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uint32_t slave_num;
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bool claimed;
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uint8_t manufacturer;
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uint8_t memorytype;
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uint8_t capacity;
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const struct pios_flash_jedec_cfg * cfg;
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#if defined(FLASH_FREERTOS)
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xSemaphoreHandle transaction_lock;
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#endif
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enum pios_jedec_dev_magic magic;
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};
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//! Private functions
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static int32_t PIOS_Flash_Jedec_Validate(struct jedec_flash_dev * flash_dev);
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static struct jedec_flash_dev * PIOS_Flash_Jedec_alloc(void);
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static int32_t PIOS_Flash_Jedec_ReadID(struct jedec_flash_dev * flash_dev);
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static int32_t PIOS_Flash_Jedec_ReadStatus(struct jedec_flash_dev * flash_dev);
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static int32_t PIOS_Flash_Jedec_ClaimBus(struct jedec_flash_dev * flash_dev);
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static int32_t PIOS_Flash_Jedec_ReleaseBus(struct jedec_flash_dev * flash_dev);
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static int32_t PIOS_Flash_Jedec_WriteEnable(struct jedec_flash_dev * flash_dev);
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static int32_t PIOS_Flash_Jedec_Busy(struct jedec_flash_dev * flash_dev);
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/**
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* @brief Allocate a new device
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*/
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static struct jedec_flash_dev * PIOS_Flash_Jedec_alloc(void)
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{
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struct jedec_flash_dev * flash_dev;
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flash_dev = (struct jedec_flash_dev *)pvPortMalloc(sizeof(*flash_dev));
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if (!flash_dev) return (NULL);
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flash_dev->claimed = false;
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flash_dev->magic = PIOS_JEDEC_DEV_MAGIC;
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#if defined(FLASH_FREERTOS)
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flash_dev->transaction_lock = xSemaphoreCreateMutex();
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#endif
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return(flash_dev);
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}
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/**
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* @brief Validate the handle to the spi device
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*/
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static int32_t PIOS_Flash_Jedec_Validate(struct jedec_flash_dev * flash_dev) {
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if (flash_dev == NULL)
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return -1;
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if (flash_dev->magic != PIOS_JEDEC_DEV_MAGIC)
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return -2;
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if (flash_dev->spi_id == 0)
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return -3;
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return 0;
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}
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/**
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* @brief Initialize the flash device and enable write access
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*/
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int32_t PIOS_Flash_Jedec_Init(uintptr_t * flash_id, uint32_t spi_id, uint32_t slave_num, const struct pios_flash_jedec_cfg * cfg)
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{
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struct jedec_flash_dev * flash_dev = PIOS_Flash_Jedec_alloc();
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if (flash_dev == NULL)
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return -1;
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flash_dev->spi_id = spi_id;
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flash_dev->slave_num = slave_num;
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flash_dev->cfg = cfg;
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(void) PIOS_Flash_Jedec_ReadID(flash_dev);
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if ((flash_dev->manufacturer != flash_dev->cfg->expect_manufacturer) ||
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(flash_dev->memorytype != flash_dev->cfg->expect_memorytype) ||
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(flash_dev->capacity != flash_dev->cfg->expect_capacity)) {
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/* Mismatched device has been discovered */
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return -1;
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}
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/* Give back a handle to this flash device */
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*flash_id = (uintptr_t) flash_dev;
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return 0;
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}
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/**
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* @brief Claim the SPI bus for flash use and assert CS pin
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* @return 0 for sucess, -1 for failure to get semaphore
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*/
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static int32_t PIOS_Flash_Jedec_ClaimBus(struct jedec_flash_dev * flash_dev)
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{
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if (PIOS_SPI_ClaimBus(flash_dev->spi_id) < 0)
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return -1;
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PIOS_SPI_RC_PinSet(flash_dev->spi_id, flash_dev->slave_num, 0);
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flash_dev->claimed = true;
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return 0;
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}
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/**
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* @brief Release the SPI bus sempahore and ensure flash chip not using bus
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*/
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static int32_t PIOS_Flash_Jedec_ReleaseBus(struct jedec_flash_dev * flash_dev)
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{
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PIOS_SPI_RC_PinSet(flash_dev->spi_id, flash_dev->slave_num, 1);
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PIOS_SPI_ReleaseBus(flash_dev->spi_id);
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flash_dev->claimed = false;
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return 0;
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}
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/**
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* @brief Returns if the flash chip is busy
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* @returns -1 for failure, 0 for not busy, 1 for busy
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*/
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static int32_t PIOS_Flash_Jedec_Busy(struct jedec_flash_dev * flash_dev)
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{
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int32_t status = PIOS_Flash_Jedec_ReadStatus(flash_dev);
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if (status < 0)
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return -1;
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return status & JEDEC_STATUS_BUSY;
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}
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/**
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* @brief Execute the write enable instruction and returns the status
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* @returns 0 if successful, -1 if unable to claim bus
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*/
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static int32_t PIOS_Flash_Jedec_WriteEnable(struct jedec_flash_dev * flash_dev)
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{
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if (PIOS_Flash_Jedec_ClaimBus(flash_dev) != 0)
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return -1;
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uint8_t out[] = {JEDEC_WRITE_ENABLE};
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PIOS_SPI_TransferBlock(flash_dev->spi_id,out,NULL,sizeof(out),NULL);
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PIOS_Flash_Jedec_ReleaseBus(flash_dev);
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return 0;
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}
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/**
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* @brief Read the status register from flash chip and return it
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*/
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static int32_t PIOS_Flash_Jedec_ReadStatus(struct jedec_flash_dev * flash_dev)
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{
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if (PIOS_Flash_Jedec_ClaimBus(flash_dev) < 0)
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return -1;
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uint8_t out[2] = {JEDEC_READ_STATUS, 0};
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uint8_t in[2] = {0,0};
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if (PIOS_SPI_TransferBlock(flash_dev->spi_id,out,in,sizeof(out),NULL) < 0) {
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PIOS_Flash_Jedec_ReleaseBus(flash_dev);
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return -2;
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}
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PIOS_Flash_Jedec_ReleaseBus(flash_dev);
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return in[1];
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}
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/**
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* @brief Read the status register from flash chip and return it
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*/
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static int32_t PIOS_Flash_Jedec_ReadID(struct jedec_flash_dev * flash_dev)
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{
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if (PIOS_Flash_Jedec_ClaimBus(flash_dev) < 0)
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return -2;
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uint8_t out[] = {JEDEC_DEVICE_ID, 0, 0, 0};
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uint8_t in[4];
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if (PIOS_SPI_TransferBlock(flash_dev->spi_id,out,in,sizeof(out),NULL) < 0) {
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PIOS_Flash_Jedec_ReleaseBus(flash_dev);
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return -3;
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}
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PIOS_Flash_Jedec_ReleaseBus(flash_dev);
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flash_dev->manufacturer = in[1];
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flash_dev->memorytype = in[2];
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flash_dev->capacity = in[3];
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return flash_dev->manufacturer;
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}
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/**********************************
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*
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* Provide a PIOS flash driver API
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*
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*********************************/
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#include "pios_flash.h"
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#if FLASH_USE_FREERTOS_LOCKS
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/**
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* @brief Grab the semaphore to perform a transaction
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* @return 0 for success, -1 for timeout
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*/
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static int32_t PIOS_Flash_Jedec_StartTransaction(uintptr_t flash_id)
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{
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struct jedec_flash_dev * flash_dev = (struct jedec_flash_dev *)flash_id;
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if (PIOS_Flash_Jedec_Validate(flash_dev) != 0)
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return -1;
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#if defined(PIOS_INCLUDE_FREERTOS)
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if (xSemaphoreTake(flash_dev->transaction_lock, portMAX_DELAY) != pdTRUE)
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return -2;
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#endif
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return 0;
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}
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/**
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* @brief Release the semaphore to perform a transaction
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* @return 0 for success, -1 for timeout
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*/
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static int32_t PIOS_Flash_Jedec_EndTransaction(uintptr_t flash_id)
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{
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struct jedec_flash_dev * flash_dev = (struct jedec_flash_dev *)flash_id;
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if (PIOS_Flash_Jedec_Validate(flash_dev) != 0)
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return -1;
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#if defined(PIOS_INCLUDE_FREERTOS)
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if (xSemaphoreGive(flash_dev->transaction_lock) != pdTRUE)
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return -2;
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#endif
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return 0;
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}
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#else /* FLASH_USE_FREERTOS_LOCKS */
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static int32_t PIOS_Flash_Jedec_StartTransaction(uintptr_t flash_id)
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{
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return 0;
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}
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static int32_t PIOS_Flash_Jedec_EndTransaction(uintptr_t flash_id)
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{
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return 0;
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}
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#endif /* FLASH_USE_FREERTOS_LOCKS */
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/**
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* @brief Erase a sector on the flash chip
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* @param[in] add Address of flash to erase
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* @returns 0 if successful
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* @retval -1 if unable to claim bus
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* @retval
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*/
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static int32_t PIOS_Flash_Jedec_EraseSector(uintptr_t flash_id, uint32_t addr)
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{
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struct jedec_flash_dev * flash_dev = (struct jedec_flash_dev *)flash_id;
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if (PIOS_Flash_Jedec_Validate(flash_dev) != 0)
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return -1;
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uint8_t ret;
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uint8_t out[] = {flash_dev->cfg->sector_erase, (addr >> 16) & 0xff, (addr >> 8) & 0xff , addr & 0xff};
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if ((ret = PIOS_Flash_Jedec_WriteEnable(flash_dev)) != 0)
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return ret;
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if (PIOS_Flash_Jedec_ClaimBus(flash_dev) != 0)
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return -1;
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if (PIOS_SPI_TransferBlock(flash_dev->spi_id,out,NULL,sizeof(out),NULL) < 0) {
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PIOS_Flash_Jedec_ReleaseBus(flash_dev);
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return -2;
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}
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PIOS_Flash_Jedec_ReleaseBus(flash_dev);
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// Keep polling when bus is busy too
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while (PIOS_Flash_Jedec_Busy(flash_dev) != 0) {
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#if defined(FLASH_FREERTOS)
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vTaskDelay(1);
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#endif
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}
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return 0;
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}
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/**
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* @brief Execute the whole chip
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* @returns 0 if successful, -1 if unable to claim bus
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*/
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static int32_t PIOS_Flash_Jedec_EraseChip(uintptr_t flash_id)
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{
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struct jedec_flash_dev * flash_dev = (struct jedec_flash_dev *)flash_id;
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if (PIOS_Flash_Jedec_Validate(flash_dev) != 0)
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return -1;
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uint8_t ret;
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uint8_t out[] = {flash_dev->cfg->chip_erase};
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if ((ret = PIOS_Flash_Jedec_WriteEnable(flash_dev)) != 0)
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return ret;
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if (PIOS_Flash_Jedec_ClaimBus(flash_dev) != 0)
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return -1;
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if (PIOS_SPI_TransferBlock(flash_dev->spi_id,out,NULL,sizeof(out),NULL) < 0) {
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PIOS_Flash_Jedec_ReleaseBus(flash_dev);
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return -2;
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}
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PIOS_Flash_Jedec_ReleaseBus(flash_dev);
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// Keep polling when bus is busy too
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int i = 0;
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while (PIOS_Flash_Jedec_Busy(flash_dev) != 0) {
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#if defined(FLASH_FREERTOS)
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vTaskDelay(1);
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if ((i++) % 100 == 0)
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#else
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if ((i++) % 10000 == 0)
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#endif
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PIOS_LED_Toggle(PIOS_LED_HEARTBEAT);
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}
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return 0;
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}
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/**
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* @brief Write one page of data (up to 256 bytes) aligned to a page start
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* @param[in] addr Address in flash to write to
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* @param[in] data Pointer to data to write to flash
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* @param[in] len Length of data to write (max 256 bytes)
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* @return Zero if success or error code
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* @retval -1 Unable to claim SPI bus
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* @retval -2 Size exceeds 256 bytes
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* @retval -3 Length to write would wrap around page boundary
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*/
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static int32_t PIOS_Flash_Jedec_WriteData(uintptr_t flash_id, uint32_t addr, uint8_t * data, uint16_t len)
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{
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struct jedec_flash_dev * flash_dev = (struct jedec_flash_dev *)flash_id;
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if(PIOS_Flash_Jedec_Validate(flash_dev) != 0)
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return -1;
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uint8_t ret;
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uint8_t out[4] = {JEDEC_PAGE_WRITE, (addr >> 16) & 0xff, (addr >> 8) & 0xff , addr & 0xff};
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/* Can only write one page at a time */
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if (len > 0x100)
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return -2;
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/* Ensure number of bytes fits after starting address before end of page */
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if (((addr & 0xff) + len) > 0x100)
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return -3;
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if ((ret = PIOS_Flash_Jedec_WriteEnable(flash_dev)) != 0)
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return ret;
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/* Execute write page command and clock in address. Keep CS asserted */
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if (PIOS_Flash_Jedec_ClaimBus(flash_dev) != 0)
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return -1;
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if (PIOS_SPI_TransferBlock(flash_dev->spi_id,out,NULL,sizeof(out),NULL) < 0) {
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PIOS_Flash_Jedec_ReleaseBus(flash_dev);
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return -1;
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}
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/* Clock out data to flash */
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if (PIOS_SPI_TransferBlock(flash_dev->spi_id,data,NULL,len,NULL) < 0) {
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PIOS_Flash_Jedec_ReleaseBus(flash_dev);
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return -1;
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}
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PIOS_Flash_Jedec_ReleaseBus(flash_dev);
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// Keep polling when bus is busy too
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#if defined(FLASH_FREERTOS)
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while (PIOS_Flash_Jedec_Busy(flash_dev) != 0) {
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vTaskDelay(1);
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}
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#else
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// Query status this way to prevent accel chip locking us out
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if (PIOS_Flash_Jedec_ClaimBus(flash_dev) < 0)
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return -1;
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PIOS_SPI_TransferByte(flash_dev->spi_id, JEDEC_READ_STATUS);
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while (PIOS_SPI_TransferByte(flash_dev->spi_id, JEDEC_READ_STATUS) & JEDEC_STATUS_BUSY);
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PIOS_Flash_Jedec_ReleaseBus(flash_dev);
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#endif
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return 0;
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}
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/**
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* @brief Write multiple chunks of data in one transaction
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* @param[in] addr Address in flash to write to
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* @param[in] data Pointer to data to write to flash
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* @param[in] len Length of data to write (max 256 bytes)
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* @return Zero if success or error code
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* @retval -1 Unable to claim SPI bus
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* @retval -2 Size exceeds 256 bytes
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* @retval -3 Length to write would wrap around page boundary
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*/
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static int32_t PIOS_Flash_Jedec_WriteChunks(uintptr_t flash_id, uint32_t addr, struct pios_flash_chunk chunks[], uint32_t num)
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{
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struct jedec_flash_dev * flash_dev = (struct jedec_flash_dev *)flash_id;
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if (PIOS_Flash_Jedec_Validate(flash_dev) != 0)
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return -1;
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uint8_t ret;
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uint8_t out[4] = {JEDEC_PAGE_WRITE, (addr >> 16) & 0xff, (addr >> 8) & 0xff , addr & 0xff};
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/* Can only write one page at a time */
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uint32_t len = 0;
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for (uint32_t i = 0; i < num; i++)
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len += chunks[i].len;
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if (len > 0x100)
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return -2;
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/* Ensure number of bytes fits after starting address before end of page */
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if (((addr & 0xff) + len) > 0x100)
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return -3;
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if ((ret = PIOS_Flash_Jedec_WriteEnable(flash_dev)) != 0)
|
|
return ret;
|
|
|
|
/* Execute write page command and clock in address. Keep CS asserted */
|
|
if (PIOS_Flash_Jedec_ClaimBus(flash_dev) != 0)
|
|
return -1;
|
|
|
|
if (PIOS_SPI_TransferBlock(flash_dev->spi_id,out,NULL,sizeof(out),NULL) < 0) {
|
|
PIOS_Flash_Jedec_ReleaseBus(flash_dev);
|
|
return -1;
|
|
}
|
|
|
|
for (uint32_t i = 0; i < num; i++) {
|
|
struct pios_flash_chunk * chunk = &chunks[i];
|
|
|
|
/* Clock out data to flash */
|
|
if (PIOS_SPI_TransferBlock(flash_dev->spi_id,chunk->addr,NULL,chunk->len,NULL) < 0) {
|
|
PIOS_Flash_Jedec_ReleaseBus(flash_dev);
|
|
return -1;
|
|
}
|
|
|
|
}
|
|
PIOS_Flash_Jedec_ReleaseBus(flash_dev);
|
|
|
|
// Skip checking for busy with this to get OS running again fast
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* @brief Read data from a location in flash memory
|
|
* @param[in] addr Address in flash to write to
|
|
* @param[in] data Pointer to data to write from flash
|
|
* @param[in] len Length of data to write (max 256 bytes)
|
|
* @return Zero if success or error code
|
|
* @retval -1 Unable to claim SPI bus
|
|
*/
|
|
static int32_t PIOS_Flash_Jedec_ReadData(uintptr_t flash_id, uint32_t addr, uint8_t * data, uint16_t len)
|
|
{
|
|
struct jedec_flash_dev * flash_dev = (struct jedec_flash_dev *)flash_id;
|
|
|
|
if (PIOS_Flash_Jedec_Validate(flash_dev) != 0)
|
|
return -1;
|
|
|
|
if (PIOS_Flash_Jedec_ClaimBus(flash_dev) == -1)
|
|
return -1;
|
|
|
|
/* Execute read command and clock in address. Keep CS asserted */
|
|
uint8_t out[] = {JEDEC_READ_DATA, (addr >> 16) & 0xff, (addr >> 8) & 0xff , addr & 0xff};
|
|
|
|
if (PIOS_SPI_TransferBlock(flash_dev->spi_id,out,NULL,sizeof(out),NULL) < 0) {
|
|
PIOS_Flash_Jedec_ReleaseBus(flash_dev);
|
|
return -2;
|
|
}
|
|
|
|
/* Copy the transfer data to the buffer */
|
|
if (PIOS_SPI_TransferBlock(flash_dev->spi_id,NULL,data,len,NULL) < 0) {
|
|
PIOS_Flash_Jedec_ReleaseBus(flash_dev);
|
|
return -3;
|
|
}
|
|
|
|
PIOS_Flash_Jedec_ReleaseBus(flash_dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* Provide a flash driver to external drivers */
|
|
const struct pios_flash_driver pios_jedec_flash_driver = {
|
|
.start_transaction = PIOS_Flash_Jedec_StartTransaction,
|
|
.end_transaction = PIOS_Flash_Jedec_EndTransaction,
|
|
.erase_chip = PIOS_Flash_Jedec_EraseChip,
|
|
.erase_sector = PIOS_Flash_Jedec_EraseSector,
|
|
.write_chunks = PIOS_Flash_Jedec_WriteChunks,
|
|
.write_data = PIOS_Flash_Jedec_WriteData,
|
|
.read_data = PIOS_Flash_Jedec_ReadData,
|
|
};
|
|
|
|
#endif /* PIOS_INCLUDE_FLASH */
|