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298 lines
9.3 KiB
C
298 lines
9.3 KiB
C
/**
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******************************************************************************
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* @addtogroup PIOS PIOS Core hardware abstraction layer
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* @{
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* @addtogroup PIOS_HCSR04 HCSR04 Functions
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* @brief Hardware functions to deal with the altitude pressure sensor
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* @{
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*
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* @file pios_hcsr04.c
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* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2010.
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* @brief HCSR04 sonar Sensor Routines
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* @see The GNU Public License (GPL) Version 3
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*
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******************************************************************************/
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "pios.h"
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#include "pios_hcsr04_priv.h"
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#ifdef PIOS_INCLUDE_HCSR04
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#if !(defined(PIOS_INCLUDE_DSM) || defined(PIOS_INCLUDE_SBUS))
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#error Only supported with Spektrum/JR DSM or S.Bus interface
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#endif
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/* Local Variables */
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/* 100 ms timeout without updates on channels */
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const static uint32_t PWM_SUPERVISOR_TIMEOUT = 100000;
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struct pios_hcsr04_dev *hcsr04_dev_loc;
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enum pios_hcsr04_dev_magic {
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PIOS_HCSR04_DEV_MAGIC = 0xab3029AA,
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};
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struct pios_hcsr04_dev {
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enum pios_hcsr04_dev_magic magic;
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const struct pios_hcsr04_cfg *cfg;
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uint8_t CaptureState[PIOS_PWM_NUM_INPUTS];
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uint16_t RiseValue[PIOS_PWM_NUM_INPUTS];
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uint16_t FallValue[PIOS_PWM_NUM_INPUTS];
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uint32_t CaptureValue[PIOS_PWM_NUM_INPUTS];
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uint32_t CapCounter[PIOS_PWM_NUM_INPUTS];
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uint32_t us_since_update[PIOS_PWM_NUM_INPUTS];
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};
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static bool PIOS_HCSR04_validate(struct pios_hcsr04_dev *hcsr04_dev)
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{
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return hcsr04_dev->magic == PIOS_HCSR04_DEV_MAGIC;
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}
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#if defined(PIOS_INCLUDE_FREERTOS)
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static struct pios_hcsr04_dev *PIOS_PWM_alloc(void)
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{
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struct pios_hcsr04_dev *hcsr04_dev;
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hcsr04_dev = (struct pios_hcsr04_dev *)pvPortMalloc(sizeof(*hcsr04_dev));
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if (!hcsr04_dev) {
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return NULL;
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}
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hcsr04_dev->magic = PIOS_HCSR04_DEV_MAGIC;
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return hcsr04_dev;
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}
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#else
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static struct pios_hcsr04_dev pios_hcsr04_devs[PIOS_PWM_MAX_DEVS];
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static uint8_t pios_hcsr04_num_devs;
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static struct pios_hcsr04_dev *PIOS_PWM_alloc(void)
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{
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struct pios_hcsr04_dev *hcsr04_dev;
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if (pios_pwm_num_devs >= PIOS_PWM_MAX_DEVS) {
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return NULL;
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}
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hcsr04_dev = &pios_hcsr04_devs[pios_hcsr04_num_devs++];
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hcsr04_dev->magic = PIOS_HCSR04_DEV_MAGIC;
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return hcsr04_dev;
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}
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#endif /* if defined(PIOS_INCLUDE_FREERTOS) */
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static void PIOS_HCSR04_tim_overflow_cb(uint32_t id, uint32_t context, uint8_t channel, uint16_t count);
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static void PIOS_HCSR04_tim_edge_cb(uint32_t id, uint32_t context, uint8_t channel, uint16_t count);
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const static struct pios_tim_callbacks tim_callbacks = {
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.overflow = PIOS_HCSR04_tim_overflow_cb,
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.edge = PIOS_HCSR04_tim_edge_cb,
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};
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/**
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* Initialises all the pins
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*/
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int32_t PIOS_HCSR04_Init(uint32_t *pwm_id, const struct pios_hcsr04_cfg *cfg)
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{
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PIOS_DEBUG_Assert(pwm_id);
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PIOS_DEBUG_Assert(cfg);
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struct pios_hcsr04_dev *hcsr04_dev;
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hcsr04_dev = (struct pios_hcsr04_dev *)PIOS_PWM_alloc();
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if (!hcsr04_dev) {
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goto out_fail;
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}
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/* Bind the configuration to the device instance */
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hcsr04_dev->cfg = cfg;
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hcsr04_dev_loc = hcsr04_dev;
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for (uint8_t i = 0; i < PIOS_PWM_NUM_INPUTS; i++) {
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/* Flush counter variables */
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hcsr04_dev->CaptureState[i] = 0;
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hcsr04_dev->RiseValue[i] = 0;
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hcsr04_dev->FallValue[i] = 0;
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hcsr04_dev->CaptureValue[i] = PIOS_RCVR_TIMEOUT;
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}
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uint32_t tim_id;
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if (PIOS_TIM_InitChannels(&tim_id, cfg->channels, cfg->num_channels, &tim_callbacks, (uint32_t)hcsr04_dev)) {
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return -1;
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}
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/* Configure the channels to be in capture/compare mode */
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for (uint8_t i = 0; i < cfg->num_channels; i++) {
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const struct pios_tim_channel *chan = &cfg->channels[i];
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/* Configure timer for input capture */
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TIM_ICInitTypeDef TIM_ICInitStructure = cfg->tim_ic_init;
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TIM_ICInitStructure.TIM_Channel = chan->timer_chan;
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TIM_ICInit(chan->timer, &TIM_ICInitStructure);
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/* Enable the Capture Compare Interrupt Request */
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switch (chan->timer_chan) {
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case TIM_Channel_1:
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TIM_ITConfig(chan->timer, TIM_IT_CC1, ENABLE);
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break;
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case TIM_Channel_2:
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TIM_ITConfig(chan->timer, TIM_IT_CC2, ENABLE);
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break;
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case TIM_Channel_3:
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TIM_ITConfig(chan->timer, TIM_IT_CC3, ENABLE);
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break;
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case TIM_Channel_4:
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TIM_ITConfig(chan->timer, TIM_IT_CC4, ENABLE);
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break;
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}
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// Need the update event for that timer to detect timeouts
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TIM_ITConfig(chan->timer, TIM_IT_Update, ENABLE);
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}
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#ifndef STM32F4XX
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/* Enable the peripheral clock for the GPIO */
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switch ((uint32_t)hcsr04_dev->cfg->trigger.gpio) {
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case (uint32_t)GPIOA:
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
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break;
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case (uint32_t)GPIOB:
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
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break;
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case (uint32_t)GPIOC:
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE);
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break;
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default:
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PIOS_Assert(0);
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break;
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}
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#endif
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GPIO_Init(hcsr04_dev->cfg->trigger.gpio, &hcsr04_dev->cfg->trigger.init);
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*pwm_id = (uint32_t)hcsr04_dev;
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return 0;
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out_fail:
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return -1;
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}
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void PIOS_HCSR04_Trigger(void)
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{
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GPIO_SetBits(hcsr04_dev_loc->cfg->trigger.gpio, hcsr04_dev_loc->cfg->trigger.init.GPIO_Pin);
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PIOS_DELAY_WaituS(15);
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GPIO_ResetBits(hcsr04_dev_loc->cfg->trigger.gpio, hcsr04_dev_loc->cfg->trigger.init.GPIO_Pin);
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}
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/**
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* Get the value of an input channel
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* \param[in] Channel Number of the channel desired
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* \output -1 Channel not available
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* \output >0 Channel value
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*/
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int32_t PIOS_HCSR04_Get(void)
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{
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return hcsr04_dev_loc->CaptureValue[0];
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}
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int32_t PIOS_HCSR04_Completed(void)
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{
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return hcsr04_dev_loc->CapCounter[0];
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}
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static void PIOS_HCSR04_tim_overflow_cb(uint32_t tim_id, uint32_t context, uint8_t channel, uint16_t count)
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{
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struct pios_hcsr04_dev *hcsr04_dev = (struct pios_hcsr04_dev *)context;
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if (!PIOS_HCSR04_validate(hcsr04_dev)) {
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/* Invalid device specified */
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return;
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}
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if (channel >= hcsr04_dev->cfg->num_channels) {
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/* Channel out of range */
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return;
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}
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hcsr04_dev->us_since_update[channel] += count;
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if (hcsr04_dev->us_since_update[channel] >= PWM_SUPERVISOR_TIMEOUT) {
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hcsr04_dev->CaptureState[channel] = 0;
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hcsr04_dev->RiseValue[channel] = 0;
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hcsr04_dev->FallValue[channel] = 0;
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hcsr04_dev->CaptureValue[channel] = PIOS_RCVR_TIMEOUT;
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hcsr04_dev->us_since_update[channel] = 0;
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}
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}
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static void PIOS_HCSR04_tim_edge_cb(uint32_t tim_id, uint32_t context, uint8_t chan_idx, uint16_t count)
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{
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/* Recover our device context */
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struct pios_hcsr04_dev *hcsr04_dev = (struct pios_hcsr04_dev *)context;
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if (!PIOS_HCSR04_validate(hcsr04_dev)) {
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/* Invalid device specified */
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return;
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}
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if (chan_idx >= hcsr04_dev->cfg->num_channels) {
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/* Channel out of range */
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return;
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}
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const struct pios_tim_channel *chan = &hcsr04_dev->cfg->channels[chan_idx];
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if (hcsr04_dev->CaptureState[chan_idx] == 0) {
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hcsr04_dev->RiseValue[chan_idx] = count;
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hcsr04_dev->us_since_update[chan_idx] = 0;
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} else {
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hcsr04_dev->FallValue[chan_idx] = count;
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}
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// flip state machine and capture value here
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/* Simple rise or fall state machine */
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TIM_ICInitTypeDef TIM_ICInitStructure = hcsr04_dev->cfg->tim_ic_init;
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if (hcsr04_dev->CaptureState[chan_idx] == 0) {
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/* Switch states */
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hcsr04_dev->CaptureState[chan_idx] = 1;
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/* Switch polarity of input capture */
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TIM_ICInitStructure.TIM_ICPolarity = TIM_ICPolarity_Falling;
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TIM_ICInitStructure.TIM_Channel = chan->timer_chan;
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TIM_ICInit(chan->timer, &TIM_ICInitStructure);
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} else {
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/* Capture computation */
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if (hcsr04_dev->FallValue[chan_idx] > hcsr04_dev->RiseValue[chan_idx]) {
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hcsr04_dev->CaptureValue[chan_idx] = (hcsr04_dev->FallValue[chan_idx] - hcsr04_dev->RiseValue[chan_idx]);
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} else {
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hcsr04_dev->CaptureValue[chan_idx] = ((chan->timer->ARR - hcsr04_dev->RiseValue[chan_idx]) + hcsr04_dev->FallValue[chan_idx]);
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}
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/* Switch states */
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hcsr04_dev->CaptureState[chan_idx] = 0;
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/* Increase supervisor counter */
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hcsr04_dev->CapCounter[chan_idx]++;
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/* Switch polarity of input capture */
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TIM_ICInitStructure.TIM_ICPolarity = TIM_ICPolarity_Rising;
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TIM_ICInitStructure.TIM_Channel = chan->timer_chan;
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TIM_ICInit(chan->timer, &TIM_ICInitStructure);
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}
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}
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#endif /* PIOS_INCLUDE_HCSR04 */
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