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728 lines
23 KiB
C
728 lines
23 KiB
C
/**
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******************************************************************************
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* @addtogroup PIOS PIOS Core hardware abstraction layer
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* @{
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* @addtogroup PIOS_I2C I2C Functions
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* @brief STM32 Hardware dependent I2C functionality
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* @{
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*
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* @file pios_i2c.c
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* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2010.
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* @brief I2C Enable/Disable routines
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* @see The GNU Public License (GPL) Version 3
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*
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*****************************************************************************/
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "pios.h"
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#ifdef PIOS_INCLUDE_I2C
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#if defined(PIOS_INCLUDE_FREERTOS)
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#define USE_FREERTOS
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#endif
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#include <pios_i2c_priv.h>
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/* Interrupt flags descriptions taken from UM1566 */
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/* - TX1: Manages the event “Transmit Interrupt Status”
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* which means a new data shall be written in the I2C data register for the next transfer. */
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/* - RXNE: Manages the event “Receive Buffer Not Empty” which
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* means a data has been received and should be read from the data register. */
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/* - TCR: Available in Master mode only. Manages Transfer Complete Reload event which means
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* the master or slave received or transmitted nbytes and Reload =1. */
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/* - TC: Available in Master mode only. Manages Transfer Complete event which means the master
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* received or transmitted all data and communication will be closed (Generate stop) or
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* another one will start (Repeated start). */
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/* - ADDR: Manages the event “Address phase done” which means that the device in mode slave
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* received start bit followed by its own address and acknowledged it. */
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/* - NACK: Manages the event “Not Acknowledge received flag” which means the device received
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* a NACK. In master mode this flag indicates an error (slave don’t respond to sent address).
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* In slave mode, when master received all data it send NACK to indicate to slave that all
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* data are received.*/
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/* - STOP: Manages the event “Stop bit received” which means that the master has
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* closed the communication.*/
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// Error mask = Bus error | Arbitration lost | Overrun/Underrun
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#define I2C_ISR_ERROR_MASK (I2C_ISR_BERR | I2C_ISR_ARLO | I2C_ISR_OVR)
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#define I2C_IT_ERR (I2C_IT_ERRI)
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// Interrupt sources
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// Transfer Complete interrupt mask
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#define I2C_IT_BUF (I2C_IT_TCI)
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// Stop Detection interrupt mask|Not Acknowledge received interrupt mask|
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// Address Match interrupt mask|RX interrupt mask
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#define I2C_IT_EVT (I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI)
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// #define I2C_HALT_ON_ERRORS
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#define I2C_ERROR_FLAGS \
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(I2C_FLAG_NACKF | I2C_FLAG_BERR | I2C_FLAG_ARLO | I2C_FLAG_OVR | \
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I2C_FLAG_PECERR | I2C_FLAG_TIMEOUT | I2C_FLAG_ALERT \
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)
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#define I2C_EVENT_FLAGS \
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(I2C_FLAG_TXE | I2C_FLAG_TXIS | I2C_FLAG_RXNE | \
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I2C_FLAG_NACKF | I2C_FLAG_STOPF | I2C_FLAG_TC | I2C_FLAG_TCR)
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enum i2c_adapter_state {
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I2C_STATE_FSM_FAULT = 0, /* Must be zero so undefined transitions land here */
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I2C_STATE_BUS_ERROR,
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I2C_STATE_STOPPED,
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I2C_STATE_STOPPING,
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I2C_STATE_TXN_SETUP,
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I2C_STATE_TRANSFER,
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I2C_STATE_NACK,
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I2C_STATE_NUM_STATES /* Must be last */
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};
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enum i2c_adapter_event {
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I2C_EVENT_BUS_ERROR,
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I2C_EVENT_START,
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I2C_EVENT_TRANSFER_DONE,
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I2C_EVENT_TRANSFER_DONE_NEXT_TXN,
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I2C_EVENT_NACK,
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I2C_EVENT_STOPPED,
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I2C_EVENT_AUTO, /* FIXME: remove this */
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I2C_EVENT_NUM_EVENTS /* Must be last */
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};
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#if defined(PIOS_I2C_DIAGNOSTICS)
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static struct pios_i2c_fault_history i2c_adapter_fault_history;
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volatile uint32_t i2c_evirq_history[I2C_LOG_DEPTH];
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volatile uint8_t i2c_evirq_history_pointer = 0;
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volatile uint8_t i2c_state_history[I2C_LOG_DEPTH];
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volatile uint8_t i2c_state_history_pointer = 0;
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volatile uint8_t i2c_state_event_history[I2C_LOG_DEPTH];
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volatile uint8_t i2c_state_event_history_pointer;
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static uint8_t i2c_fsm_fault_count = 0;
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static uint8_t i2c_bad_event_counter = 0;
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static uint8_t i2c_error_interrupt_counter = 0;
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static uint8_t i2c_nack_counter = 0;
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static uint8_t i2c_timeout_counter = 0;
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#endif
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static void go_fsm_fault(struct pios_i2c_adapter *i2c_adapter);
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static void go_bus_error(struct pios_i2c_adapter *i2c_adapter);
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static void go_stopping(struct pios_i2c_adapter *i2c_adapter);
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static void go_stopped(struct pios_i2c_adapter *i2c_adapter);
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void go_txn_setup(struct pios_i2c_adapter *i2c_adapter);
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static void go_transfer(struct pios_i2c_adapter *i2c_adapter);
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static void go_nack(struct pios_i2c_adapter *i2c_adapter);
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struct i2c_adapter_transition {
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void (*entry_fn)(struct pios_i2c_adapter *i2c_adapter);
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enum i2c_adapter_state next_state[I2C_EVENT_NUM_EVENTS];
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};
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static void i2c_adapter_process_auto(struct pios_i2c_adapter *i2c_adapter);
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static void i2c_adapter_inject_event(struct pios_i2c_adapter *i2c_adapter, enum i2c_adapter_event event);
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static void i2c_adapter_fsm_init(struct pios_i2c_adapter *i2c_adapter);
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// static bool i2c_adapter_wait_for_stopped(struct pios_i2c_adapter *i2c_adapter);
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static void i2c_adapter_reset_bus(struct pios_i2c_adapter *i2c_adapter);
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#ifdef PIOS_I2C_DIAGNOSTICS
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static void i2c_adapter_log_fault(enum pios_i2c_error_type type);
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#endif
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static const struct i2c_adapter_transition i2c_adapter_transitions[I2C_STATE_NUM_STATES] = {
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[I2C_STATE_FSM_FAULT] = {
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.entry_fn = go_fsm_fault,
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.next_state = {
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[I2C_EVENT_AUTO] = I2C_STATE_STOPPING,
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},
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},
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[I2C_STATE_BUS_ERROR] = {
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.entry_fn = go_bus_error,
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.next_state = {
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[I2C_EVENT_AUTO] = I2C_STATE_STOPPING,
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},
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},
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[I2C_STATE_STOPPED] = {
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.entry_fn = go_stopped,
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.next_state = {
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[I2C_EVENT_START] = I2C_STATE_TXN_SETUP,
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[I2C_EVENT_BUS_ERROR] = I2C_STATE_BUS_ERROR,
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},
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},
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[I2C_STATE_STOPPING] = {
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.entry_fn = go_stopping,
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.next_state = {
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[I2C_EVENT_STOPPED] = I2C_STATE_STOPPED,
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[I2C_EVENT_BUS_ERROR] = I2C_STATE_BUS_ERROR,
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},
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},
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/*
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* Transaction setup
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*/
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[I2C_STATE_TXN_SETUP] = {
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.entry_fn = go_txn_setup,
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.next_state = {
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[I2C_EVENT_TRANSFER_DONE] = I2C_STATE_TRANSFER,
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[I2C_EVENT_NACK] = I2C_STATE_NACK,
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[I2C_EVENT_BUS_ERROR] = I2C_STATE_BUS_ERROR,
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},
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},
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/*
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* Transfers
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*/
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[I2C_STATE_TRANSFER] = {
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.entry_fn = go_transfer,
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.next_state = {
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[I2C_EVENT_TRANSFER_DONE] = I2C_STATE_TRANSFER,
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[I2C_EVENT_TRANSFER_DONE_NEXT_TXN] = I2C_STATE_TXN_SETUP,
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[I2C_EVENT_NACK] = I2C_STATE_STOPPING,
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[I2C_EVENT_STOPPED] = I2C_STATE_STOPPING,
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[I2C_EVENT_BUS_ERROR] = I2C_STATE_BUS_ERROR,
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},
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},
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[I2C_STATE_NACK] = {
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.entry_fn = go_nack,
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.next_state = {
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[I2C_EVENT_AUTO] = I2C_STATE_STOPPING,
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},
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},
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};
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static void go_fsm_fault(struct pios_i2c_adapter *i2c_adapter)
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{
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#if defined(I2C_HALT_ON_ERRORS)
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PIOS_DEBUG_Assert(0);
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#endif
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/* Note that this transfer has hit a bus error */
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i2c_adapter->bus_error = true;
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i2c_adapter_reset_bus(i2c_adapter);
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}
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static void go_bus_error(struct pios_i2c_adapter *i2c_adapter)
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{
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/* Note that this transfer has hit a bus error */
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i2c_adapter->bus_error = true;
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i2c_adapter_reset_bus(i2c_adapter);
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}
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static void go_stopping(struct pios_i2c_adapter *i2c_adapter)
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{
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#ifdef USE_FREERTOS
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signed portBASE_TYPE pxHigherPriorityTaskWoken = pdFALSE;
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#endif
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I2C_ITConfig(i2c_adapter->cfg->regs, I2C_IT_ERR | I2C_IT_BUF | I2C_IT_EVT, DISABLE);
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#ifdef USE_FREERTOS
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if (xSemaphoreGiveFromISR(i2c_adapter->sem_ready, &pxHigherPriorityTaskWoken) != pdTRUE) {
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#if defined(I2C_HALT_ON_ERRORS)
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PIOS_DEBUG_Assert(0);
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#endif
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}
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portEND_SWITCHING_ISR(pxHigherPriorityTaskWoken);
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#endif /* USE_FREERTOS */
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}
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static void go_stopped(struct pios_i2c_adapter *i2c_adapter)
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{
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I2C_ITConfig(i2c_adapter->cfg->regs, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR, DISABLE);
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// I2C_AcknowledgeConfig(i2c_adapter->cfg->regs, ENABLE);
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}
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/**
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* Setup a new transfer
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* @param i2c_adapter
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*/
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void go_txn_setup(struct pios_i2c_adapter *i2c_adapter)
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{
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PIOS_DEBUG_Assert(i2c_adapter->active_txn);
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PIOS_DEBUG_Assert(i2c_adapter->active_txn >= i2c_adapter->first_txn);
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PIOS_DEBUG_Assert(i2c_adapter->active_txn <= i2c_adapter->last_txn);
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i2c_adapter->active_byte = &(i2c_adapter->active_txn->buf[0]);
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i2c_adapter->last_byte = &(i2c_adapter->active_txn->buf[i2c_adapter->active_txn->len - 1]);
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I2C_ITConfig(i2c_adapter->cfg->regs, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR, ENABLE);
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if (i2c_adapter->active_txn->rw == PIOS_I2C_TXN_READ) {
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I2C_TransferHandling(i2c_adapter->cfg->regs, i2c_adapter->active_txn->addr, i2c_adapter->active_txn->len,
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/* Only last transaction generates Auto End */
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i2c_adapter->active_txn == i2c_adapter->last_txn ? I2C_AutoEnd_Mode : I2C_SoftEnd_Mode,
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I2C_Generate_Start_Read);
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} else {
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I2C_TransferHandling(i2c_adapter->cfg->regs, i2c_adapter->active_txn->addr, i2c_adapter->active_txn->len,
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/* Only last transaction generates Auto End */
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i2c_adapter->active_txn == i2c_adapter->last_txn ? I2C_AutoEnd_Mode : I2C_SoftEnd_Mode,
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I2C_Generate_Start_Write);
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}
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}
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/**
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* transfer a byte and advance to the next byte/txn if this is not the last byte of the last txn
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* @param i2c_adapter
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*/
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static void go_transfer(struct pios_i2c_adapter *i2c_adapter)
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{
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PIOS_DEBUG_Assert(i2c_adapter->active_byte);
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PIOS_DEBUG_Assert(i2c_adapter->active_byte <= i2c_adapter->last_byte);
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if (i2c_adapter->active_txn->rw == PIOS_I2C_TXN_READ) {
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*(i2c_adapter->active_byte) = I2C_ReceiveData(i2c_adapter->cfg->regs);
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} else {
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I2C_SendData(i2c_adapter->cfg->regs, *(i2c_adapter->active_byte));
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}
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/* it this the last transaction? */
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if (i2c_adapter->active_byte == i2c_adapter->last_byte &&
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i2c_adapter->active_txn < i2c_adapter->last_txn) {
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i2c_adapter->active_txn++;
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return;
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}
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/* Move to the next byte */
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i2c_adapter->active_byte++;
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}
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static void go_nack(struct pios_i2c_adapter *i2c_adapter)
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{
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I2C_TransferHandling(i2c_adapter->cfg->regs, 0, 0, I2C_AutoEnd_Mode, I2C_Generate_Stop);
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}
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static void i2c_adapter_inject_event(struct pios_i2c_adapter *i2c_adapter, enum i2c_adapter_event event)
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{
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PIOS_IRQ_Disable();
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#if defined(PIOS_I2C_DIAGNOSTICS)
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i2c_state_event_history[i2c_state_event_history_pointer] = event;
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i2c_state_event_history_pointer = (i2c_state_event_history_pointer + 1) % I2C_LOG_DEPTH;
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i2c_state_history[i2c_state_history_pointer] = i2c_adapter->curr_state;
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i2c_state_history_pointer = (i2c_state_history_pointer + 1) % I2C_LOG_DEPTH;
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if (i2c_adapter_transitions[i2c_adapter->curr_state].next_state[event] == I2C_STATE_FSM_FAULT) {
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i2c_adapter_log_fault(PIOS_I2C_ERROR_FSM);
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}
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#endif
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/*
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* Move to the next state
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*
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* This is done prior to calling the new state's entry function to
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* guarantee that the entry function never depends on the previous
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* state. This way, it cannot ever know what the previous state was.
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*/
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i2c_adapter->curr_state = i2c_adapter_transitions[i2c_adapter->curr_state].next_state[event];
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/* Call the entry function (if any) for the next state. */
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if (i2c_adapter_transitions[i2c_adapter->curr_state].entry_fn) {
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i2c_adapter_transitions[i2c_adapter->curr_state].entry_fn(i2c_adapter);
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}
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/* Process any AUTO transitions in the FSM */
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i2c_adapter_process_auto(i2c_adapter);
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PIOS_IRQ_Enable();
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}
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static void i2c_adapter_process_auto(struct pios_i2c_adapter *i2c_adapter)
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{
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PIOS_IRQ_Disable();
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while (i2c_adapter_transitions[i2c_adapter->curr_state].next_state[I2C_EVENT_AUTO]) {
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i2c_adapter->curr_state = i2c_adapter_transitions[i2c_adapter->curr_state].next_state[I2C_EVENT_AUTO];
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/* Call the entry function (if any) for the next state. */
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if (i2c_adapter_transitions[i2c_adapter->curr_state].entry_fn) {
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i2c_adapter_transitions[i2c_adapter->curr_state].entry_fn(i2c_adapter);
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}
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}
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PIOS_IRQ_Enable();
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}
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static void i2c_adapter_fsm_init(struct pios_i2c_adapter *i2c_adapter)
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{
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i2c_adapter_reset_bus(i2c_adapter);
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i2c_adapter->curr_state = I2C_STATE_STOPPED;
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}
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#if 0
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static bool i2c_adapter_wait_for_stopped(struct pios_i2c_adapter *i2c_adapter)
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{
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uint32_t guard;
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/*
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* Wait for the bus to return to the stopped state.
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* This was pulled out of the FSM due to occasional
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* failures at this transition which previously resulted
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* in spinning on this bit in the ISR forever.
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*/
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#define I2C_CR1_STOP_REQUESTED 0x0200
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for (guard = 1000000; /* FIXME: should use the configured bus timeout */
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guard && (i2c_adapter->cfg->regs->ISR & I2C_FLAG_STOPF); guard--) {
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continue;
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}
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if (!guard) {
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/* We timed out waiting for the stop condition */
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return false;
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}
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return true;
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}
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#endif
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static void i2c_adapter_reset_bus(struct pios_i2c_adapter *i2c_adapter)
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{
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(void)i2c_adapter;
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// I2C_SoftwareResetCmd(i2c_adapter->cfg->regs);
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}
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#include <pios_i2c_priv.h>
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/* Return true if the FSM is in a terminal state */
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static bool i2c_adapter_fsm_terminated(struct pios_i2c_adapter *i2c_adapter)
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{
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switch (i2c_adapter->curr_state) {
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case I2C_STATE_STOPPING:
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case I2C_STATE_STOPPED:
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return true;
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default:
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return false;
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}
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}
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#if defined(PIOS_I2C_DIAGNOSTICS)
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/**
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* Logs the last N state transitions and N IRQ events due to
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* an error condition
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* \param[in] i2c the adapter number to log an event for
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*/
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void i2c_adapter_log_fault(enum pios_i2c_error_type type)
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{
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i2c_adapter_fault_history.type = type;
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||
for (uint8_t i = 0; i < I2C_LOG_DEPTH; i++) {
|
||
i2c_adapter_fault_history.evirq[i] =
|
||
i2c_evirq_history[(I2C_LOG_DEPTH + i2c_evirq_history_pointer - 1 - i) % I2C_LOG_DEPTH];
|
||
i2c_adapter_fault_history.event[i] =
|
||
i2c_state_event_history[(I2C_LOG_DEPTH + i2c_state_event_history_pointer - 1 - i) % I2C_LOG_DEPTH];
|
||
i2c_adapter_fault_history.state[i] =
|
||
i2c_state_history[(I2C_LOG_DEPTH + i2c_state_history_pointer - 1 - i) % I2C_LOG_DEPTH];
|
||
}
|
||
switch (type) {
|
||
case PIOS_I2C_ERROR_EVENT:
|
||
i2c_bad_event_counter++;
|
||
break;
|
||
case PIOS_I2C_ERROR_FSM:
|
||
i2c_fsm_fault_count++;
|
||
break;
|
||
case PIOS_I2C_ERROR_INTERRUPT:
|
||
i2c_error_interrupt_counter++;
|
||
break;
|
||
}
|
||
}
|
||
|
||
#endif /* if defined(PIOS_I2C_DIAGNOSTICS) */
|
||
|
||
/**
|
||
* Logs the last N state transitions and N IRQ events due to
|
||
* an error condition
|
||
* \param[out] data address where to copy the pios_i2c_fault_history structure to
|
||
* \param[out] counts three uint16 that receive the bad event, fsm, and error irq
|
||
* counts
|
||
*/
|
||
void PIOS_I2C_GetDiagnostics(struct pios_i2c_fault_history *data, uint8_t *counts)
|
||
{
|
||
#if defined(PIOS_I2C_DIAGNOSTICS)
|
||
memcpy(data, &i2c_adapter_fault_history, sizeof(i2c_adapter_fault_history));
|
||
counts[PIOS_I2C_BAD_EVENT_COUNTER] = i2c_bad_event_counter;
|
||
counts[PIOS_I2C_FSM_FAULT_COUNT] = i2c_fsm_fault_count;
|
||
counts[PIOS_I2C_ERROR_INTERRUPT_COUNTER] = i2c_error_interrupt_counter;
|
||
counts[PIOS_I2C_NACK_COUNTER] = i2c_nack_counter;
|
||
counts[PIOS_I2C_TIMEOUT_COUNTER] = i2c_timeout_counter;
|
||
#else
|
||
struct pios_i2c_fault_history i2c_adapter_fault_history;
|
||
i2c_adapter_fault_history.type = PIOS_I2C_ERROR_EVENT;
|
||
|
||
memcpy(data, &i2c_adapter_fault_history, sizeof(i2c_adapter_fault_history));
|
||
memset(counts, 0, sizeof(*counts) * PIOS_I2C_ERROR_COUNT_NUMELEM);
|
||
#endif
|
||
}
|
||
|
||
static bool PIOS_I2C_validate(struct pios_i2c_adapter *i2c_adapter)
|
||
{
|
||
return i2c_adapter->magic == PIOS_I2C_DEV_MAGIC;
|
||
}
|
||
|
||
#if defined(PIOS_INCLUDE_FREERTOS)
|
||
static struct pios_i2c_adapter *PIOS_I2C_alloc(void)
|
||
{
|
||
struct pios_i2c_adapter *i2c_adapter;
|
||
|
||
i2c_adapter = (struct pios_i2c_adapter *)pvPortMalloc(sizeof(*i2c_adapter));
|
||
if (!i2c_adapter) {
|
||
return NULL;
|
||
}
|
||
|
||
i2c_adapter->magic = PIOS_I2C_DEV_MAGIC;
|
||
return i2c_adapter;
|
||
}
|
||
#else
|
||
static struct pios_i2c_adapter pios_i2c_adapters[PIOS_I2C_MAX_DEVS];
|
||
static uint8_t pios_i2c_num_adapters;
|
||
static struct pios_i2c_adapter *PIOS_I2C_alloc(void)
|
||
{
|
||
struct pios_i2c_adapter *i2c_adapter;
|
||
|
||
if (pios_i2c_num_adapters >= PIOS_I2C_MAX_DEVS) {
|
||
return NULL;
|
||
}
|
||
|
||
i2c_adapter = &pios_i2c_adapters[pios_i2c_num_adapters++];
|
||
i2c_adapter->magic = PIOS_I2C_DEV_MAGIC;
|
||
|
||
return i2c_adapter;
|
||
}
|
||
#endif /* if defined(PIOS_INCLUDE_FREERTOS) */
|
||
|
||
|
||
/**
|
||
* Initializes IIC driver
|
||
* \param[in] mode currently only mode 0 supported
|
||
* \return < 0 if initialisation failed
|
||
*/
|
||
int32_t PIOS_I2C_Init(uint32_t *i2c_id, const struct pios_i2c_adapter_cfg *cfg)
|
||
{
|
||
PIOS_DEBUG_Assert(i2c_id);
|
||
PIOS_DEBUG_Assert(cfg);
|
||
|
||
struct pios_i2c_adapter *i2c_adapter;
|
||
|
||
i2c_adapter = (struct pios_i2c_adapter *)PIOS_I2C_alloc();
|
||
if (!i2c_adapter) {
|
||
goto out_fail;
|
||
}
|
||
|
||
/* Bind the configuration to the device instance */
|
||
i2c_adapter->cfg = cfg;
|
||
|
||
#ifdef USE_FREERTOS
|
||
/*
|
||
* Must be done prior to calling i2c_adapter_fsm_init()
|
||
* since the sem_ready mutex is used in the initial state.
|
||
*/
|
||
vSemaphoreCreateBinary(i2c_adapter->sem_ready);
|
||
i2c_adapter->sem_busy = xSemaphoreCreateMutex();
|
||
#endif // USE_FREERTOS
|
||
|
||
/* Enable the associated peripheral clock */
|
||
switch ((uint32_t)i2c_adapter->cfg->regs) {
|
||
case (uint32_t)I2C1:
|
||
/* Enable I2C peripheral clock (APB1 == slow speed) */
|
||
RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C1, ENABLE);
|
||
RCC_I2CCLKConfig(RCC_I2C1CLK_HSI);
|
||
break;
|
||
case (uint32_t)I2C2:
|
||
/* Enable I2C peripheral clock (APB1 == slow speed) */
|
||
RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C2, ENABLE);
|
||
break;
|
||
}
|
||
|
||
if (i2c_adapter->cfg->remapSCL) {
|
||
GPIO_PinAFConfig(i2c_adapter->cfg->scl.gpio, i2c_adapter->cfg->scl.pin_source, i2c_adapter->cfg->remapSCL);
|
||
}
|
||
if (i2c_adapter->cfg->remapSDA) {
|
||
GPIO_PinAFConfig(i2c_adapter->cfg->sda.gpio, i2c_adapter->cfg->sda.pin_source, i2c_adapter->cfg->remapSDA);
|
||
}
|
||
|
||
GPIO_Init(i2c_adapter->cfg->scl.gpio, &i2c_adapter->cfg->scl.init);
|
||
GPIO_Init(i2c_adapter->cfg->sda.gpio, &i2c_adapter->cfg->sda.init);
|
||
|
||
I2C_Init(i2c_adapter->cfg->regs, &i2c_adapter->cfg->init);
|
||
|
||
I2C_Cmd(i2c_adapter->cfg->regs, ENABLE);
|
||
|
||
/* Initialize the state machine */
|
||
i2c_adapter_fsm_init(i2c_adapter);
|
||
|
||
*i2c_id = (uint32_t)i2c_adapter;
|
||
|
||
/* Configure and enable I2C interrupt */
|
||
NVIC_Init(&(i2c_adapter->cfg->event.init));
|
||
|
||
/* No error */
|
||
return 0;
|
||
|
||
out_fail:
|
||
return -1;
|
||
}
|
||
|
||
/**
|
||
* @brief Perform a series of I2C transactions
|
||
* @returns 0 if success or error code
|
||
* @retval -1 for failed transaction
|
||
* @retval -2 for failure to get semaphore
|
||
*/
|
||
int32_t PIOS_I2C_Transfer(uint32_t i2c_id, const struct pios_i2c_txn txn_list[], uint32_t num_txns)
|
||
{
|
||
struct pios_i2c_adapter *i2c_adapter = (struct pios_i2c_adapter *)i2c_id;
|
||
|
||
bool valid = PIOS_I2C_validate(i2c_adapter);
|
||
|
||
PIOS_Assert(valid)
|
||
|
||
PIOS_DEBUG_Assert(txn_list);
|
||
PIOS_DEBUG_Assert(num_txns);
|
||
|
||
bool semaphore_success = true;
|
||
|
||
#ifdef USE_FREERTOS
|
||
/* Lock the bus */
|
||
portTickType timeout;
|
||
timeout = i2c_adapter->cfg->transfer_timeout_ms / portTICK_RATE_MS;
|
||
if (xSemaphoreTake(i2c_adapter->sem_busy, timeout) == pdFALSE) {
|
||
return -2;
|
||
}
|
||
#else
|
||
uint32_t timeout = 0xfff;
|
||
while (i2c_adapter->busy && --timeout) {
|
||
;
|
||
}
|
||
if (timeout == 0) { // timed out
|
||
return false;
|
||
}
|
||
|
||
PIOS_IRQ_Disable();
|
||
if (i2c_adapter->busy) {
|
||
return false;
|
||
}
|
||
i2c_adapter->busy = 1;
|
||
PIOS_IRQ_Enable();
|
||
#endif /* USE_FREERTOS */
|
||
|
||
PIOS_DEBUG_Assert(i2c_adapter->curr_state == I2C_STATE_STOPPED);
|
||
|
||
i2c_adapter->first_txn = &txn_list[0];
|
||
i2c_adapter->last_txn = &txn_list[num_txns - 1];
|
||
i2c_adapter->active_txn = i2c_adapter->first_txn;
|
||
|
||
#ifdef USE_FREERTOS
|
||
/* Make sure the done/ready semaphore is consumed before we start */
|
||
semaphore_success &= (xSemaphoreTake(i2c_adapter->sem_ready, timeout) == pdTRUE);
|
||
#endif
|
||
|
||
i2c_adapter->bus_error = false;
|
||
i2c_adapter_inject_event(i2c_adapter, I2C_EVENT_START);
|
||
|
||
/* Wait for the transfer to complete */
|
||
#ifdef USE_FREERTOS
|
||
semaphore_success &= (xSemaphoreTake(i2c_adapter->sem_ready, timeout) == pdTRUE);
|
||
xSemaphoreGive(i2c_adapter->sem_ready);
|
||
#else
|
||
PIOS_IRQ_Disable();
|
||
i2c_adapter->busy = 0;
|
||
PIOS_IRQ_Enable();
|
||
#endif /* USE_FREERTOS */
|
||
|
||
/* Spin waiting for the transfer to finish */
|
||
while (!i2c_adapter_fsm_terminated(i2c_adapter)) {
|
||
;
|
||
}
|
||
|
||
i2c_adapter_fsm_init(i2c_adapter);
|
||
|
||
|
||
#ifdef USE_FREERTOS
|
||
/* Unlock the bus */
|
||
xSemaphoreGive(i2c_adapter->sem_busy);
|
||
if (!semaphore_success) {
|
||
#ifdef PIOS_I2C_DIAGNOSTICS
|
||
i2c_timeout_counter++;
|
||
#endif
|
||
}
|
||
#endif /* USE_FREERTOS */
|
||
|
||
return !semaphore_success ? -2 :
|
||
i2c_adapter->bus_error ? -1 :
|
||
0;
|
||
}
|
||
|
||
void PIOS_I2C_IRQ_Handler(uint32_t i2c_id)
|
||
{
|
||
struct pios_i2c_adapter *i2c_adapter = (struct pios_i2c_adapter *)i2c_id;
|
||
|
||
bool valid = PIOS_I2C_validate(i2c_adapter);
|
||
|
||
PIOS_Assert(valid)
|
||
|
||
uint32_t event = i2c_adapter->cfg->regs->ISR;
|
||
|
||
#if defined(PIOS_I2C_DIAGNOSTICS)
|
||
i2c_evirq_history[i2c_evirq_history_pointer] = event;
|
||
i2c_evirq_history_pointer = (i2c_evirq_history_pointer + 1) % I2C_LOG_DEPTH;
|
||
#endif
|
||
if (event & I2C_ERROR_FLAGS) {
|
||
if (event & I2C_FLAG_NACKF) {
|
||
#ifdef PIOS_I2C_DIAGNOSTICS
|
||
i2c_nack_counter++;
|
||
#endif
|
||
I2C_ClearFlag(i2c_adapter->cfg->regs, I2C_FLAG_NACKF);
|
||
|
||
i2c_adapter_inject_event(i2c_adapter, I2C_EVENT_NACK);
|
||
} else { /* Mostly bus errors here */
|
||
#ifdef PIOS_I2C_DIAGNOSTICS
|
||
i2c_adapter_log_fault(PIOS_I2C_ERROR_INTERRUPT);
|
||
#endif
|
||
/* Fail hard on any errors for now */
|
||
i2c_adapter_inject_event(i2c_adapter, I2C_EVENT_BUS_ERROR);
|
||
}
|
||
return;
|
||
}
|
||
// I2C_FLAG_TCR and reload not handled right now. Transfers limited to 255 bytes
|
||
if (event & (I2C_FLAG_TXIS | I2C_ISR_RXNE)) {
|
||
if (i2c_adapter->active_byte <= i2c_adapter->last_byte) {
|
||
i2c_adapter_inject_event(i2c_adapter, I2C_EVENT_TRANSFER_DONE);
|
||
return;
|
||
}
|
||
}
|
||
if (event & I2C_ISR_TC) {
|
||
i2c_adapter_inject_event(i2c_adapter, I2C_EVENT_TRANSFER_DONE_NEXT_TXN);
|
||
}
|
||
|
||
if (event & I2C_ISR_STOPF) {
|
||
I2C_ClearFlag(i2c_adapter->cfg->regs, I2C_FLAG_STOPF);
|
||
i2c_adapter_inject_event(i2c_adapter, I2C_EVENT_STOPPED);
|
||
return;
|
||
}
|
||
}
|
||
|
||
#endif /* PIOS_INCLUDE_I2C */
|
||
|
||
/**
|
||
* @}
|
||
* @}
|
||
*/
|