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145 lines
4.0 KiB
C
145 lines
4.0 KiB
C
/**
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******************************************************************************
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* @addtogroup PIOS PIOS Core hardware abstraction layer
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* @{
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* @addtogroup PIOS_BKP Backup SRAM functions
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* @brief Hardware abstraction layer for backup sram
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* @{
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*
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* @file pios_bkp.c
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* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2013.
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* @brief IAP functions
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* @see The GNU Public License (GPL) Version 3
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*
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*****************************************************************************/
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <pios.h>
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#include <pios_bkp.h>
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#include <stm32f10x.h>
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#include <stm32f10x_bkp.h>
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#include <stm32f10x_pwr.h>
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/****************************************************************************************
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* Header files
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****************************************************************************************/
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/*****************************************************************************************
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* Public Definitions/Macros
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****************************************************************************************/
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/****************************************************************************************
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* Public Functions
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****************************************************************************************/
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const uint32_t pios_bkp_registers_map[] = {
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BKP_DR1,
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BKP_DR2,
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BKP_DR3,
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BKP_DR4,
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BKP_DR5,
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BKP_DR6,
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BKP_DR7,
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BKP_DR8,
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BKP_DR9,
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BKP_DR10,
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BKP_DR11,
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BKP_DR12,
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BKP_DR13,
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BKP_DR14,
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BKP_DR15,
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BKP_DR16,
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BKP_DR17,
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BKP_DR18,
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BKP_DR19,
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#if FALSE /* Not enabled as stm32f4 needs some modifications to
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* accomodate more than 20 registers (like storing 2 uint16_t
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* regs in one uint32_t bkp location)
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*/
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BKP_DR20,
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BKP_DR21,
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BKP_DR22,
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BKP_DR23,
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BKP_DR24,
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BKP_DR25,
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BKP_DR26,
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BKP_DR27,
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BKP_DR28,
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BKP_DR29,
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BKP_DR30,
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BKP_DR32,
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BKP_DR33,
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BKP_DR34,
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BKP_DR35,
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BKP_DR36,
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BKP_DR37,
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BKP_DR38,
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BKP_DR39,
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BKP_DR40,
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BKP_DR41,
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BKP_DR42,
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#endif /* if FALSE */
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};
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#define PIOS_BKP_REGISTERS_COUNT NELEMENTS(pios_bkp_registers_map)
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void PIOS_BKP_Init(void)
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{
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/* Enable CRC clock */
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RCC_AHBPeriphClockCmd(RCC_AHBPeriph_CRC, ENABLE);
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/* Enable PWR and BKP clock */
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP, ENABLE);
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/* Clear Tamper pin Event(TE) pending flag */
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BKP_ClearFlag();
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}
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uint16_t PIOS_BKP_ReadRegister(uint32_t regnumber)
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{
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if (PIOS_BKP_REGISTERS_COUNT < regnumber) {
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PIOS_Assert(0);
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} else {
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return (uint16_t)BKP_ReadBackupRegister(pios_bkp_registers_map[regnumber]);
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}
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}
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void PIOS_BKP_WriteRegister(uint32_t regnumber, uint16_t data)
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{
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if (PIOS_BKP_REGISTERS_COUNT < regnumber) {
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PIOS_Assert(0);
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} else {
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BKP_WriteBackupRegister(pios_bkp_registers_map[regnumber], (uint32_t)data);
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}
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}
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void PIOS_BKP_EnableWrite(void)
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{
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/* Enable write access to Backup domain */
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PWR_BackupAccessCmd(ENABLE);
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}
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void PIOS_BKP_DisableWrite(void)
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{
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/* Enable write access to Backup domain */
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PWR_BackupAccessCmd(DISABLE);
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}
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/****************************************************************************************
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* Public Data
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****************************************************************************************/
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