mirror of
https://bitbucket.org/librepilot/librepilot.git
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a2d8544931
to make the flight code compile again. Needs careful review, particularly all the fixes for the signed vs unsigned comparisons. +review OPReview-459
483 lines
12 KiB
C
483 lines
12 KiB
C
/**
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******************************************************************************
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* @addtogroup PIOS PIOS Core hardware abstraction layer
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* @{
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* @addtogroup PIOS_BMA180 BMA180 Functions
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* @brief Deals with the hardware interface to the BMA180 3-axis accelerometer
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* @{
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*
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* @file pios_bma180.h
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* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2012.
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* @brief PiOS BMA180 digital accelerometer driver.
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* - Driver for the BMA180 digital accelerometer on the SPI bus.
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* @see The GNU Public License (GPL) Version 3
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*
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*****************************************************************************/
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "pios.h"
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#ifdef PIOS_INCLUDE_BMA180
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#include "fifo_buffer.h"
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enum pios_bma180_dev_magic {
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PIOS_BMA180_DEV_MAGIC = 0xcbb93755,
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};
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#define PIOS_BMA180_MAX_DOWNSAMPLE 10
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struct bma180_dev {
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uint32_t spi_id;
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uint32_t slave_num;
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int16_t buffer[PIOS_BMA180_MAX_DOWNSAMPLE * sizeof(struct pios_bma180_data)];
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t_fifo_buffer fifo;
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const struct pios_bma180_cfg * cfg;
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enum bma180_bandwidth bandwidth;
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enum bma180_range range;
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enum pios_bma180_dev_magic magic;
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};
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//! Global structure for this device device
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static struct bma180_dev * dev;
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//! Private functions
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static struct bma180_dev * PIOS_BMA180_alloc(void);
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static int32_t PIOS_BMA180_Validate(struct bma180_dev * dev);
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static int32_t PIOS_BMA180_GetReg(uint8_t reg);
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static int32_t PIOS_BMA180_SetReg(uint8_t reg, uint8_t data);
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static int32_t PIOS_BMA180_SelectBW(enum bma180_bandwidth bw);
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static int32_t PIOS_BMA180_SetRange(enum bma180_range range);
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static int32_t PIOS_BMA180_Config();
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static int32_t PIOS_BMA180_EnableIrq();
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#define GRAV 9.81f
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/**
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* @brief Allocate a new device
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*/
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static struct bma180_dev * PIOS_BMA180_alloc(void)
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{
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struct bma180_dev * bma180_dev;
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bma180_dev = (struct bma180_dev *)pvPortMalloc(sizeof(*bma180_dev));
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if (!bma180_dev) return (NULL);
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fifoBuf_init(&bma180_dev->fifo, (uint8_t *) bma180_dev->buffer, sizeof(bma180_dev->buffer));
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bma180_dev->magic = PIOS_BMA180_DEV_MAGIC;
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return(bma180_dev);
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}
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/**
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* @brief Validate the handle to the spi device
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* @returns 0 for valid device or -1 otherwise
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*/
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static int32_t PIOS_BMA180_Validate(struct bma180_dev * dev)
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{
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if (dev == NULL)
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return -1;
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if (dev->magic != PIOS_BMA180_DEV_MAGIC)
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return -2;
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if (dev->spi_id == 0)
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return -3;
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return 0;
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}
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/**
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* @brief Initialize with good default settings
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* @returns 0 for success, -1 for failure
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*/
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int32_t PIOS_BMA180_Init(uint32_t spi_id, uint32_t slave_num, const struct pios_bma180_cfg * cfg)
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{
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dev = PIOS_BMA180_alloc();
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if(dev == NULL)
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return -1;
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dev->spi_id = spi_id;
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dev->slave_num = slave_num;
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dev->cfg = cfg;
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if(PIOS_BMA180_Config() < 0)
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return -1;
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PIOS_DELAY_WaituS(50);
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PIOS_EXTI_Init(dev->cfg->exti_cfg);
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while(PIOS_BMA180_EnableIrq() != 0);
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return 0;
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}
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/**
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* @brief Claim the SPI bus for the accel communications and select this chip
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* @return 0 if successful, -1 if unable to claim bus
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*/
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int32_t PIOS_BMA180_ClaimBus()
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{
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if(PIOS_BMA180_Validate(dev) != 0)
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return -1;
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if(PIOS_SPI_ClaimBus(dev->spi_id) != 0) {
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return -1;
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}
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PIOS_SPI_RC_PinSet(dev->spi_id,dev->slave_num,0);
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return 0;
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}
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/**
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* @brief Claim the SPI bus for the accel communications and select this chip
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* @return 0 if successful, -1 if unable to claim bus
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*/
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int32_t PIOS_BMA180_ClaimBusISR()
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{
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if(PIOS_BMA180_Validate(dev) != 0)
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return -1;
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if(PIOS_SPI_ClaimBusISR(dev->spi_id) != 0) {
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return -1;
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}
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PIOS_SPI_RC_PinSet(dev->spi_id,dev->slave_num,0);
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return 0;
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}
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/**
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* @brief Release the SPI bus for the accel communications and end the transaction
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* @return 0 if successful
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*/
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int32_t PIOS_BMA180_ReleaseBus()
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{
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if(PIOS_BMA180_Validate(dev) != 0)
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return -1;
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PIOS_SPI_RC_PinSet(dev->spi_id,dev->slave_num,1);
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return PIOS_SPI_ReleaseBus(dev->spi_id);
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}
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/**
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* @brief Read a register from BMA180
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* @returns The register value or -1 if failure to get bus
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* @param reg[in] Register address to be read
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*/
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int32_t PIOS_BMA180_GetReg(uint8_t reg)
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{
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if(PIOS_BMA180_Validate(dev) != 0)
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return -1;
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uint8_t data;
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if(PIOS_BMA180_ClaimBus() != 0)
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return -1;
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PIOS_SPI_TransferByte(dev->spi_id,(0x80 | reg) ); // request byte
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data = PIOS_SPI_TransferByte(dev->spi_id,0 ); // receive response
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PIOS_BMA180_ReleaseBus();
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return data;
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}
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/**
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* @brief Write a BMA180 register. EEPROM must be unlocked before calling this function.
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* @return none
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* @param reg[in] address of register to be written
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* @param data[in] data that is to be written to register
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*/
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int32_t PIOS_BMA180_SetReg(uint8_t reg, uint8_t data)
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{
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if(PIOS_BMA180_ClaimBus() != 0)
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return -1;
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PIOS_SPI_TransferByte(dev->spi_id, 0x7f & reg);
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PIOS_SPI_TransferByte(dev->spi_id, data);
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PIOS_BMA180_ReleaseBus();
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return 0;
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}
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static int32_t PIOS_BMA180_EnableEeprom() {
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// Enable EEPROM writing
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int32_t byte = PIOS_BMA180_GetReg(BMA_CTRREG0);
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if(byte < 0)
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return -1;
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byte |= 0x10; // Set bit 4
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if(PIOS_BMA180_SetReg(BMA_CTRREG0,(uint8_t) byte) < 0) // Have to set ee_w to
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return -1;
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return 0;
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}
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static int32_t PIOS_BMA180_DisableEeprom() {
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// Enable EEPROM writing
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int32_t byte = PIOS_BMA180_GetReg(BMA_CTRREG0);
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if(byte < 0)
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return -1;
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byte |= 0x10; // Set bit 4
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if(PIOS_BMA180_SetReg(BMA_CTRREG0,(uint8_t) byte) < 0) // Have to set ee_w to
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return -1;
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return 0;
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}
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/**
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* @brief Set the default register settings
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* @return 0 if successful, -1 if not
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*/
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static int32_t PIOS_BMA180_Config()
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{
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/*
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0x35 = 0x81 //smp-skip = 1 for less interrupts
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0x33 = 0x81 //shadow-dis = 1, update MSB and LSB synchronously
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0x27 = 0x01 //dis-i2c
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0x21 = 0x02 //new_data_int = 1
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*/
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PIOS_DELAY_WaituS(20);
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if(PIOS_BMA180_Validate(dev) != 0)
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return -1;
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while(PIOS_BMA180_EnableEeprom() != 0);
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while(PIOS_BMA180_SetReg(BMA_RESET, BMA_RESET_CODE) != 0);
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while(PIOS_BMA180_SetReg(BMA_OFFSET_LSB1, 0x81) != 0);
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while(PIOS_BMA180_SetReg(BMA_GAIN_Y, 0x81) != 0);
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while(PIOS_BMA180_SetReg(BMA_CTRREG3, 0xFF) != 0);
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while(PIOS_BMA180_SelectBW(dev->cfg->bandwidth) != 0);
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while(PIOS_BMA180_SetRange(dev->cfg->range) != 0);
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while(PIOS_BMA180_DisableEeprom() != 0);
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return 0;
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}
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/**
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* @brief Select the bandwidth the digital filter pass allows.
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* @return 0 if successful, -1 if not
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* @param rate[in] Bandwidth setting to be used
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*
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* EEPROM must be write-enabled before calling this function.
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*/
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static int32_t PIOS_BMA180_SelectBW(enum bma180_bandwidth bw)
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{
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if(PIOS_BMA180_Validate(dev) != 0)
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return -1;
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dev->bandwidth = bw;
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uint8_t reg;
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reg = PIOS_BMA180_GetReg(BMA_BW_ADDR);
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reg = (reg & ~BMA_BW_MASK) | ((bw << BMA_BW_SHIFT) & BMA_BW_MASK);
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return PIOS_BMA180_SetReg(BMA_BW_ADDR, reg);
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}
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/**
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* @brief Select the full scale acceleration range.
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* @return 0 if successful, -1 if not
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* @param rate[in] Range setting to be used
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*
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*/
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static int32_t PIOS_BMA180_SetRange(enum bma180_range new_range)
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{
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if(PIOS_BMA180_Validate(dev) != 0)
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return -1;
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uint8_t reg;
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dev->range = new_range;
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reg = PIOS_BMA180_GetReg(BMA_RANGE_ADDR);
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reg = (reg & ~BMA_RANGE_MASK) | ((dev->range << BMA_RANGE_SHIFT) & BMA_RANGE_MASK);
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return PIOS_BMA180_SetReg(BMA_RANGE_ADDR, reg);
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}
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static int32_t PIOS_BMA180_EnableIrq()
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{
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if(PIOS_BMA180_EnableEeprom() < 0)
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return -1;
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if(PIOS_BMA180_SetReg(BMA_CTRREG3, BMA_NEW_DAT_INT) < 0)
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return -1;
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if(PIOS_BMA180_DisableEeprom() < 0)
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return -1;
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return 0;
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}
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/**
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* @brief Read a single set of values from the x y z channels
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* @param[out] data Int16 array of (x,y,z) sensor values
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* @returns 0 if successful
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* @retval -1 unable to claim bus
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* @retval -2 unable to transfer data
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*/
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int32_t PIOS_BMA180_ReadAccels(struct pios_bma180_data * data)
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{
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// To save memory use same buffer for in and out but offset by
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// a byte
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uint8_t buf[7] = {BMA_X_LSB_ADDR | 0x80,0,0,0,0,0};
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uint8_t rec[7] = {0,0,0,0,0,0};
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if(PIOS_BMA180_ClaimBus() != 0)
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return -1;
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if(PIOS_SPI_TransferBlock(dev->spi_id,&buf[0],&rec[0],7,NULL) != 0)
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return -2;
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PIOS_BMA180_ReleaseBus();
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// | MSB | LSB | 0 | new_data |
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data->x = ((rec[2] << 8) | rec[1]);
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data->y = ((rec[4] << 8) | rec[3]);
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data->z = ((rec[6] << 8) | rec[5]);
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data->x /= 4;
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data->y /= 4;
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data->z /= 4;
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return 0; // return number of remaining entries
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}
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/**
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* @brief Returns the scale the BMA180 chip is using
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* @return Scale (m / s^2) / LSB
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*/
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float PIOS_BMA180_GetScale()
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{
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if(PIOS_BMA180_Validate(dev) != 0)
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return -1;
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switch (dev->cfg->range) {
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case BMA_RANGE_1G:
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return GRAV / 8192.0f;
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case BMA_RANGE_1_5G:
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return GRAV / 5460.0f;
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case BMA_RANGE_2G:
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return GRAV / 4096.0f;
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case BMA_RANGE_3G:
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return GRAV / 2730.0f;
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case BMA_RANGE_4G:
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return GRAV / 2048.0f;
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case BMA_RANGE_8G:
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return GRAV / 1024.0f;
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case BMA_RANGE_16G:
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return GRAV / 512.0f;
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}
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return 0;
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}
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/**
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* @brief Get data from fifo
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* @param [out] buffer pointer to a @ref pios_bma180_data structure to receive data
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* @return 0 for success, -1 for failure (no data available)
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*/
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int32_t PIOS_BMA180_ReadFifo(struct pios_bma180_data * buffer)
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{
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if(PIOS_BMA180_Validate(dev) != 0)
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return -1;
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if(fifoBuf_getUsed(&dev->fifo) < sizeof(*buffer))
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return -1;
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fifoBuf_getData(&dev->fifo, (uint8_t *) buffer, sizeof(*buffer));
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return 0;
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}
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/**
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* @brief Test SPI and chip functionality by reading chip ID register
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* @return 0 if success, -1 if failure.
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*
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*/
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int32_t PIOS_BMA180_Test()
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{
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// Read chip ID then version ID
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uint8_t buf[3] = {0x80 | BMA_CHIPID_ADDR, 0, 0};
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uint8_t rec[3] = {0,0, 0};
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int32_t retval;
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if(PIOS_BMA180_ClaimBus() != 0)
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return -1;
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retval = PIOS_SPI_TransferBlock(dev->spi_id,&buf[0],&rec[0],sizeof(buf),NULL);
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PIOS_BMA180_ReleaseBus();
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if(retval != 0)
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return -2;
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struct pios_bma180_data data;
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if(PIOS_BMA180_ReadAccels(&data) != 0)
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return -3;
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if(rec[1] != 0x3)
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return -4;
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if(rec[2] < 0x12)
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return -5;
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return 0;
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}
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/**
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* @brief IRQ Handler. Read data from the BMA180 FIFO and push onto a local fifo.
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*/
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int32_t bma180_irqs = 0;
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bool PIOS_BMA180_IRQHandler(void)
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{
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bma180_irqs++;
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static const uint8_t pios_bma180_req_buf[7] = {BMA_X_LSB_ADDR | 0x80,0,0,0,0,0};
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uint8_t pios_bma180_dmabuf[8];
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// If we can't get the bus then just move on for efficiency
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if(PIOS_BMA180_ClaimBusISR() != 0) {
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return false; // Something else is using bus, miss this data
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}
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PIOS_SPI_TransferBlock(dev->spi_id,pios_bma180_req_buf,(uint8_t *) pios_bma180_dmabuf,
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sizeof(pios_bma180_dmabuf), NULL);
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// TODO: Make this conversion depend on configuration scale
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struct pios_bma180_data data;
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// Don't release bus till data has copied
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PIOS_BMA180_ReleaseBus();
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// Must not return before releasing bus
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if(fifoBuf_getFree(&dev->fifo) < sizeof(data))
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return false;
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// Bottom two bits indicate new data and are constant zeros. Don't right
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// shift because it drops sign bit
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data.x = ((pios_bma180_dmabuf[2] << 8) | pios_bma180_dmabuf[1]);
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data.y = ((pios_bma180_dmabuf[4] << 8) | pios_bma180_dmabuf[3]);
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data.z = ((pios_bma180_dmabuf[6] << 8) | pios_bma180_dmabuf[5]);
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data.x /= 4;
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data.y /= 4;
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data.z /= 4;
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data.temperature = pios_bma180_dmabuf[7];
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fifoBuf_putData(&dev->fifo, (uint8_t *) &data, sizeof(data));
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return false;
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}
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#endif /* PIOS_INCLUDE_BMA180 */
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/**
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* @}
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* @}
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*/
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