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a3a2dbd634
PIOS SPI devices may now make use of automatic CRC generation and checking on block transfers. Only supports CRC8 for now. Since the SPI interface CRC calculation continues across message boundaries (ie. not reset on every transfer), we must manually reset the CRC registers for every transfer to allow the two sides of the link to resynchronize. Unfortunately, resetting the CRC registers requires disabling the SPI peripheral which must now be done on every block transfer. Note: The last byte of the tx buffer is never sent and is assumed to be a place holder for the tx CRC8. Note: The last byte of the rx buffer is expected to hold the rx CRC8. git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@1011 ebee16cc-31ac-478f-84a7-5cbb03baadba |
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.. | ||
inc | ||
alarms.c | ||
openpilot.c | ||
pios_board.c |