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c1f767b12d
Conflicts: flight/pios/common/pios_flashfs_logfs.c
41 lines
1.2 KiB
Makefile
41 lines
1.2 KiB
Makefile
BOARD_TYPE := 0x03
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BOARD_REVISION := 0x01
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BOOTLOADER_VERSION := 0x04
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HW_TYPE := 0x01
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MCU := cortex-m3
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CHIP := STM32F103CBT
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BOARD := STM32103CB_OPLINKMINI
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MODEL := MD
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MODEL_SUFFIX := _PX
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OPENOCD_JTAG_CONFIG := stlink-v2.cfg
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OPENOCD_CONFIG := stm32f1x.stlink.cfg
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# Flash memory map for OPLM:
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# Sector start size use
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# 0 0x0800 0000 1k BL
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# 1 0x0800 0400 1k BL
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# .. ..
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# 10 0x0800 2C00 1k BL
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# 11 0x0800 3000 1k FW
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# 12 0x0800 1000 1k FW
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# .. ..
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# 125 0x0801 F400 1k FW
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# 126 0x0801 F800 1k EE
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# 127 0x0801 FC00 1k EE
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# Note: These must match the values in link_$(BOARD)_memory.ld
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BL_BANK_BASE := 0x08000000 # Start of bootloader flash
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BL_BANK_SIZE := 0x00003000 # Should include BD_INFO region
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FW_BANK_BASE := 0x08003000 # Start of firmware flash
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FW_BANK_SIZE := 0x0001CC00 # Should include FW_DESC_SIZE
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FW_BANK_SIZE := 0x00019000 # Should include FW_DESC_SIZE
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EE_BANK_BASE := 0x0801C000 # EEPROM storage area
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EE_BANK_SIZE := 0x00004000 # Size of EEPROM storage area
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FW_DESC_SIZE := 0x00000064
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OSCILLATOR_FREQ := 8000000
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