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sometimes thrown, and made errors not lock it up by default. It works for me, but since this has historically been associated with lots of lock ups please check your systems carefully. PiOS/I2C: Make the bus by default try to recover from errors instead of locking up PiOS/I2C: After a bus error and clocking all previous data create a STOP condition to make sure bus is released (note, this also requires creating a START condition first) PiOS/I2C: If the same event hits the I2C bus twice in a row then disregard second one, there is no situation where we should get the same event multiple times that matters and this gets us out really quickly to catch the real events. I was seeing this with repeated 0x70084 which means byte transmitted. This is related to STM32 bugs in the IRQ timings I believe. PiOS/I2C: 1) Mask out some bits we don't care about in the event flags 2) Don't lock up if the give semaphore fails, although why it does is strange 3) Recover from bus failure through the "auto" state path instead of just coding state PiOS/I2C: Change the reset bus code to follow http://www.analog.com/static/imported-files/application_notes/54305147357414AN686_0.pdf (thanks for the reference Neontangerine). Although this may actually NOT clear the bus the first time through, subsequent bus errors should eventually clock it out. The up side is it is less likely to clock a bunch of 1s into an ESC and make it run up. PiOS/I2C: Some cleaned up code for getting a snippet of the history when something strange happens PiOS/I2C: Export logging information from I2C through a UAV object PiOS/I2C: Improve the diagnostic information PiOS/I2C: Need to handle the event 0x30084. This seems to happen between a byte transmitted and new byte started PiOS/I2C: Handle the NACK condition by simply going to the stopping state. PiOS/I2C: Add a new NACK state to handle sending the STOP signal after a NACK following the STM documentation. Other error conditions still are not dealt with. PiOS/I2C: Should handle the NACK condition from all the write cases. Need to think about read cases git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@2239 ebee16cc-31ac-478f-84a7-5cbb03baadba
104 lines
2.8 KiB
C
104 lines
2.8 KiB
C
/**
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******************************************************************************
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*
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* @file pios_i2c_priv.h
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* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2010.
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* Parts by Thorsten Klose (tk@midibox.org)
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* @brief I2C private definitions.
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* @see The GNU Public License (GPL) Version 3
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*
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*****************************************************************************/
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef PIOS_I2C_PRIV_H
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#define PIOS_I2C_PRIV_H
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#include <pios.h>
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#include <pios_stm32.h>
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#include <stdbool.h>
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struct pios_i2c_adapter_cfg {
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I2C_TypeDef *regs;
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I2C_InitTypeDef init;
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uint32_t transfer_timeout_ms;
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struct stm32_gpio scl;
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struct stm32_gpio sda;
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struct stm32_irq event;
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struct stm32_irq error;
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};
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enum i2c_adapter_state {
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I2C_STATE_FSM_FAULT = 0, /* Must be zero so undefined transitions land here */
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I2C_STATE_BUS_ERROR,
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I2C_STATE_STOPPED,
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I2C_STATE_STOPPING,
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I2C_STATE_STARTING,
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I2C_STATE_R_MORE_TXN_ADDR,
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I2C_STATE_R_MORE_TXN_PRE_ONE,
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I2C_STATE_R_MORE_TXN_PRE_FIRST,
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I2C_STATE_R_MORE_TXN_PRE_MIDDLE,
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I2C_STATE_R_MORE_TXN_PRE_LAST,
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I2C_STATE_R_MORE_TXN_POST_LAST,
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I2C_STATE_R_LAST_TXN_ADDR,
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I2C_STATE_R_LAST_TXN_PRE_ONE,
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I2C_STATE_R_LAST_TXN_PRE_FIRST,
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I2C_STATE_R_LAST_TXN_PRE_MIDDLE,
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I2C_STATE_R_LAST_TXN_PRE_LAST,
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I2C_STATE_R_LAST_TXN_POST_LAST,
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I2C_STATE_W_MORE_TXN_ADDR,
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I2C_STATE_W_MORE_TXN_MIDDLE,
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I2C_STATE_W_MORE_TXN_LAST,
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I2C_STATE_W_LAST_TXN_ADDR,
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I2C_STATE_W_LAST_TXN_MIDDLE,
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I2C_STATE_W_LAST_TXN_LAST,
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I2C_STATE_NACK,
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I2C_STATE_NUM_STATES /* Must be last */
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};
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struct pios_i2c_adapter {
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const struct pios_i2c_adapter_cfg *const cfg;
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void (*callback) (uint8_t, uint8_t);
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#ifdef PIOS_INCLUDE_FREERTOS
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xSemaphoreHandle sem_busy;
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xSemaphoreHandle sem_ready;
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#endif
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bool bus_error;
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volatile enum i2c_adapter_state curr_state;
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const struct pios_i2c_txn *first_txn;
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const struct pios_i2c_txn *active_txn;
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const struct pios_i2c_txn *last_txn;
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uint8_t *active_byte;
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uint8_t *last_byte;
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};
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extern struct pios_i2c_adapter pios_i2c_adapters[];
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extern uint8_t pios_i2c_num_adapters;
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#endif /* PIOS_I2C_PRIV_H */
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