mirror of
https://bitbucket.org/librepilot/librepilot.git
synced 2024-12-02 10:24:11 +01:00
0684a42fac
Removes hard-coding of JTAG interface config in the <board>_program make macros. This allows the use of STLINKv2 for F4 boards while continuing to use the FOSS JTAG revB on F1 boards.
280 lines
8.6 KiB
Makefile
280 lines
8.6 KiB
Makefile
# Toolchain prefix (i.e arm-elf- -> arm-elf-gcc.exe)
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TCHAIN_PREFIX ?= arm-none-eabi-
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# Define toolchain component names.
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CC = $(TCHAIN_PREFIX)gcc
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CPP = $(TCHAIN_PREFIX)g++
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AR = $(TCHAIN_PREFIX)ar
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OBJCOPY = $(TCHAIN_PREFIX)objcopy
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OBJDUMP = $(TCHAIN_PREFIX)objdump
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SIZE = $(TCHAIN_PREFIX)size
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NM = $(TCHAIN_PREFIX)nm
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STRIP = $(TCHAIN_PREFIX)strip
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INSTALL = install
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THUMB = -mthumb
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# Test if quotes are needed for the echo-command
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result = ${shell echo "test"}
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ifeq (${result}, test)
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quote = '
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# This line is just to clear out the single quote above '
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else
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quote =
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endif
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# Define Messages
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# English
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MSG_FORMATERROR := ${quote} Can not handle output-format${quote}
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MSG_MODINIT := ${quote} MODINIT ${quote}
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MSG_SIZE := ${quote} SIZE ${quote}
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MSG_LOAD_FILE := ${quote} BIN/HEX ${quote}
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MSG_BIN_OBJ := ${quote} BINO ${quote}
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MSG_STRIP_FILE := ${quote} STRIP ${quote}
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MSG_EXTENDED_LISTING := ${quote} LIS ${quote}
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MSG_SYMBOL_TABLE := ${quote} NM ${quote}
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MSG_LINKING := ${quote} LD ${quote}
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MSG_COMPILING := ${quote} CC ${quote}
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MSG_COMPILING_ARM := ${quote} CC-ARM ${quote}
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MSG_COMPILINGCPP := ${quote} CXX ${quote}
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MSG_COMPILINGCPP_ARM := ${quote} CXX-ARM ${quote}
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MSG_ASSEMBLING := ${quote} AS ${quote}
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MSG_ASSEMBLING_ARM := ${quote} AS-ARM ${quote}
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MSG_CLEANING := ${quote} CLEAN ${quote}
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MSG_ASMFROMC := ${quote} AS(C) ${quote}
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MSG_ASMFROMC_ARM := ${quote} AS(C)-ARM ${quote}
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MSG_PYMITEINIT := ${quote} PY ${quote}
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MSG_INSTALLING := ${quote} INSTALL ${quote}
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MSG_OPFIRMWARE := ${quote} OPFW ${quote}
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MSG_FWINFO := ${quote} FWINFO ${quote}
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MSG_JTAG_PROGRAM := ${quote} JTAG-PGM ${quote}
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MSG_JTAG_WIPE := ${quote} JTAG-WIPE ${quote}
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MSG_JTAG_RESET := ${quote} JTAG-RST ${quote}
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MSG_JTAG_SAFEBOOT := ${quote} JTAG-SAFE ${quote}
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toprel = $(subst $(realpath $(TOP))/,,$(abspath $(1)))
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# Display compiler version information.
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.PHONY: gccversion
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gccversion :
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@$(CC) --version
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# Create final output file (.hex) from ELF output file.
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%.hex: %.elf
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@echo $(MSG_LOAD_FILE) $(call toprel, $@)
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$(V1) $(OBJCOPY) -O ihex $< $@
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# Create stripped output file (.elf.stripped) from ELF output file.
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%.elf.stripped: %.elf
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@echo $(MSG_STRIP_FILE) $(call toprel, $@)
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$(V1) $(STRIP) --strip-unneeded $< -o $@
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# Create final output file (.bin) from ELF output file.
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%.bin: %.elf
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@echo $(MSG_LOAD_FILE) $(call toprel, $@)
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$(V1) $(OBJCOPY) -O binary $< $@
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%.bin: %.o
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@echo $(MSG_LOAD_FILE) $(call toprel, $@)
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$(V1) $(OBJCOPY) -O binary $< $@
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%.bin.o: %.bin
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@echo $(MSG_BIN_OBJ) $(call toprel, $@)
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$(V1) $(OBJCOPY) -I binary -O elf32-littlearm --binary-architecture arm \
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--rename-section .data=.rodata,alloc,load,readonly,data,contents \
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--wildcard \
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--redefine-sym _binary_$(subst :,_,$(subst -,_,$(subst .,_,$(subst /,_,$<))))_start=_binary_start \
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--redefine-sym _binary_$(subst :,_,$(subst -,_,$(subst .,_,$(subst /,_,$<))))_end=_binary_end \
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--redefine-sym _binary_$(subst :,_,$(subst -,_,$(subst .,_,$(subst /,_,$<))))_size=_binary_size \
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$< $@
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# Create extended listing file/disassambly from ELF output file.
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# using objdump testing: option -C
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%.lss: %.elf
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@echo $(MSG_EXTENDED_LISTING) $(call toprel, $@)
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$(V1) $(OBJDUMP) -h -S -C -r $< > $@
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# Create a symbol table from ELF output file.
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%.sym: %.elf
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@echo $(MSG_SYMBOL_TABLE) $(call toprel, $@)
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$(V1) $(NM) -n $< > $@
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define SIZE_TEMPLATE
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.PHONY: size
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size: $(1)_size
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.PHONY: $(1)_size
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$(1)_size: $(1)
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@echo $(MSG_SIZE) $$(call toprel, $$<)
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$(V1) $(SIZE) -A $$<
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endef
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# OpenPilot firmware image template
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# $(1) = path to bin file
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# $(2) = boardtype in hex
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# $(3) = board revision in hex
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define OPFW_TEMPLATE
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FORCE:
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$(1).firmwareinfo.c: $(1) $(TOP)/make/templates/firmwareinfotemplate.c FORCE
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@echo $(MSG_FWINFO) $$(call toprel, $$@)
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$(V1) python $(TOP)/make/scripts/version-info.py \
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--path=$(TOP) \
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--template=$(TOP)/make/templates/firmwareinfotemplate.c \
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--outfile=$$@ \
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--image=$(1) \
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--type=$(2) \
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--revision=$(3)
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$(eval $(call COMPILE_C_TEMPLATE, $(1).firmwareinfo.c))
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$(OUTDIR)/$(notdir $(basename $(1))).opfw : $(1) $(1).firmwareinfo.bin
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@echo $(MSG_OPFIRMWARE) $$(call toprel, $$@)
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$(V1) cat $(1) $(1).firmwareinfo.bin > $$@
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endef
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# Assemble: create object files from assembler source files.
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define ASSEMBLE_TEMPLATE
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$(OUTDIR)/$(notdir $(basename $(1))).o : $(1)
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@echo $(MSG_ASSEMBLING) $$(call toprel, $$<)
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$(V1) $(CC) -c -mthumb $$(ASFLAGS) $$< -o $$@
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endef
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# Assemble: create object files from assembler source files. ARM-only
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define ASSEMBLE_ARM_TEMPLATE
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$(OUTDIR)/$(notdir $(basename $(1))).o : $(1)
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@echo $(MSG_ASSEMBLING_ARM) $$(call toprel, $$<)
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$(V1) $(CC) -c $$(ASFLAGS) $$< -o $$@
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endef
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# Compile: create object files from C source files.
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define COMPILE_C_TEMPLATE
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$(OUTDIR)/$(notdir $(basename $(1))).o : $(1)
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@echo $(MSG_COMPILING) $$(call toprel, $$<)
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$(V1) $(CC) -c -mthumb $$(CFLAGS) $$(CONLYFLAGS) $$< -o $$@
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endef
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# Compile: create object files from C source files. ARM-only
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define COMPILE_C_ARM_TEMPLATE
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$(OUTDIR)/$(notdir $(basename $(1))).o : $(1)
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@echo $(MSG_COMPILING_ARM) $$(call toprel, $$<)
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$(V1) $(CC) -c $$(CFLAGS) $$(CONLYFLAGS) $$< -o $$@
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endef
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# Compile: create object files from C++ source files.
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define COMPILE_CPP_TEMPLATE
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$(OUTDIR)/$(notdir $(basename $(1))).o : $(1)
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@echo $(MSG_COMPILINGCPP) $$(call toprel, $$<)
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$(V1) $(CC) -c -mthumb $$(CFLAGS) $$(CPPFLAGS) $$< -o $$@
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endef
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# Compile: create object files from C++ source files. ARM-only
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define COMPILE_CPP_ARM_TEMPLATE
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$(OUTDIR)/$(notdir $(basename $(1))).o : $(1)
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@echo $(MSG_COMPILINGCPP_ARM) $$(call toprel, $$<)
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$(V1) $(CC) -c $$(CFLAGS) $$(CPPFLAGS) $$< -o $$@
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endef
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# Link: create ELF output file from object files.
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# $1 = elf file to produce
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# $2 = list of object files that make up the elf file
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define LINK_TEMPLATE
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.SECONDARY : $(1)
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.PRECIOUS : $(2)
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$(1): $(2)
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@echo $(MSG_LINKING) $$(call toprel, $$@)
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$(V1) $(CC) -mthumb $$(CFLAGS) $(2) --output $$@ $$(LDFLAGS)
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endef
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# Compile: create assembler files from C source files. ARM/Thumb
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define PARTIAL_COMPILE_TEMPLATE
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$($(1):.c=.s) : %.s : %.c
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@echo $(MSG_ASMFROMC) $$(call toprel, $$<)
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$(V1) $(CC) -mthumb -S $$(CFLAGS) $$(CONLYFLAGS) $$< -o $$@
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endef
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# Compile: create assembler files from C source files. ARM only
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define PARTIAL_COMPILE_ARM_TEMPLATE
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$($(1):.c=.s) : %.s : %.c
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@echo $(MSG_ASMFROMC_ARM) $$(call toprel, $$<)
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$(V1) $(CC) -S $$(CFLAGS) $$(CONLYFLAGS) $$< -o $$@
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endef
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# $(1) = Name of binary image to write
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# $(2) = Base of flash region to write/wipe
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# $(3) = Size of flash region to write/wipe
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# $(4) = OpenOCD JTAG interface configuration file to use
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# $(5) = OpenOCD configuration file to use
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define JTAG_TEMPLATE
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# ---------------------------------------------------------------------------
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# Options for OpenOCD flash-programming
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# see openocd.pdf/openocd.texi for further information
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# if OpenOCD is in the $PATH just set OPENOCDEXE=openocd
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OOCD_EXE ?= openocd
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# debug level
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OOCD_JTAG_SETUP = -d0
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# interface and board/target settings (using the OOCD target-library here)
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OOCD_JTAG_SETUP += -s $(TOP)/flight/Project/OpenOCD
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OOCD_JTAG_SETUP += -f $(4) -f $(5)
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# initialize
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OOCD_BOARD_RESET = -c init
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# show the targets
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#OOCD_BOARD_RESET += -c targets
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# commands to prepare flash-write
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OOCD_BOARD_RESET += -c "reset halt"
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.PHONY: program
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program: $(1)
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@echo $(MSG_JTAG_PROGRAM) $$(call toprel, $$<)
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$(V1) $(OOCD_EXE) \
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$$(OOCD_JTAG_SETUP) \
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$$(OOCD_BOARD_RESET) \
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-c "flash write_image erase $$< $(2) bin" \
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-c "verify_image $$< $(2) bin" \
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-c "reset run" \
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-c "shutdown"
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.PHONY: wipe
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wipe:
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@echo $(MSG_JTAG_WIPE) wiping $(3) bytes starting from $(2)
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$(V1) $(OOCD_EXE) \
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$$(OOCD_JTAG_SETUP) \
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$$(OOCD_BOARD_RESET) \
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-c "flash erase_address pad $(2) $(3)" \
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-c "reset run" \
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-c "shutdown"
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reset:
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@echo $(MSG_JTAG_RESET) resetting device
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$(V1) $(OOCD_EXE) \
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$$(OOCD_JTAG_SETUP) \
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$$(OOCD_BOARD_RESET) \
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-c "reset run" \
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-c "shutdown"
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# Enable PWR and BKP clocks (set RCC_APB1ENR[PWREN|BKPEN])
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OOCD_WRITE_BKPDR3 = -c "mww 0x4002101C 0x18000000"
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# Enable writes to BKP registers (set PWR_CR[DBP] via bit op alias address)
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#
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# Direct register access would be:
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# mww 0x40007000 0x00000100
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#
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# Direct _bit_ access is:
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# Bit 8 in 0x40007000 = 0x42000000 + 0x7000 * 32 + 8 * 4 = 420E0020
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OOCD_WRITE_BKPDR3 += -c "mww 0x420E0020 0x00000001"
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# Set BR3 to max value to force a safe boot
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OOCD_WRITE_BKPDR3 += -c "mwh 0x40006C0C 0xFFFF"
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safeboot:
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@echo $(MSG_JTAG_SAFEBOOT) forcing boot into safe mode
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$(V1) $(OOCD_EXE) \
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$$(OOCD_JTAG_SETUP) \
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$$(OOCD_BOARD_RESET) \
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$$(OOCD_WRITE_BKPDR3) \
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-c "reset run" \
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-c "shutdown"
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endef
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