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da96ce15b9
Beginning of unifying the input types into PIOS_RECEIVER. git-svn-id: svn://svn.openpilot.org/OpenPilot/trunk@2568 ebee16cc-31ac-478f-84a7-5cbb03baadba
341 lines
10 KiB
C
341 lines
10 KiB
C
/**
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******************************************************************************
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* @addtogroup PIOS PIOS Core hardware abstraction layer
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* @{
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* @addtogroup PIOS_PWM PWM Input Functions
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* @brief Code to measure with PWM input
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* @{
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*
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* @file pios_pwm.c
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* @author The OpenPilot Team, http://www.openpilot.org Copyright (C) 2010.
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* @brief PWM Input functions (STM32 dependent)
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* @see The GNU Public License (GPL) Version 3
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*
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*****************************************************************************/
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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/* Project Includes */
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#include "pios.h"
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#include "pios_pwm_priv.h"
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#if defined(PIOS_INCLUDE_PWM)
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/* Local Variables */
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static uint8_t CaptureState[PIOS_PWM_MAX_INPUTS];
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static uint16_t RiseValue[PIOS_PWM_MAX_INPUTS];
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static uint16_t FallValue[PIOS_PWM_MAX_INPUTS];
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static uint32_t CaptureValue[PIOS_PWM_MAX_INPUTS];
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//static uint8_t SupervisorState = 0;
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static uint32_t CapCounter[PIOS_PWM_MAX_INPUTS];
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//static uint32_t CapCounterPrev[MAX_CHANNELS];
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/**
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* Initialises all the pins
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*/
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void PIOS_PWM_Init(void)
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{
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for (uint8_t i = 0; i < pios_pwm_cfg.num_channels; i++) {
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/* Flush counter variables */
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CaptureState[i] = 0;
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RiseValue[i] = 0;
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FallValue[i] = 0;
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CaptureValue[i] = 0;
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NVIC_InitTypeDef NVIC_InitStructure = pios_pwm_cfg.irq.init;
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GPIO_InitTypeDef GPIO_InitStructure = pios_pwm_cfg.gpio_init;
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TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure = pios_pwm_cfg.tim_base_init;
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TIM_ICInitTypeDef TIM_ICInitStructure = pios_pwm_cfg.tim_ic_init;
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struct pios_pwm_channel channel = pios_pwm_cfg.channels[i];
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/* Enable appropriate clock to timer module */
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switch((int32_t) channel.timer) {
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case (int32_t)TIM1:
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NVIC_InitStructure.NVIC_IRQChannel = TIM1_CC_IRQn;
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE);
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break;
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case (int32_t)TIM2:
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NVIC_InitStructure.NVIC_IRQChannel = TIM2_IRQn;
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);
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break;
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case (int32_t)TIM3:
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NVIC_InitStructure.NVIC_IRQChannel = TIM3_IRQn;
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE);
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break;
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case (int32_t)TIM4:
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NVIC_InitStructure.NVIC_IRQChannel = TIM4_IRQn;
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE);
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break;
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#ifdef STM32F10X_HD
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case (int32_t)TIM5:
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NVIC_InitStructure.NVIC_IRQChannel = TIM5_IRQn;
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM5, ENABLE);
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break;
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case (int32_t)TIM6:
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NVIC_InitStructure.NVIC_IRQChannel = TIM6_IRQn;
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM6, ENABLE);
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break;
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case (int32_t)TIM7:
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NVIC_InitStructure.NVIC_IRQChannel = TIM7_IRQn;
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM7, ENABLE);
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break;
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case (int32_t)TIM8:
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NVIC_InitStructure.NVIC_IRQChannel = TIM8_CC_IRQn;
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM8, ENABLE);
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break;
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#endif
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}
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NVIC_Init(&NVIC_InitStructure);
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/* Enable GPIO */
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GPIO_InitStructure.GPIO_Pin = channel.pin;
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GPIO_Init(channel.port, &GPIO_InitStructure);
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/* Configure timer for input capture */
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TIM_ICInitStructure.TIM_Channel = channel.channel;
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TIM_ICInit(channel.timer, &TIM_ICInitStructure);
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/* Configure timer clocks */
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TIM_InternalClockConfig(channel.timer);
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if(channel.timer->PSC != ((PIOS_MASTER_CLOCK / 1000000) - 1))
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TIM_TimeBaseInit(channel.timer, &TIM_TimeBaseStructure);
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/* Enable the Capture Compare Interrupt Request */
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TIM_ITConfig(channel.timer, channel.ccr, ENABLE);
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/* Enable timers */
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TIM_Cmd(channel.timer, ENABLE);
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}
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if(pios_pwm_cfg.remap) {
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/* Warning, I don't think this will work for multiple remaps at once */
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GPIO_PinRemapConfig(pios_pwm_cfg.remap, ENABLE);
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}
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#if 0
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/* Supervisor Setup */
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#if (PIOS_PWM_SUPV_ENABLED)
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/* Flush counter variables */
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for (i = 0; i < PIOS_PWM_NUM_INPUTS; i++) {
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CapCounter[i] = 0;
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}
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for (i = 0; i < PIOS_PWM_NUM_INPUTS; i++) {
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CapCounterPrev[i] = 0;
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}
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/* Enable timer clock */
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PIOS_PWM_SUPV_TIMER_RCC_FUNC;
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/* Configure interrupts */
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NVIC_InitStructure.NVIC_IRQChannel = PIOS_PWM_SUPV_IRQ_CHANNEL;
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = PIOS_IRQ_PRIO_MID;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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/* Time base configuration */
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TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);
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TIM_TimeBaseStructure.TIM_Period = ((1000000 / PIOS_PWM_SUPV_HZ) - 1);
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TIM_TimeBaseStructure.TIM_Prescaler = (PIOS_MASTER_CLOCK / 1000000) - 1; /* For 1 uS accuracy */
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TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1;
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TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
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TIM_TimeBaseInit(PIOS_PWM_SUPV_TIMER, &TIM_TimeBaseStructure);
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/* Enable the CC2 Interrupt Request */
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TIM_ITConfig(PIOS_PWM_SUPV_TIMER, TIM_IT_Update, ENABLE);
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/* Clear update pending flag */
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TIM_ClearFlag(TIM2, TIM_FLAG_Update);
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/* Enable counter */
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TIM_Cmd(PIOS_PWM_SUPV_TIMER, ENABLE);
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#endif
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/* Setup local variable which stays in this scope */
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/* Doing this here and using a local variable saves doing it in the ISR */
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TIM_ICInitStructure.TIM_ICSelection = TIM_ICSelection_DirectTI;
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TIM_ICInitStructure.TIM_ICPrescaler = TIM_ICPSC_DIV1;
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TIM_ICInitStructure.TIM_ICFilter = 0x0;
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#endif
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}
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/**
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* Get the value of an input channel
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* \param[in] Channel Number of the channel desired
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* \output -1 Channel not available
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* \output >0 Channel value
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*/
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int32_t PIOS_PWM_Get(int8_t Channel)
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{
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/* Return error if channel not available */
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if (Channel >= pios_pwm_cfg.num_channels) {
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return -1;
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}
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return CaptureValue[Channel];
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}
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void PIOS_PWM_irq_handler(TIM_TypeDef * timer)
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{
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uint16_t val = 0;
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for(uint8_t i = 0; i < pios_pwm_cfg.num_channels; i++) {
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struct pios_pwm_channel channel = pios_pwm_cfg.channels[i];
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if ((channel.timer == timer) && (TIM_GetITStatus(channel.timer, channel.ccr) == SET)) {
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TIM_ClearITPendingBit(channel.timer, channel.ccr);
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switch(channel.channel) {
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case TIM_Channel_1:
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val = TIM_GetCapture1(channel.timer);
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break;
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case TIM_Channel_2:
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val = TIM_GetCapture2(channel.timer);
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break;
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case TIM_Channel_3:
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val = TIM_GetCapture3(channel.timer);
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break;
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case TIM_Channel_4:
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val = TIM_GetCapture4(channel.timer);
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break;
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}
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if (CaptureState[i] == 0) {
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RiseValue[i] = val;
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} else {
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FallValue[i] = val;
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}
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// flip state machine and capture value here
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/* Simple rise or fall state machine */
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TIM_ICInitTypeDef TIM_ICInitStructure = pios_pwm_cfg.tim_ic_init;
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if (CaptureState[i] == 0) {
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/* Switch states */
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CaptureState[i] = 1;
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/* Switch polarity of input capture */
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TIM_ICInitStructure.TIM_ICPolarity = TIM_ICPolarity_Falling;
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TIM_ICInitStructure.TIM_Channel = channel.channel;
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TIM_ICInit(channel.timer, &TIM_ICInitStructure);
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} else {
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/* Capture computation */
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if (FallValue[i] > RiseValue[i]) {
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CaptureValue[i] = (FallValue[i] - RiseValue[i]);
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} else {
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CaptureValue[i] = ((channel.timer->ARR - RiseValue[i]) + FallValue[i]);
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}
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/* Switch states */
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CaptureState[i] = 0;
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/* Increase supervisor counter */
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CapCounter[i]++;
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/* Switch polarity of input capture */
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TIM_ICInitStructure.TIM_ICPolarity = TIM_ICPolarity_Rising;
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TIM_ICInitStructure.TIM_Channel = channel.channel;
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TIM_ICInit(channel.timer, &TIM_ICInitStructure);
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}
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}
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}
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}
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#if 0
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/**
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* Handle TIM5 global interrupt request
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*/
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void TIM5_IRQHandler(void)
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{
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/* Do this as it's more efficient */
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if (TIM_GetITStatus(PIOS_PWM_TIM_PORT[2], PIOS_PWM_TIM_CCR[2]) == SET) {
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if (CaptureState[2] == 0) {
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RiseValue[2] = TIM_GetCapture1(PIOS_PWM_TIM_PORT[2]);
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} else {
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FallValue[2] = TIM_GetCapture1(PIOS_PWM_TIM_PORT[2]);
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}
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/* Clear TIM3 Capture compare interrupt pending bit */
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TIM_ClearITPendingBit(PIOS_PWM_TIM_PORT[2], PIOS_PWM_TIM_CCR[2]);
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/* Simple rise or fall state machine */
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if (CaptureState[2] == 0) {
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/* Switch states */
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CaptureState[2] = 1;
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/* Switch polarity of input capture */
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TIM_ICInitStructure.TIM_ICPolarity = TIM_ICPolarity_Falling;
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TIM_ICInitStructure.TIM_Channel = PIOS_PWM_TIM_CHANNEL[2];
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TIM_ICInit(PIOS_PWM_TIM_PORT[2], &TIM_ICInitStructure);
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} else {
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/* Capture computation */
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if (FallValue[2] > RiseValue[2]) {
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CaptureValue[2] = (FallValue[2] - RiseValue[2]);
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} else {
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CaptureValue[2] = ((0xFFFF - RiseValue[2]) + FallValue[2]);
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}
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/* Switch states */
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CaptureState[2] = 0;
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/* Increase supervisor counter */
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CapCounter[2]++;
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/* Switch polarity of input capture */
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TIM_ICInitStructure.TIM_ICPolarity = TIM_ICPolarity_Rising;
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TIM_ICInitStructure.TIM_Channel = PIOS_PWM_TIM_CHANNEL[2];
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TIM_ICInit(PIOS_PWM_TIM_PORT[2], &TIM_ICInitStructure);
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}
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}
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}
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/**
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* This function handles TIM3 global interrupt request.
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*/
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PIOS_PWM_SUPV_IRQ_FUNC {
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/* Clear timer interrupt pending bit */
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TIM_ClearITPendingBit(PIOS_PWM_SUPV_TIMER, TIM_IT_Update);
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/* Simple state machine */
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if (SupervisorState == 0) {
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/* Save this states values */
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for (int32_t i = 0; i < PIOS_PWM_NUM_INPUTS; i++) {
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CapCounterPrev[i] = CapCounter[i];
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}
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/* Move to next state */
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SupervisorState = 1;
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} else {
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/* See what channels have been updated */
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for (int32_t i = 0; i < PIOS_PWM_NUM_INPUTS; i++) {
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if (CapCounter[i] == CapCounterPrev[i]) {
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CaptureValue[i] = 0;
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}
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}
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/* Move to next state */
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SupervisorState = 0;
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}
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}
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#endif
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#endif
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/**
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* @}
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* @}
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*/
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