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https://github.com/richardghirst/PiBits.git
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Revert to original code re: setting delay, so we again have a delay of 1
for a pulse of zero. Will frig the display issues by using an array that stores written cnt rather than deriving it from actual register data.
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@ -236,7 +236,7 @@ int init_module(void)
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ctl->cb[i].info = BCM2708_DMA_NO_WIDE_BURSTS | BCM2708_DMA_WAIT_RESP | BCM2708_DMA_D_DREQ | BCM2708_DMA_PER_MAP(5);
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ctl->cb[i].src = (uint32_t)(&ctl->pwmdata) & 0x7fffffff;
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ctl->cb[i].dst = ((PWM_BASE + PWM_FIFO*4) & 0x00ffffff) | 0x7e000000;
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ctl->cb[i].length = sizeof(uint32_t) * 0; // default 0 tick high
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ctl->cb[i].length = sizeof(uint32_t) * 1; // default 1 tick high
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ctl->cb[i].stride = 0;
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ctl->cb[i].next = (uint32_t)(ctl->cb + i + 1) & 0x7fffffff;
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// Set gpio lo
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@ -404,9 +404,10 @@ static ssize_t dev_write(struct file *filp,const char *buf,size_t count,loff_t *
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// Normally, the first GPIO transfer sets the output, while the second
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// clears it after a delay. For the special case of a delay of 0, we
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// ensure that the first GPIO transfer also clears the output.
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{
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const int gp_set_or_clr = ( cnt != 0 ? GPSET0 : GPCLR0 );
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ctl->cb[servo*4+0].dst = ((GPIO_BASE + gp_set_or_clr*4) & 0x00ffffff) | 0x7e000000;
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if (cnt == 0) {
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ctl->cb[servo*4+0].dst = ((GPIO_BASE + GPCLR0*4) & 0x00ffffff) | 0x7e000000;
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} else {
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ctl->cb[servo*4+0].dst = ((GPIO_BASE + GPSET0*4) & 0x00ffffff) | 0x7e000000;
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ctl->cb[servo*4+1].length = cnt * sizeof(uint32_t);
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ctl->cb[servo*4+3].length = (cycle_ticks / 8 - cnt) * sizeof(uint32_t);
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}
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