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[dxbc] Implemented new workaround for depth-compare ops on Nvidia
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@ -2683,6 +2683,9 @@ namespace dxvk {
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DxbcRegMask(true, false, false, false))
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DxbcRegMask(true, false, false, false))
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: DxbcRegisterValue();
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: DxbcRegisterValue();
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if (isDepthCompare && m_options.addExtraDrefCoordComponent && coord.type.ccount < 4)
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coord = emitRegisterConcat(coord, referenceValue);
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// Determine the sampled image type based on the opcode.
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// Determine the sampled image type based on the opcode.
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const uint32_t sampledImageType = isDepthCompare
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const uint32_t sampledImageType = isDepthCompare
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? m_module.defSampledImageType(m_textures.at(textureId).depthTypeId)
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? m_module.defSampledImageType(m_textures.at(textureId).depthTypeId)
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@ -2797,6 +2800,9 @@ namespace dxvk {
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? emitRegisterLoad(ins.src[3], DxbcRegMask(true, false, false, false))
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? emitRegisterLoad(ins.src[3], DxbcRegMask(true, false, false, false))
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: DxbcRegisterValue();
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: DxbcRegisterValue();
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if (isDepthCompare && m_options.addExtraDrefCoordComponent && coord.type.ccount < 4)
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coord = emitRegisterConcat(coord, referenceValue);
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// Load explicit gradients for sample operations that require them
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// Load explicit gradients for sample operations that require them
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const bool hasExplicitGradients = ins.op == DxbcOpcode::SampleD;
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const bool hasExplicitGradients = ins.op == DxbcOpcode::SampleD;
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@ -3583,16 +3589,32 @@ namespace dxvk {
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}
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}
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DxbcRegisterValue DxbcCompiler::emitRegisterConcat(
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DxbcRegisterValue value1,
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DxbcRegisterValue value2) {
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std::array<uint32_t, 2> ids =
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{{ value1.id, value2.id }};
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DxbcRegisterValue result;
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result.type.ctype = value1.type.ctype;
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result.type.ccount = value1.type.ccount + value2.type.ccount;
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result.id = m_module.opCompositeConstruct(
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getVectorTypeId(result.type),
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ids.size(), ids.data());
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return result;
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}
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DxbcRegisterValue DxbcCompiler::emitRegisterExtend(
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DxbcRegisterValue DxbcCompiler::emitRegisterExtend(
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DxbcRegisterValue value,
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DxbcRegisterValue value,
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uint32_t size) {
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uint32_t size) {
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if (size == 1)
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if (size == 1)
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return value;
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return value;
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std::array<uint32_t, 4> ids = {
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std::array<uint32_t, 4> ids = {{
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value.id, value.id,
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value.id, value.id,
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value.id, value.id,
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value.id, value.id,
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};
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}};
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DxbcRegisterValue result;
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DxbcRegisterValue result;
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result.type.ctype = value.type.ctype;
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result.type.ctype = value.type.ctype;
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@ -652,6 +652,10 @@ namespace dxvk {
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DxbcRegisterValue srcValue,
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DxbcRegisterValue srcValue,
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DxbcRegMask srcMask);
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DxbcRegMask srcMask);
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DxbcRegisterValue emitRegisterConcat(
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DxbcRegisterValue value1,
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DxbcRegisterValue value2);
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DxbcRegisterValue emitRegisterExtend(
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DxbcRegisterValue emitRegisterExtend(
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DxbcRegisterValue value,
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DxbcRegisterValue value,
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uint32_t size);
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uint32_t size);
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@ -10,11 +10,18 @@ namespace dxvk {
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= static_cast<DxvkGpuVendor>(deviceProps.vendorID);
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= static_cast<DxvkGpuVendor>(deviceProps.vendorID);
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if (vendor == DxvkGpuVendor::Nvidia) {
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if (vendor == DxvkGpuVendor::Nvidia) {
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// The driver expects the coordinate
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// vector to have an extra component
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this->addExtraDrefCoordComponent = true;
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// From vkd3d: NMin/NMax/NClamp crash the driver.
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// From vkd3d: NMin/NMax/NClamp crash the driver.
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this->useSimpleMinMaxClamp = true;
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this->useSimpleMinMaxClamp = true;
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}
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}
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// Inform the user about which workarounds are enabled
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// Inform the user about which workarounds are enabled
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if (this->addExtraDrefCoordComponent)
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Logger::warn("DxbcOptions: Growing coordinate vector for Dref operations");
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if (this->useSimpleMinMaxClamp)
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if (this->useSimpleMinMaxClamp)
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Logger::warn("DxbcOptions: Using FMin/FMax/FClamp instead of NMin/NMax/NClamp");
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Logger::warn("DxbcOptions: Using FMin/FMax/FClamp instead of NMin/NMax/NClamp");
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}
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}
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@ -15,6 +15,9 @@ namespace dxvk {
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DxbcOptions(
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DxbcOptions(
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const Rc<DxvkDevice>& device);
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const Rc<DxvkDevice>& device);
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/// Add extra component to dref coordinate vector
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bool addExtraDrefCoordComponent = false;
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/// Use Fmin/Fmax instead of Nmin/Nmax.
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/// Use Fmin/Fmax instead of Nmin/Nmax.
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bool useSimpleMinMaxClamp = false;
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bool useSimpleMinMaxClamp = false;
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};
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};
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